From: Thierry Reding <thierry.reding@gmail.com>
To: JC Kuo <jckuo@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: gregkh@linuxfoundation.org, robh@kernel.org,
jonathanh@nvidia.com, kishon@ti.com, linux-tegra@vger.kernel.org,
linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, nkristam@nvidia.com,
Thierry Reding <treding@nvidia.com>,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v6 02/15] clk: tegra: Don't enable PLLE HW sequencer at init
Date: Tue, 19 Jan 2021 15:12:43 +0100 [thread overview]
Message-ID: <YAbo2574CnMB+UuU@ulmo> (raw)
In-Reply-To: <20210119085546.725005-3-jckuo@nvidia.com>
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On Tue, Jan 19, 2021 at 04:55:33PM +0800, JC Kuo wrote:
> PLLE hardware power sequencer references PEX/SATA UPHY PLL hardware
> power sequencers' output to enable/disable PLLE. PLLE hardware power
> sequencer has to be enabled only after PEX/SATA UPHY PLL's sequencers
> are enabled.
>
> Signed-off-by: JC Kuo <jckuo@nvidia.com>
> Acked-by: Thierry Reding <treding@nvidia.com>
> ---
> v6:
> no change
> v5:
> no change
> v4:
> no change
> v3:
> no change
>
> drivers/clk/tegra/clk-pll.c | 12 ------------
> 1 file changed, 12 deletions(-)
Michael, Stephen,
here's patch 2 of the hardware sequencer series that would need an
Acked-by so that it can go through a different tree.
Thanks,
Thierry
>
> diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
> index c5cc0a2dac6f..0193cebe8c5a 100644
> --- a/drivers/clk/tegra/clk-pll.c
> +++ b/drivers/clk/tegra/clk-pll.c
> @@ -2515,18 +2515,6 @@ static int clk_plle_tegra210_enable(struct clk_hw *hw)
> pll_writel(val, PLLE_SS_CTRL, pll);
> udelay(1);
>
> - val = pll_readl_misc(pll);
> - val &= ~PLLE_MISC_IDDQ_SW_CTRL;
> - pll_writel_misc(val, pll);
> -
> - val = pll_readl(pll->params->aux_reg, pll);
> - val |= (PLLE_AUX_USE_LOCKDET | PLLE_AUX_SS_SEQ_INCLUDE);
> - val &= ~(PLLE_AUX_ENABLE_SWCTL | PLLE_AUX_SS_SWCTL);
> - pll_writel(val, pll->params->aux_reg, pll);
> - udelay(1);
> - val |= PLLE_AUX_SEQ_ENABLE;
> - pll_writel(val, pll->params->aux_reg, pll);
> -
> out:
> if (pll->lock)
> spin_unlock_irqrestore(pll->lock, flags);
> --
> 2.25.1
>
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next prev parent reply other threads:[~2021-01-19 23:35 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-19 8:55 [PATCH v6 00/15] Tegra XHCI controller ELPG support JC Kuo
2021-01-19 8:55 ` [PATCH v6 01/15] clk: tegra: Add PLLE HW power sequencer control JC Kuo
2021-01-19 14:11 ` Thierry Reding
2021-02-11 3:06 ` Stephen Boyd
2021-01-19 8:55 ` [PATCH v6 02/15] clk: tegra: Don't enable PLLE HW sequencer at init JC Kuo
2021-01-19 14:12 ` Thierry Reding [this message]
2021-02-11 3:06 ` Stephen Boyd
2021-01-19 8:55 ` [PATCH v6 03/15] phy: tegra: xusb: Move usb3 port init for Tegra210 JC Kuo
2021-01-19 8:55 ` [PATCH v6 04/15] phy: tegra: xusb: tegra210: Do not reset UPHY PLL JC Kuo
2021-01-19 13:52 ` Thierry Reding
2021-01-20 1:42 ` JC Kuo
2021-01-19 8:55 ` [PATCH v6 05/15] phy: tegra: xusb: Rearrange UPHY init on Tegra210 JC Kuo
2021-01-19 8:55 ` [PATCH v6 06/15] phy: tegra: xusb: Add Tegra210 lane_iddq operation JC Kuo
2021-01-19 8:55 ` [PATCH v6 07/15] phy: tegra: xusb: Add sleepwalk and suspend/resume JC Kuo
2021-01-19 13:54 ` Thierry Reding
2021-01-19 8:55 ` [PATCH v6 08/15] soc/tegra: pmc: Provide USB sleepwalk register map JC Kuo
2021-01-19 8:55 ` [PATCH v6 09/15] arm64: tegra210: XUSB PADCTL add "nvidia,pmc" prop JC Kuo
2021-01-19 8:55 ` [PATCH v6 10/15] dt-bindings: phy: tegra-xusb: Add nvidia,pmc prop JC Kuo
2021-01-19 8:55 ` [PATCH v6 11/15] phy: tegra: xusb: Add wake/sleepwalk for Tegra210 JC Kuo
2021-01-19 13:58 ` Thierry Reding
2021-01-19 8:55 ` [PATCH v6 12/15] phy: tegra: xusb: Tegra210 host mode VBUS control JC Kuo
2021-01-19 8:55 ` [PATCH v6 13/15] phy: tegra: xusb: Add wake/sleepwalk for Tegra186 JC Kuo
2021-01-19 13:59 ` Thierry Reding
2021-01-19 8:55 ` [PATCH v6 14/15] usb: host: xhci-tegra: Unlink power domain devices JC Kuo
2021-01-19 14:04 ` Thierry Reding
2021-01-19 8:55 ` [PATCH v6 15/15] xhci: tegra: Enable ELPG for runtime/system PM JC Kuo
2021-01-19 14:04 ` Thierry Reding
2021-01-19 14:07 ` [PATCH v6 00/15] Tegra XHCI controller ELPG support Thierry Reding
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