From: Sean Christopherson <seanjc@google.com>
To: "Xu, Like" <like.xu@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
Kan Liang <kan.liang@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
wei.w.wang@intel.com, Borislav Petkov <bp@alien8.de>,
kvm@vger.kernel.org, x86@kernel.org,
linux-kernel@vger.kernel.org, Like Xu <like.xu@linux.intel.com>
Subject: Re: [PATCH v3 6/9] KVM: vmx/pmu: Add MSR_ARCH_LBR_CTL emulation for Arch LBR
Date: Thu, 4 Mar 2021 08:25:56 -0800 [thread overview]
Message-ID: <YEEKFEJyLYSplm7w@google.com> (raw)
In-Reply-To: <88d2481d-5435-1ffb-dc98-5534c446bd52@intel.com>
On Thu, Mar 04, 2021, Xu, Like wrote:
> On 2021/3/4 1:19, Sean Christopherson wrote:
> > > @@ -4463,6 +4470,8 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
> > > vmcs_writel(GUEST_SYSENTER_ESP, 0);
> > > vmcs_writel(GUEST_SYSENTER_EIP, 0);
> > > vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
> > > + if (cpu_has_vmx_arch_lbr())
> > > + vmcs_write64(GUEST_IA32_LBR_CTL, 0);
> > Not that any guest is likely to care, but is the MSR cleared on INIT? The SDM
> > has specific language for warm reset, but I can't find anything for INIT.
> >
> > On a warm reset, all LBR MSRs, including IA32_LBR_DEPTH, have their values
> > preserved. However, IA32_LBR_CTL.LBREn is cleared to 0, disabling LBRs. If a
> > warm reset is triggered while the processor is in C6, also known as warm init,
> > all LBR MSRs will be reset to their initial values.
>
> I was told that the reset behavior of GUEST_IA32_LBR_CTL
> would be the same as the GUEST_IA32_DEBUGCTL (true for INIT as well).
Yes, and DEBUGCTL is preserved on INIT.
if (!init_event) {
vmcs_write32(GUEST_SYSENTER_CS, 0);
vmcs_writel(GUEST_SYSENTER_ESP, 0);
vmcs_writel(GUEST_SYSENTER_EIP, 0);
vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
}
Table 22-10 in the SDM:
All Other MSRs | Pwr up or Reset: | INIT:
Undefined Unchanged
If IA32_LBR_DEPTH is weirdly exempt, it needs to be documented. I doubt that's
the case though.
> It looks we have not strictly distinguished the guest's power concept C*.
> Do we have two trap paths for "warm reset" and "warm init" ?
No. Despite the name .vcpu_reset, KVM doesn't even have a RESET path, userspace
is responsible for modelling RESET.
next prev parent reply other threads:[~2021-03-04 16:27 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-03 13:57 [PATCH v3 0/9] KVM: x86/pmu: Guest Architectural LBR Enabling Like Xu
2021-03-03 13:57 ` [PATCH v3 1/9] perf/x86/intel: Fix a comment about guest LBR support Like Xu
2021-03-03 16:49 ` Sean Christopherson
2021-03-03 13:57 ` [PATCH v3 2/9] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Like Xu
2021-03-03 13:57 ` [PATCH v3 3/9] perf/x86/lbr: Skip checking for the existence of LBR_TOS for Arch LBR Like Xu
2021-03-03 13:57 ` [PATCH v3 4/9] perf/x86/lbr: Use GFP_ATOMIC for cpuc->lbr_xsave memory allocation Like Xu
2021-03-03 13:57 ` [PATCH v3 5/9] KVM: vmx/pmu: Add MSR_ARCH_LBR_DEPTH emulation for Arch LBR Like Xu
2021-03-03 16:58 ` Sean Christopherson
2021-03-04 2:30 ` Xu, Like
2021-03-04 16:12 ` Sean Christopherson
2021-03-05 2:33 ` Xu, Like
2021-03-03 13:57 ` [PATCH v3 6/9] KVM: vmx/pmu: Add MSR_ARCH_LBR_CTL " Like Xu
2021-03-03 17:19 ` Sean Christopherson
2021-03-04 2:58 ` Xu, Like
2021-03-04 16:25 ` Sean Christopherson [this message]
2021-03-03 13:57 ` [PATCH v3 7/9] KVM: vmx/pmu: Add Arch LBR emulation and its VMCS field Like Xu
2021-03-03 17:26 ` Sean Christopherson
2021-03-04 3:02 ` Xu, Like
2021-03-04 17:23 ` Sean Christopherson
2021-03-05 6:35 ` Xu, Like
2021-03-03 13:57 ` [PATCH v3 8/9] KVM: x86: Expose Architectural LBR CPUID leaf Like Xu
2021-03-03 17:34 ` Sean Christopherson
2021-03-03 18:01 ` Sean Christopherson
2021-03-03 13:57 ` [PATCH v3 9/9] KVM: x86: Add XSAVE Support for Architectural LBRs Like Xu
2021-03-03 18:03 ` Sean Christopherson
2021-03-04 3:43 ` Like Xu
2021-03-04 16:31 ` Sean Christopherson
2021-03-05 2:57 ` Xu, Like
2021-03-03 13:57 ` [kvm-unit-tests PATCH] x86: Update guest LBR tests for Architectural LBR Like Xu
2021-03-03 18:05 ` Sean Christopherson
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