From: Greg KH <gregkh@linuxfoundation.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
loic.poulain@linaro.org,
ULRICH Thomas <thomas.ulrich@thalesgroup.com>
Subject: Re: [PATCH 8/8] bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI
Date: Thu, 24 Jun 2021 15:54:42 +0200 [thread overview]
Message-ID: <YNSOopVLtRfRZODo@kroah.com> (raw)
In-Reply-To: <20210621161616.77524-9-manivannan.sadhasivam@linaro.org>
On Mon, Jun 21, 2021 at 09:46:16PM +0530, Manivannan Sadhasivam wrote:
> From: ULRICH Thomas <thomas.ulrich@thalesgroup.com>
>
> This patch adds VendorID/ProductID and MBIM Channel Definitions for
> M.2 Modem Card (PCIe Variant) to MHI PCI generic controller driver.
>
> Cinterion MV31-W (by Thales)
> Additional information on such Modem Card (USB or PCIe variant) is
> available at:
> https://www.thalesgroup.com/en/markets/digital-identity-and-security/iot/iot-connectivity/products/iot-products/mv31-w-ultra-high
>
> Signed-off-by: ULRICH Thomas <thomas.ulrich@thalesgroup.com>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Link: https://lore.kernel.org/r/PAZP264MB284690134DA010698E6B3BDDE60A9@PAZP264MB2846.FRAP264.PROD.OUTLOOK.COM
> [mani: fixed the subject, whitespace, and added sideband_wake field]
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> drivers/bus/mhi/pci_generic.c | 37 +++++++++++++++++++++++++++++++++++
> 1 file changed, 37 insertions(+)
>
> diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
> index eb9263bd1bd8..1773cb3173bc 100644
> --- a/drivers/bus/mhi/pci_generic.c
> +++ b/drivers/bus/mhi/pci_generic.c
> @@ -350,6 +350,40 @@ static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = {
> .sideband_wake = false
> };
>
> +static const struct mhi_channel_config mhi_mv31_channels[] = {
> + MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 64, 0),
> + MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 64, 0),
> + /* MBIM Control Channel */
> + MHI_CHANNEL_CONFIG_UL(12, "MBIM", 64, 0),
> + MHI_CHANNEL_CONFIG_DL(13, "MBIM", 64, 0),
> + /* MBIM Data Channel */
> + MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 512, 2),
> + MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 512, 3),
> +};
> +
> +static struct mhi_event_config mhi_mv31_events[] = {
> + MHI_EVENT_CONFIG_CTRL(0, 256),
> + MHI_EVENT_CONFIG_DATA(1, 256),
> + MHI_EVENT_CONFIG_HW_DATA(2, 1024, 100),
> + MHI_EVENT_CONFIG_HW_DATA(3, 1024, 101)
trailing ',' please.
> +};
> +
> +static const struct mhi_controller_config modem_mv31_config = {
> + .max_channels = 128,
> + .timeout_ms = 20000,
> + .num_channels = ARRAY_SIZE(mhi_mv31_channels),
> + .ch_cfg = mhi_mv31_channels,
> + .num_events = ARRAY_SIZE(mhi_mv31_events),
> + .event_cfg = mhi_mv31_events,
> +};
> +
> +static const struct mhi_pci_dev_info mhi_mv31_info = {
> + .name = "cinterion-mv31",
> + .config = &modem_mv31_config,
> + .bar_num = MHI_PCI_DEFAULT_BAR_NUM,
> + .dma_data_width = 32
Trailing ',' please.
thanks,
greg k-h
next prev parent reply other threads:[~2021-06-24 13:54 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-21 16:16 [PATCH 0/8] MHI patches for v5.14 Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 1/8] bus: mhi: core: Validate channel ID when processing command completions Manivannan Sadhasivam
2021-06-24 13:50 ` Greg KH
2021-06-24 14:32 ` Manivannan Sadhasivam
2021-06-24 14:39 ` Greg KH
2021-06-24 14:47 ` Manivannan Sadhasivam
2021-06-24 15:27 ` Greg KH
2021-06-24 15:56 ` Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 2/8] bus: mhi: core: Fix power down latency Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 3/8] bus: mhi: Wait for M2 state during system resume Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 4/8] bus: mhi: Add inbound buffers allocation flag Manivannan Sadhasivam
2021-06-24 13:51 ` Greg KH
2021-06-24 15:39 ` Loic Poulain
2021-06-24 16:48 ` Greg KH
2021-06-24 19:01 ` Loic Poulain
2021-06-21 16:16 ` [PATCH 5/8] bus: mhi: pci-generic: Add missing 'pci_disable_pcie_error_reporting()' calls Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 6/8] bus: mhi: core: Add support for processing priority of event ring Manivannan Sadhasivam
2021-06-24 13:53 ` Greg KH
2021-06-24 14:24 ` Manivannan Sadhasivam
2021-06-24 14:40 ` Greg KH
2021-06-24 14:50 ` Manivannan Sadhasivam
2021-06-21 16:16 ` [PATCH 7/8] bus: mhi: pci_generic: Apply no-op for wake using sideband wake boolean Manivannan Sadhasivam
2021-06-24 13:54 ` Greg KH
2021-06-21 16:16 ` [PATCH 8/8] bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI Manivannan Sadhasivam
2021-06-24 13:54 ` Greg KH [this message]
2021-06-24 13:54 ` [PATCH 0/8] MHI patches for v5.14 Greg KH
2021-06-24 14:20 ` Manivannan Sadhasivam
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