From: Peter Zijlstra <peterz@infradead.org>
To: Barry Song <21cnbao@gmail.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>,
LKML <linux-kernel@vger.kernel.org>,
linux-tip-commits@vger.kernel.org,
Tim Chen <tim.c.chen@linux.intel.com>,
Barry Song <song.bao.hua@hisilicon.com>, x86 <x86@kernel.org>
Subject: Re: [tip: sched/core] sched: Add cluster scheduler level for x86
Date: Thu, 21 Oct 2021 15:22:58 +0200 [thread overview]
Message-ID: <YXFpsiw16OeQEtFQ@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <CAGsJ_4xNYz8ZpLz_1Fyd-FzTWG9HuoONqCGApX+to5Zpw5P67g@mail.gmail.com>
On Thu, Oct 21, 2021 at 11:32:36PM +1300, Barry Song wrote:
> On Thu, Oct 21, 2021 at 9:43 AM Peter Zijlstra <peterz@infradead.org> wrote:
> >
> > On Wed, Oct 20, 2021 at 10:36:19PM +0200, Peter Zijlstra wrote:
> >
> > > OK, I think I see what's happening.
> > >
> > > AFAICT cacheinfo.c does *NOT* set l2c_id on AMD/Hygon hardware, this
> > > means it's set to BAD_APICID.
> > >
> > > This then results in match_l2c() to never match. And as a direct
> > > consequence set_cpu_sibling_map() will generate cpu_l2c_shared_mask with
> > > just the one CPU set.
> > >
> > > And we have the above result and things come unstuck if we assume:
> > > SMT <= L2 <= LLC
> > >
> > > Now, the big question, how to fix this... Does AMD have means of
> > > actually setting l2c_id or should we fall back to using match_smt() for
> > > l2c_id == BAD_APICID ?
> >
> > The latter looks something like the below and ought to make EPYC at
> > least function as it did before.
> >
> >
> > ---
> > arch/x86/kernel/smpboot.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
> > index 849159797101..c2671b2333d1 100644
> > --- a/arch/x86/kernel/smpboot.c
> > +++ b/arch/x86/kernel/smpboot.c
> > @@ -472,7 +472,7 @@ static bool match_l2c(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
> >
> > /* Do not match if we do not have a valid APICID for cpu: */
> > if (per_cpu(cpu_l2c_id, cpu1) == BAD_APICID)
> > - return false;
> > + return match_smt(c, o); /* assume at least SMT shares L2 */
>
> Rather than making a fake cluster_cpus and cluster_cpus_list which
> will expose to userspace
> through /sys/devices/cpus/cpux/topology, could we just fix the
> sched_domain mask by the
> below?
I don't think it's fake; SMT fundamentally has to share all cache
levels. And having the sched domains differ in setup from the reported
(nonsensical) topology also isn't appealing.
next prev parent reply other threads:[~2021-10-21 13:25 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-24 8:51 [PATCH RESEND 0/3] Represent cluster topology and enable load balance between clusters Barry Song
2021-09-24 8:51 ` [PATCH RESEND 1/3] topology: Represent clusters of CPUs within a die Barry Song
2021-10-05 16:33 ` Valentin Schneider
2021-10-05 20:43 ` Barry Song
2021-10-06 10:50 ` Barry Song
2021-10-06 12:18 ` Peter Zijlstra
2021-10-06 12:50 ` Barry Song
2021-10-06 13:55 ` Peter Zijlstra
2021-10-07 10:30 ` Barry Song
2021-10-07 10:35 ` Peter Zijlstra
2021-10-06 13:49 ` Valentin Schneider
2021-10-15 9:44 ` [tip: sched/core] " tip-bot2 for Jonathan Cameron
2021-09-24 8:51 ` [PATCH RESEND 2/3] scheduler: Add cluster scheduler level in core and related Kconfig for ARM64 Barry Song
2021-10-05 7:35 ` Peter Zijlstra
2021-10-05 9:01 ` Barry Song
2021-10-05 10:40 ` Peter Zijlstra
2021-09-24 8:51 ` [PATCH RESEND 3/3] scheduler: Add cluster scheduler level for x86 Barry Song
2021-10-15 9:44 ` [tip: sched/core] sched: " tip-bot2 for Tim Chen
2021-10-20 13:12 ` Tom Lendacky
2021-10-20 19:51 ` Peter Zijlstra
2021-10-20 20:08 ` Tom Lendacky
2021-10-20 20:25 ` Peter Zijlstra
2021-10-20 20:36 ` Peter Zijlstra
2021-10-20 20:40 ` Tom Lendacky
2021-10-20 20:40 ` Peter Zijlstra
2021-10-20 20:51 ` Tom Lendacky
2021-10-21 10:32 ` Barry Song
2021-10-21 10:54 ` Barry Song
2021-10-21 13:22 ` Peter Zijlstra [this message]
2021-10-21 22:23 ` Song Bao Hua (Barry Song)
2021-10-22 13:31 ` Tom Lendacky
2021-10-22 13:36 ` Peter Zijlstra
2021-10-01 10:32 ` [PATCH RESEND 0/3] Represent cluster topology and enable load balance between clusters Barry Song
2021-10-01 10:39 ` Vincent Guittot
2021-10-01 14:57 ` Peter Zijlstra
2021-10-01 23:22 ` Tim Chen
2021-10-02 7:09 ` Barry Song
2021-10-04 22:54 ` Tim Chen
2021-10-05 7:54 ` Peter Zijlstra
2021-10-05 8:04 ` Peter Zijlstra
2021-10-05 9:06 ` Barry Song
2021-10-05 7:50 ` Peter Zijlstra
2021-10-05 9:15 ` Barry Song
2021-10-05 10:58 ` Peter Zijlstra
2021-10-05 13:42 ` Valentin Schneider
2021-10-05 13:50 ` Valentin Schneider
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