From: Sean Christopherson <seanjc@google.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
jpoimboe@redhat.com, mark.rutland@arm.com, dvyukov@google.com,
pbonzini@redhat.com, mbenes@suse.cz
Subject: Re: [RFC][PATCH 07/22] x86,extable: Extend extable functionality
Date: Fri, 5 Nov 2021 19:47:22 +0000 [thread overview]
Message-ID: <YYWKSmHkgdMA2euh@google.com> (raw)
In-Reply-To: <20211105193229.GP174703@worktop.programming.kicks-ass.net>
On Fri, Nov 05, 2021, Peter Zijlstra wrote:
> On Fri, Nov 05, 2021 at 07:17:20PM +0000, Sean Christopherson wrote:
> > On Fri, Nov 05, 2021, Peter Zijlstra wrote:
> > > On Fri, Nov 05, 2021 at 05:32:14PM +0000, Sean Christopherson wrote:
> > >
> > > > > +#define EX_IMM_MASK 0xFFFF0000
> > >
> > > > > + imm = FIELD_GET(EX_IMM_MASK, e->type);
> > > >
> > > > FIELD_GET casts the result based on the type of the mask, but doesn't explicitly
> > > > sign extend the masked field, i.e. there's no intermediate cast to tell the compiler
> > > > that the imm is a 16-bit value that should be sign extended.
> > > >
> > > > Modifying FIELD_GET to sign extended is probably a bad idea as I'm guessing the
> > > > vast, vast majority of use cases don't want that behavior. I'm not sure how that
> > > > would even work with masks that are e.g. 5 bits or so.
> > >
> > > So the way I was reading it was that typeof(_mask) is 'int', e->type is
> > > also 'int', we mask out the top bits, and since it's all 'int' we do an
> > > arith shift right (ie. preserves sign).
> > >
> > > Where did that reading go wrong?
> >
> > Hmm, C99 standard says that right shift with a negative value is implementation
> > specific:
>
> C99 is sodding daft wrt signed values. That's why we force -fwrapv and
> say signed is 2s complement and expect sanity.
FWIW, -fwrapv was supplanted by -fno-strict-overflow back in 2009 by commit
a137802ee839 ("Don't use '-fwrapv' compiler option: it's buggy in gcc-4.1.x").
But I don't think that matters because AFAICT both apply only to "addition,
subtraction and multiplication".
> > gcc-10 generates a bare "shr", i.e. doesn't special case negative values, and "shr"
> > is explicitly defined as an unsigned divide.
>
> We hard rely on signed shift right to preserve sign all over the place,
> how come it goes sideways here? Lemme go stare at asm...
Huh. TIL there's actually a use case for this.
Anyways, I think the issue is that EX_IMM_MASK is being interpreted as an unsigned
value by the compiler. Which I think is legal for a 64-bit kernel? Because bit 63
is the MSB, not bit 31. E.g. this
FIELD_GET((int)EX_IMM_MASK, e->type)
generates SAR instead of SHR.
next prev parent reply other threads:[~2021-11-05 19:47 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-04 16:47 [RFC][PATCH 00/22] x86: Remove anonymous out-of-line fixups Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 01/22] bitfield.h: Fix "type of reg too small for mask" test Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 02/22] x86,mmx_32: Remove .fixup usage Peter Zijlstra
2021-11-04 18:00 ` Borislav Petkov
2021-11-05 11:20 ` David Laight
2021-11-04 20:22 ` Josh Poimboeuf
2021-11-05 8:05 ` Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 03/22] x86,copy_user_64: " Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 04/22] x86,copy_mc_64: " Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 05/22] x86,entry_64: " Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 06/22] x86,entry_32: " Peter Zijlstra
2021-11-04 20:39 ` Josh Poimboeuf
2021-11-05 7:43 ` Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 07/22] x86,extable: Extend extable functionality Peter Zijlstra
2021-11-04 21:49 ` Josh Poimboeuf
2021-11-05 7:54 ` Peter Zijlstra
2021-11-05 10:16 ` Mark Rutland
2021-11-05 17:32 ` Sean Christopherson
2021-11-05 18:45 ` Peter Zijlstra
2021-11-05 19:17 ` Sean Christopherson
2021-11-05 19:32 ` Peter Zijlstra
2021-11-05 19:47 ` Sean Christopherson [this message]
2021-11-05 20:15 ` Peter Zijlstra
2021-11-05 20:26 ` Peter Zijlstra
2021-11-05 22:30 ` Sean Christopherson
2021-11-04 16:47 ` [RFC][PATCH 08/22] x86,msr: Remove .fixup usage Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 09/22] x86,futex: " Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 10/22] x86,uaccess: " Peter Zijlstra
2021-11-04 22:28 ` Josh Poimboeuf
2021-11-04 16:47 ` [RFC][PATCH 11/22] x86,xen: " Peter Zijlstra
2021-11-04 22:31 ` Josh Poimboeuf
2021-11-05 7:56 ` Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 12/22] x86,fpu: " Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 13/22] x86,segment: " Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 14/22] x86,ftrace: " Peter Zijlstra
2021-11-04 22:35 ` Josh Poimboeuf
2021-11-05 7:57 ` Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 15/22] x86,vmx: " Peter Zijlstra
2021-11-04 18:50 ` Paolo Bonzini
2021-11-05 18:17 ` Sean Christopherson
2021-11-05 18:52 ` Peter Zijlstra
2021-11-05 20:58 ` Peter Zijlstra
2021-11-05 22:29 ` Sean Christopherson
2021-11-06 7:05 ` Paolo Bonzini
2021-11-06 8:36 ` Peter Zijlstra
2021-11-07 19:13 ` Paolo Bonzini
2021-11-06 8:28 ` Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 16/22] x86,checksum_32: " Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 17/22] x86,sgx: " Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 18/22] x86,kvm: " Peter Zijlstra
2021-11-04 18:50 ` Paolo Bonzini
2021-11-05 7:58 ` Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 19/22] x86,usercopy_32: Simplify Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 20/22] x86,usercopy: Remove .fixup usage Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 21/22] x86,word-at-a-time: " Peter Zijlstra
2021-11-04 23:33 ` Josh Poimboeuf
2021-11-05 8:04 ` Peter Zijlstra
2021-11-04 16:47 ` [RFC][PATCH 22/22] x86: Remove .fixup section Peter Zijlstra
2021-11-04 23:00 ` Josh Poimboeuf
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