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From: Andrew Lunn <andrew@lunn.ch>
To: "Wells Lu 呂芳騰" <wells.lu@sunplus.com>
Cc: Wells Lu <wellslutw@gmail.com>,
	"davem@davemloft.net" <davem@davemloft.net>,
	"kuba@kernel.org" <kuba@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>
Subject: Re: [PATCH 2/2] net: ethernet: Add driver for Sunplus SP7021
Date: Tue, 9 Nov 2021 16:32:33 +0100	[thread overview]
Message-ID: <YYqUkfepXZzGpR3w@lunn.ch> (raw)
In-Reply-To: <941aabfafa674999b2c0f4fc88025518@sphcmbx02.sunplus.com.tw>

> I don't know how to implement STP in L2 switch like SP7021.

That is the nice thing about using Linux. It already knows how to
implement STP. The bridge will do it for you. You just need to add the
callbacks in the driver which are needed. Please take a look at other
switchdev drivers.

> If this is acceptable, I'd like to have Ethernet of SP7021 have two operation 
> modes:
>  - Dual NIC mode
>  - Single NIC with 2-port frame-flooding hub mode

No, sorry. Do it correctly, or do not do it. Please start with a clean
driver doing Dual NIC mode. You can add L2 support later, once you
have done the research to understand switchdev, etc.

> RMII pins of PHY ports of SP7021 are multiplexable. I'd like to switch RMII 
> pins of the second PHY for other use if single NIC mode is used.
> In fact, some SP7021 boards have dual Ethernet and some have only one
> Ethernet. We really need the two operation modes.

Only using a subset of ports in a switch is common. The common binding
for DSA switches is described in:

Documentation/devicetree/bindings/net/dsa/dsa.yaml and for example
Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml is
a memory mapped switch. Notice the reg numbers:

           ethernet-ports {
                #address-cells = <1>;
                #size-cells = <0>;

                port@0 {
                    reg = <0>;
                    label = "cpu";
                    ethernet = <&gmac0>;
                };

                port@2 {
                    reg = <2>;
                    label = "lan0";
                    phy-handle = <&phy1>;
                };

reg = <1> is missing in this example. Port 1 of the switch is not
used. You can do the same with a 2 port switch, when you don't want to
make use of a port. Just don't list it in DT.

> After looking up some data, I find RMC means reserved multi-cast.
> RMC packets means packets with DA = 0x0180c2000000, 0x0180c2000002 ~ 0x0180c200000f,
> except the PAUSE packet (DA = 0x0180c2000001)

Ah, good. BPDUs use 01:80:C2:00:00:00. So they will be passed when the
port is in blocking mode. PTP uses 01:80:C2:00:00:0E. So the hardware
designers appear to of designed a proper L2 switch with everything you
need for a managed switch. What is missing is software. The more i
learn about this hardware, the more i've convinced you need to write
proper Linux support for it, not your mode hacks.

    Andrew

  reply	other threads:[~2021-11-09 15:32 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-03 11:02 [PATCH 0/2] This is a patch series of ethernet driver for Sunplus SP7021 SoC Wells Lu
2021-11-03 11:02 ` [PATCH 1/2] devicetree: bindings: net: Add bindings doc for Sunplus SP7021 Wells Lu
2021-11-03 11:02 ` [PATCH 2/2] net: ethernet: Add driver " Wells Lu
2021-11-03 12:05   ` Denis Kirjanov
2021-11-03 14:08     ` Wells Lu 呂芳騰
2021-11-03 12:10   ` Philipp Zabel
2021-11-03 15:11     ` Wells Lu 呂芳騰
2021-11-03 15:52   ` Randy Dunlap
2021-11-03 18:08     ` Wells Lu 呂芳騰
2021-11-03 19:30       ` Andrew Lunn
2021-11-04  5:31         ` Wells Lu 呂芳騰
2021-11-04 12:59           ` Andrew Lunn
2021-11-04 14:55             ` Randy Dunlap
2021-11-04 17:51               ` Wells Lu 呂芳騰
2021-11-04 17:46             ` Wells Lu 呂芳騰
2021-11-04 18:21               ` Andrew Lunn
2021-11-04 19:03                 ` Wells Lu 呂芳騰
2021-11-03 20:26       ` Randy Dunlap
2021-11-03 16:51   ` Andrew Lunn
2021-11-05 11:25     ` Wells Lu 呂芳騰
2021-11-05 13:37       ` Andrew Lunn
2021-11-08  9:37         ` Wells Lu 呂芳騰
2021-11-08 13:15           ` Andrew Lunn
2021-11-08 14:26             ` Wells Lu 呂芳騰
2021-11-08 14:52               ` Andrew Lunn
2021-11-08 16:47                 ` Wells Lu 呂芳騰
2021-11-08 17:32                   ` Andrew Lunn
2021-11-09 14:39                     ` Wells Lu 呂芳騰
2021-11-09 15:32                       ` Andrew Lunn [this message]
2021-11-09 17:05                         ` Wells Lu 呂芳騰
2021-11-14 19:19   ` Pavel Skripkin
2021-11-17  9:28     ` Wells Lu 呂芳騰
2021-11-03 11:27 ` [PATCH 0/2] This is a patch series of ethernet driver for Sunplus SP7021 SoC Denis Kirjanov
2021-11-11  9:04 ` [PATCH v2 0/2] This is a patch series for pinctrl " Wells Lu
2021-11-11  9:04   ` [PATCH v2 1/2] devicetree: bindings: net: Add bindings doc for Sunplus SP7021 Wells Lu
2021-11-11 14:57     ` Rob Herring
2021-11-12  2:57       ` Wells Lu 呂芳騰
2021-11-11 18:23     ` Andrew Lunn
2021-11-12  2:50       ` Wells Lu 呂芳騰
2021-11-11  9:04   ` [PATCH v2 2/2] net: ethernet: Add driver " Wells Lu
2021-11-11 11:31     ` Denis Kirjanov
2021-11-13 14:22       ` Wells Lu 呂芳騰
2021-11-13 15:34         ` Andrew Lunn
2021-11-18  8:15           ` Wells Lu 呂芳騰
2021-11-12 17:42     ` kernel test robot
2021-11-12 23:16     ` Florian Fainelli
2021-11-12 23:24       ` Andrew Lunn
2021-11-15 14:38         ` Wells Lu 呂芳騰
2021-11-14 18:59       ` Wells Lu 呂芳騰
2021-11-12 23:58     ` Andrew Lunn
2021-11-16 17:09       ` Wells Lu 呂芳騰
2021-11-16 22:15         ` Andrew Lunn
2021-11-18  8:22           ` Wells Lu 呂芳騰
2021-11-25 11:28       ` Wells Lu 呂芳騰
2021-11-25 15:20         ` Andrew Lunn
2021-11-26  3:56           ` Wells Lu 呂芳騰
2021-11-26 14:38             ` Andrew Lunn
2021-11-26 16:12               ` Wells Lu 呂芳騰
2021-11-26 18:07                 ` Andrew Lunn
2021-11-26 19:13                   ` Wells Lu 呂芳騰
2021-11-26 19:32                     ` Andrew Lunn
2021-11-29 11:16                       ` Wells Lu 呂芳騰

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