From: Andrew Lunn <andrew@lunn.ch>
To: "Wells Lu 呂芳騰" <wells.lu@sunplus.com>
Cc: "Wells Lu" <wellslutw@gmail.com>,
"davem@davemloft.net" <davem@davemloft.net>,
"kuba@kernel.org" <kuba@kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"Vincent Shih 施錕鴻" <vincent.shih@sunplus.com>
Subject: Re: [PATCH v2 2/2] net: ethernet: Add driver for Sunplus SP7021
Date: Fri, 26 Nov 2021 20:32:40 +0100 [thread overview]
Message-ID: <YaE2WJibNCQAHBwz@lunn.ch> (raw)
In-Reply-To: <b41b754050a14c598b723825ab277322@sphcmbx02.sunplus.com.tw>
On Fri, Nov 26, 2021 at 07:13:23PM +0000, Wells Lu 呂芳騰 wrote:
> Hi Andrew,
>
> I read specification of ICPlus IP101G (10M/100M PHY).
> Bits of register 0 (control) and register 1 (status)
> are R/W or RO type. They will not be cleared after
> read. No matter how many times they are read, the
> read-back value is the same.
Please read 802.3,
Section 22.2.4.2: Status register (Register 1)
Table 22-8 Status register bit definitions
Bit 1.2 Link Status is marked as RO/LL, meaning read only Latching
low.
> Can we go with this approach?
You need to not make any read on the PHY which Linux is driving.
Configure the hardware to read on an address where there is no PHY.
Andrew
next prev parent reply other threads:[~2021-11-26 19:34 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-03 11:02 [PATCH 0/2] This is a patch series of ethernet driver for Sunplus SP7021 SoC Wells Lu
2021-11-03 11:02 ` [PATCH 1/2] devicetree: bindings: net: Add bindings doc for Sunplus SP7021 Wells Lu
2021-11-03 11:02 ` [PATCH 2/2] net: ethernet: Add driver " Wells Lu
2021-11-03 12:05 ` Denis Kirjanov
2021-11-03 14:08 ` Wells Lu 呂芳騰
2021-11-03 12:10 ` Philipp Zabel
2021-11-03 15:11 ` Wells Lu 呂芳騰
2021-11-03 15:52 ` Randy Dunlap
2021-11-03 18:08 ` Wells Lu 呂芳騰
2021-11-03 19:30 ` Andrew Lunn
2021-11-04 5:31 ` Wells Lu 呂芳騰
2021-11-04 12:59 ` Andrew Lunn
2021-11-04 14:55 ` Randy Dunlap
2021-11-04 17:51 ` Wells Lu 呂芳騰
2021-11-04 17:46 ` Wells Lu 呂芳騰
2021-11-04 18:21 ` Andrew Lunn
2021-11-04 19:03 ` Wells Lu 呂芳騰
2021-11-03 20:26 ` Randy Dunlap
2021-11-03 16:51 ` Andrew Lunn
2021-11-05 11:25 ` Wells Lu 呂芳騰
2021-11-05 13:37 ` Andrew Lunn
2021-11-08 9:37 ` Wells Lu 呂芳騰
2021-11-08 13:15 ` Andrew Lunn
2021-11-08 14:26 ` Wells Lu 呂芳騰
2021-11-08 14:52 ` Andrew Lunn
2021-11-08 16:47 ` Wells Lu 呂芳騰
2021-11-08 17:32 ` Andrew Lunn
2021-11-09 14:39 ` Wells Lu 呂芳騰
2021-11-09 15:32 ` Andrew Lunn
2021-11-09 17:05 ` Wells Lu 呂芳騰
2021-11-14 19:19 ` Pavel Skripkin
2021-11-17 9:28 ` Wells Lu 呂芳騰
2021-11-03 11:27 ` [PATCH 0/2] This is a patch series of ethernet driver for Sunplus SP7021 SoC Denis Kirjanov
2021-11-11 9:04 ` [PATCH v2 0/2] This is a patch series for pinctrl " Wells Lu
2021-11-11 9:04 ` [PATCH v2 1/2] devicetree: bindings: net: Add bindings doc for Sunplus SP7021 Wells Lu
2021-11-11 14:57 ` Rob Herring
2021-11-12 2:57 ` Wells Lu 呂芳騰
2021-11-11 18:23 ` Andrew Lunn
2021-11-12 2:50 ` Wells Lu 呂芳騰
2021-11-11 9:04 ` [PATCH v2 2/2] net: ethernet: Add driver " Wells Lu
2021-11-11 11:31 ` Denis Kirjanov
2021-11-13 14:22 ` Wells Lu 呂芳騰
2021-11-13 15:34 ` Andrew Lunn
2021-11-18 8:15 ` Wells Lu 呂芳騰
2021-11-12 17:42 ` kernel test robot
2021-11-12 23:16 ` Florian Fainelli
2021-11-12 23:24 ` Andrew Lunn
2021-11-15 14:38 ` Wells Lu 呂芳騰
2021-11-14 18:59 ` Wells Lu 呂芳騰
2021-11-12 23:58 ` Andrew Lunn
2021-11-16 17:09 ` Wells Lu 呂芳騰
2021-11-16 22:15 ` Andrew Lunn
2021-11-18 8:22 ` Wells Lu 呂芳騰
2021-11-25 11:28 ` Wells Lu 呂芳騰
2021-11-25 15:20 ` Andrew Lunn
2021-11-26 3:56 ` Wells Lu 呂芳騰
2021-11-26 14:38 ` Andrew Lunn
2021-11-26 16:12 ` Wells Lu 呂芳騰
2021-11-26 18:07 ` Andrew Lunn
2021-11-26 19:13 ` Wells Lu 呂芳騰
2021-11-26 19:32 ` Andrew Lunn [this message]
2021-11-29 11:16 ` Wells Lu 呂芳騰
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