linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] clk: imx8mn: Fix imx8mn_clko1_sels
@ 2021-11-17 13:32 Adam Ford
  2021-11-17 14:41 ` Fabio Estevam
  2021-11-22 13:32 ` Abel Vesa
  0 siblings, 2 replies; 3+ messages in thread
From: Adam Ford @ 2021-11-17 13:32 UTC (permalink / raw)
  To: linux-clk
  Cc: aford, cstevens, Adam Ford, Abel Vesa, Michael Turquette,
	Stephen Boyd, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
	Fabio Estevam, NXP Linux Team, Anson Huang,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
	open list

When attempting to use sys_pll1_80m as the parent for clko1, the
system hangs.  This is due to the fact that the source select
for sys_pll1_80m was incorrectly pointing to m7_alt_pll_clk, which
doesn't yet exist.

According to Rev 3 of the TRM, The imx8mn_clko1_sels also incorrectly
references an osc_27m which does not exist, nor does an entry for
source select bits 010b.  Fix both by inserting a dummy clock into
the missing space in the table and renaming the incorrectly name clock
with dummy.

Fixes: 96d6392b54db ("clk: imx: Add support for i.MX8MN clock driver")
Signed-off-by: Adam Ford <aford173@gmail.com>

diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index c55577604e16..021355a24708 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -277,9 +277,9 @@ static const char * const imx8mn_pdm_sels[] = {"osc_24m", "sys_pll2_100m", "audi
 
 static const char * const imx8mn_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
 
-static const char * const imx8mn_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "osc_27m",
-						 "sys_pll1_200m", "audio_pll2_out", "vpu_pll",
-						 "sys_pll1_80m", };
+static const char * const imx8mn_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "dummy",
+						 "sys_pll1_200m", "audio_pll2_out", "sys_pll2_500m",
+						 "dummy", "sys_pll1_80m", };
 static const char * const imx8mn_clko2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_400m",
 						 "sys_pll2_166m", "sys_pll3_out", "audio_pll1_out",
 						 "video_pll1_out", "osc_32k", };
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] clk: imx8mn: Fix imx8mn_clko1_sels
  2021-11-17 13:32 [PATCH] clk: imx8mn: Fix imx8mn_clko1_sels Adam Ford
@ 2021-11-17 14:41 ` Fabio Estevam
  2021-11-22 13:32 ` Abel Vesa
  1 sibling, 0 replies; 3+ messages in thread
From: Fabio Estevam @ 2021-11-17 14:41 UTC (permalink / raw)
  To: Adam Ford
  Cc: linux-clk, Adam Ford-BE, cstevens, Abel Vesa, Michael Turquette,
	Stephen Boyd, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
	NXP Linux Team, Anson Huang,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
	open list

On Wed, Nov 17, 2021 at 10:32 AM Adam Ford <aford173@gmail.com> wrote:
>
> When attempting to use sys_pll1_80m as the parent for clko1, the
> system hangs.  This is due to the fact that the source select
> for sys_pll1_80m was incorrectly pointing to m7_alt_pll_clk, which
> doesn't yet exist.
>
> According to Rev 3 of the TRM, The imx8mn_clko1_sels also incorrectly
> references an osc_27m which does not exist, nor does an entry for
> source select bits 010b.  Fix both by inserting a dummy clock into
> the missing space in the table and renaming the incorrectly name clock
> with dummy.
>
> Fixes: 96d6392b54db ("clk: imx: Add support for i.MX8MN clock driver")
> Signed-off-by: Adam Ford <aford173@gmail.com>

Reviewed-by: Fabio Estevam <festevam@gmail.com>

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] clk: imx8mn: Fix imx8mn_clko1_sels
  2021-11-17 13:32 [PATCH] clk: imx8mn: Fix imx8mn_clko1_sels Adam Ford
  2021-11-17 14:41 ` Fabio Estevam
@ 2021-11-22 13:32 ` Abel Vesa
  1 sibling, 0 replies; 3+ messages in thread
From: Abel Vesa @ 2021-11-22 13:32 UTC (permalink / raw)
  To: Adam Ford
  Cc: linux-clk, aford, cstevens, Michael Turquette, Stephen Boyd,
	Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
	NXP Linux Team, Anson Huang,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
	open list

On 21-11-17 07:32:02, Adam Ford wrote:
> When attempting to use sys_pll1_80m as the parent for clko1, the
> system hangs.  This is due to the fact that the source select
> for sys_pll1_80m was incorrectly pointing to m7_alt_pll_clk, which
> doesn't yet exist.
> 
> According to Rev 3 of the TRM, The imx8mn_clko1_sels also incorrectly
> references an osc_27m which does not exist, nor does an entry for
> source select bits 010b.  Fix both by inserting a dummy clock into
> the missing space in the table and renaming the incorrectly name clock
> with dummy.
> 
> Fixes: 96d6392b54db ("clk: imx: Add support for i.MX8MN clock driver")
> Signed-off-by: Adam Ford <aford173@gmail.com>
> 

Applied, thanks.

> diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
> index c55577604e16..021355a24708 100644
> --- a/drivers/clk/imx/clk-imx8mn.c
> +++ b/drivers/clk/imx/clk-imx8mn.c
> @@ -277,9 +277,9 @@ static const char * const imx8mn_pdm_sels[] = {"osc_24m", "sys_pll2_100m", "audi
>  
>  static const char * const imx8mn_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
>  
> -static const char * const imx8mn_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "osc_27m",
> -						 "sys_pll1_200m", "audio_pll2_out", "vpu_pll",
> -						 "sys_pll1_80m", };
> +static const char * const imx8mn_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "dummy",
> +						 "sys_pll1_200m", "audio_pll2_out", "sys_pll2_500m",
> +						 "dummy", "sys_pll1_80m", };
>  static const char * const imx8mn_clko2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_400m",
>  						 "sys_pll2_166m", "sys_pll3_out", "audio_pll1_out",
>  						 "video_pll1_out", "osc_32k", };
> -- 
> 2.32.0
>

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-11-22 13:32 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-11-17 13:32 [PATCH] clk: imx8mn: Fix imx8mn_clko1_sels Adam Ford
2021-11-17 14:41 ` Fabio Estevam
2021-11-22 13:32 ` Abel Vesa

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).