[PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode Plus and High Speed Mode

[PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode Plus and High Speed Mode

[lakshmi.sowjanya.d]

From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>

Add support to configure HCNT, LCNT values for Fast Mode Plus and High
Speed Mode.

Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
---
 drivers/i2c/busses/i2c-designware-pcidrv.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index 0f409a4c2da0..174938fc7a7e 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -41,8 +41,12 @@ enum dw_pci_ctl_id_t {
 struct dw_scl_sda_cfg {
 	u32 ss_hcnt;
 	u32 fs_hcnt;
+	u32 fp_hcnt;
+	u32 hs_hcnt;
 	u32 ss_lcnt;
 	u32 fs_lcnt;
+	u32 fp_lcnt;
+	u32 hs_lcnt;
 	u32 sda_hold;
 };
 
@@ -306,8 +310,12 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev,
 		cfg = controller->scl_sda_cfg;
 		dev->ss_hcnt = cfg->ss_hcnt;
 		dev->fs_hcnt = cfg->fs_hcnt;
+		dev->fp_hcnt = cfg->fp_hcnt;
+		dev->hs_hcnt = cfg->hs_hcnt;
 		dev->ss_lcnt = cfg->ss_lcnt;
 		dev->fs_lcnt = cfg->fs_lcnt;
+		dev->fp_lcnt = cfg->fp_lcnt;
+		dev->hs_lcnt = cfg->hs_lcnt;
 		dev->sda_hold_time = cfg->sda_hold;
 	}
 
-- 
2.17.1

[PATCH v1 2/2] i2c: designware-pci: Set ideal timing parameters for Elkhart Lake PSE

[lakshmi.sowjanya.d]

From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>

Set optimal HCNT, LCNT and hold time values for all the speeds supported
in Intel Programmable Service Engine I2C controller in Intel Elkhart
Lake.

Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
---
 drivers/i2c/busses/i2c-designware-pcidrv.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index 174938fc7a7e..3418148f8bb5 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -84,6 +84,19 @@ static struct dw_scl_sda_cfg hsw_config = {
 	.sda_hold = 0x9,
 };
 
+/* Elkhart Lake HCNT/LCNT/SDA hold time */
+static struct dw_scl_sda_cfg ehl_config = {
+	.ss_hcnt = 0x190,
+	.fs_hcnt = 0x4E,
+	.fp_hcnt = 0x1A,
+	.hs_hcnt = 0x1F,
+	.ss_lcnt = 0x1d6,
+	.fs_lcnt = 0x96,
+	.fp_lcnt = 0x32,
+	.hs_lcnt = 0x36,
+	.sda_hold = 0x1E,
+};
+
 /* NAVI-AMD HCNT/LCNT/SDA hold time */
 static struct dw_scl_sda_cfg navi_amd_config = {
 	.ss_hcnt = 0x1ae,
@@ -200,6 +213,7 @@ static struct dw_pci_controller dw_pci_controllers[] = {
 	},
 	[elkhartlake] = {
 		.bus_num = -1,
+		.scl_sda_cfg = &ehl_config,
 		.get_clk_rate_khz = ehl_get_clk_rate_khz,
 	},
 	[navi_amd] = {
-- 
2.17.1

Re: [PATCH v1 2/2] i2c: designware-pci: Set ideal timing parameters for Elkhart Lake PSE

[Jarkko Nikula]

On 11/9/21 12:35 PM, lakshmi.sowjanya.d@intel.com wrote:
> From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
> 
> Set optimal HCNT, LCNT and hold time values for all the speeds supported
> in Intel Programmable Service Engine I2C controller in Intel Elkhart
> Lake.
> 
> Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
> ---
>   drivers/i2c/busses/i2c-designware-pcidrv.c | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
> 
To both:

Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>

Re: [PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode Plus and High Speed Mode

[Wolfram Sang]

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On Tue, Nov 09, 2021 at 04:05:51PM +0530, lakshmi.sowjanya.d@intel.com wrote:
> From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
> 
> Add support to configure HCNT, LCNT values for Fast Mode Plus and High
> Speed Mode.
> 
> Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>

Applied to for-next, thanks!

> +	u32 fp_lcnt;
> +	u32 hs_lcnt;
>  	u32 sda_hold;

Short question unrelated to this patch. Why are all these u32...

>  		dev->ss_hcnt = cfg->ss_hcnt;
>  		dev->fs_hcnt = cfg->fs_hcnt;

... and the ones in dev are u16? Wouldn't it be easier if they all had
the same type?


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Re: [PATCH v1 2/2] i2c: designware-pci: Set ideal timing parameters for Elkhart Lake PSE

[Wolfram Sang]

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On Tue, Nov 09, 2021 at 04:05:52PM +0530, lakshmi.sowjanya.d@intel.com wrote:
> From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
> 
> Set optimal HCNT, LCNT and hold time values for all the speeds supported
> in Intel Programmable Service Engine I2C controller in Intel Elkhart
> Lake.
> 
> Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>

Applied to for-next, thanks!


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Re: [PATCH v1 2/2] i2c: designware-pci: Set ideal timing parameters for Elkhart Lake PSE

[Wolfram Sang]

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Hi Jarkko,

> To both:

If it is not causing too much trouble for you, I'd appreciate if you
could ack patches separately. This gives me a better overview in
patchwork which series are completely checked.

Thanks and happy hacking,

   Wolfram


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Re: [PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode Plus and High Speed Mode

[Jarkko Nikula]

On 11/29/21 6:56 PM, Wolfram Sang wrote:
> On Tue, Nov 09, 2021 at 04:05:51PM +0530, lakshmi.sowjanya.d@intel.com wrote:
>> From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
>>
>> Add support to configure HCNT, LCNT values for Fast Mode Plus and High
>> Speed Mode.
>>
>> Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
> 
> Applied to for-next, thanks!
> 
>> +	u32 fp_lcnt;
>> +	u32 hs_lcnt;
>>   	u32 sda_hold;
> 
> Short question unrelated to this patch. Why are all these u32...
> 
>>   		dev->ss_hcnt = cfg->ss_hcnt;
>>   		dev->fs_hcnt = cfg->fs_hcnt;
> 
> ... and the ones in dev are u16? Wouldn't it be easier if they all had
> the same type?
> 
True, only sda_hold(_time) is u32 and other timing parameters are u16.

Lakshmi: Would you like to send a patch fixing this and get more 
contributions to the driver :-)

Originally this discrepancy was introduced 2014 by the commit 
8efd1e9ee3bd ("i2c: designware-pci: set ideal HCNT, LCNT and SDA hold 
time value").

Jarkko

Re: [PATCH v1 2/2] i2c: designware-pci: Set ideal timing parameters for Elkhart Lake PSE

[Andy Shevchenko]

On Mon, Nov 29, 2021 at 05:57:03PM +0100, Wolfram Sang wrote:
> On Tue, Nov 09, 2021 at 04:05:52PM +0530, lakshmi.sowjanya.d@intel.com wrote:
> > From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
> > 
> > Set optimal HCNT, LCNT and hold time values for all the speeds supported
> > in Intel Programmable Service Engine I2C controller in Intel Elkhart
> > Lake.
> > 
> > Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
> 
> Applied to for-next, thanks!

Oh là là! Can we revert these, please?

After the commit 64d0a0755c7d ("i2c: designware: Read counters from ACPI for
PCI driver") the PCI driver should get this from ACPI tables, no hard coding
needed anymore. I did that series to address this very issue.

So, Lakshmi, please ask for BIOS fix as we discussed long time ago.

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1 2/2] i2c: designware-pci: Set ideal timing parameters for Elkhart Lake PSE

[Andy Shevchenko]

On Tue, Nov 30, 2021 at 11:14:57AM +0200, Andy Shevchenko wrote:
> On Mon, Nov 29, 2021 at 05:57:03PM +0100, Wolfram Sang wrote:
> > On Tue, Nov 09, 2021 at 04:05:52PM +0530, lakshmi.sowjanya.d@intel.com wrote:
> > > From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
> > > 
> > > Set optimal HCNT, LCNT and hold time values for all the speeds supported
> > > in Intel Programmable Service Engine I2C controller in Intel Elkhart
> > > Lake.
> > > 
> > > Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
> > 
> > Applied to for-next, thanks!
> 
> Oh là là! Can we revert these, please?
> 
> After the commit 64d0a0755c7d ("i2c: designware: Read counters from ACPI for
> PCI driver") the PCI driver should get this from ACPI tables, no hard coding
> needed anymore. I did that series to address this very issue.
> 
> So, Lakshmi, please ask for BIOS fix as we discussed long time ago.

For the record, I have just checked the DSDT dump I have from
Elkhart Lake machine and BIOS provides those counters for devices
\_SB.PCI0.I2C0 .. \_SB.PCI0.I2C5 (6 devices altogether).

So, BIOS is quite aware of the interface and patches are not needed.
I rather add a comment there that these tables in the driver shouldn't
be spread and expanded anymore (at least by Intel).

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1 2/2] i2c: designware-pci: Set ideal timing parameters for Elkhart Lake PSE

[Wolfram Sang]

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> > > Applied to for-next, thanks!
> > 
> > Oh là là! Can we revert these, please?

Okay, both reverted. Thanks for the heads up!

> I rather add a comment there that these tables in the driver shouldn't
> be spread and expanded anymore (at least by Intel).

Please do.


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RE: [PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode Plus and High Speed Mode

[D, Lakshmi Sowjanya]

>-----Original Message-----
>From: Jarkko Nikula <jarkko.nikula@linux.intel.com>
>Sent: Tuesday, November 30, 2021 1:22 PM
>To: Wolfram Sang <wsa@kernel.org>; D, Lakshmi Sowjanya
><lakshmi.sowjanya.d@intel.com>; linux-i2c@vger.kernel.org; linux-
>kernel@vger.kernel.org; Senthil, Bala <bala.senthil@intel.com>; N, Pandith
><pandith.n@intel.com>
>Subject: Re: [PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode
>Plus and High Speed Mode
>
>On 11/29/21 6:56 PM, Wolfram Sang wrote:
>> On Tue, Nov 09, 2021 at 04:05:51PM +0530, lakshmi.sowjanya.d@intel.com
>wrote:
>>> From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
>>>
>>> Add support to configure HCNT, LCNT values for Fast Mode Plus and
>>> High Speed Mode.
>>>
>>> Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
>>
>> Applied to for-next, thanks!
>>
>>> +	u32 fp_lcnt;
>>> +	u32 hs_lcnt;
>>>   	u32 sda_hold;
>>
>> Short question unrelated to this patch. Why are all these u32...
>>
>>>   		dev->ss_hcnt = cfg->ss_hcnt;
>>>   		dev->fs_hcnt = cfg->fs_hcnt;
>>
>> ... and the ones in dev are u16? Wouldn't it be easier if they all had
>> the same type?
>>
>True, only sda_hold(_time) is u32 and other timing parameters are u16.
>
>Lakshmi: Would you like to send a patch fixing this and get more contributions
>to the driver :-)

Thanks Wolfram and Jarkko,

Sure. I will send a patch fixing it.

Thanks,
Lakshmi
>
>Originally this discrepancy was introduced 2014 by the commit 8efd1e9ee3bd
>("i2c: designware-pci: set ideal HCNT, LCNT and SDA hold time value").
>
>Jarkko

Re: [PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode Plus and High Speed Mode

[Jarkko Nikula]

On 12/1/21 7:51 AM, D, Lakshmi Sowjanya wrote:
>> True, only sda_hold(_time) is u32 and other timing parameters are u16.
>>
>> Lakshmi: Would you like to send a patch fixing this and get more contributions
>> to the driver :-)
> 
> Thanks Wolfram and Jarkko,
> 
> Sure. I will send a patch fixing it.
> 
See the comments from Andy. Recent enough Elkhart Lake BIOS and his 
patches from last year already provide the timing parameters. Feeling 
embarrassed I forgot them :-(

Jarkko

Re: [PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode Plus and High Speed Mode

[Wolfram Sang]

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> See the comments from Andy. Recent enough Elkhart Lake BIOS and his patches
> from last year already provide the timing parameters. Feeling embarrassed I
> forgot them :-(

But the u16 conversion of the existing parameters is still useful?


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RE: [PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode Plus and High Speed Mode

[D, Lakshmi Sowjanya]

>-----Original Message-----
>From: Wolfram Sang <wsa@kernel.org>
>Sent: Wednesday, December 1, 2021 2:07 PM
>To: Jarkko Nikula <jarkko.nikula@linux.intel.com>
>Cc: D, Lakshmi Sowjanya <lakshmi.sowjanya.d@intel.com>; linux-
>i2c@vger.kernel.org; linux-kernel@vger.kernel.org; Senthil, Bala
><bala.senthil@intel.com>; N, Pandith <pandith.n@intel.com>; Andy
>Shevchenko <andriy.shevchenko@linux.intel.com>; Saha, Tamal
><tamal.saha@intel.com>
>Subject: Re: [PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode
>Plus and High Speed Mode
>
>
>> See the comments from Andy. Recent enough Elkhart Lake BIOS and his
>> patches from last year already provide the timing parameters. Feeling
>> embarrassed I forgot them :-(
>
>But the u16 conversion of the existing parameters is still useful?

Jarkko: I've seen the changes by Andy. These patches are no more required as suggested. I'm following up on the same, regarding ACPI table entries.

I have the same query...is the u16 conversion of existing parameters still useful?

Regards
Lakshmi Sowjanya D

Re: [PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode Plus and High Speed Mode

[Jarkko Nikula]

On 12/1/21 11:39 AM, D, Lakshmi Sowjanya wrote:
> 
> 
>> -----Original Message-----
>> From: Wolfram Sang <wsa@kernel.org>
>> Sent: Wednesday, December 1, 2021 2:07 PM
>> To: Jarkko Nikula <jarkko.nikula@linux.intel.com>
>> Cc: D, Lakshmi Sowjanya <lakshmi.sowjanya.d@intel.com>; linux-
>> i2c@vger.kernel.org; linux-kernel@vger.kernel.org; Senthil, Bala
>> <bala.senthil@intel.com>; N, Pandith <pandith.n@intel.com>; Andy
>> Shevchenko <andriy.shevchenko@linux.intel.com>; Saha, Tamal
>> <tamal.saha@intel.com>
>> Subject: Re: [PATCH v1 1/2] i2c: designware-pci: Add support for Fast Mode
>> Plus and High Speed Mode
>>
>>
>>> See the comments from Andy. Recent enough Elkhart Lake BIOS and his
>>> patches from last year already provide the timing parameters. Feeling
>>> embarrassed I forgot them :-(
>>
>> But the u16 conversion of the existing parameters is still useful?
> 
> Jarkko: I've seen the changes by Andy. These patches are no more required as suggested. I'm following up on the same, regarding ACPI table entries.
> 
> I have the same query...is the u16 conversion of existing parameters still useful?
> 
Yes, that's useful.

Jarkko