From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: shruthi.sanil@intel.com
Cc: daniel.lezcano@linaro.org, tglx@linutronix.de,
robh+dt@kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, mgross@linux.intel.com,
srikanth.thokala@intel.com,
lakshmi.bai.raja.subramanian@intel.com,
mallikarjunappa.sangannavar@intel.com
Subject: Re: [PATCH v9 2/2] clocksource: Add Intel Keem Bay timer support
Date: Mon, 7 Mar 2022 15:45:06 +0200 [thread overview]
Message-ID: <YiYMYuENpb1VJV9G@smile.fi.intel.com> (raw)
In-Reply-To: <20220307113147.19496-3-shruthi.sanil@intel.com>
On Mon, Mar 07, 2022 at 05:01:47PM +0530, shruthi.sanil@intel.com wrote:
> From: Shruthi Sanil <shruthi.sanil@intel.com>
>
> The Intel Keem Bay timer driver supports clocksource and clockevent
> features for the timer IP used in Intel Keem Bay SoC.
> The timer block supports 1 free running counter and 8 timers.
> The free running counter can be used as a clocksource and
> the timers can be used as clockevent. Each timer is capable of
> generating individual interrupt.
> Both the features are enabled through the timer general config register.
...
> + pr_err("%pOF: FW_BUG: Prescaler is not enabled\n", np);
FW_BUG is a macro. The above is an incorrect use of it.
...
> + pr_err("%pOF: FW_BUG: free running counter is not enabled\n", np);
Ditto.
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2022-03-07 13:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-07 11:31 [PATCH v9 0/2] Add the driver for Intel Keem Bay SoC timer block shruthi.sanil
2022-03-07 11:31 ` [PATCH v9 1/2] dt-bindings: timer: Add bindings for Intel Keem Bay SoC Timer shruthi.sanil
2022-03-07 11:31 ` [PATCH v9 2/2] clocksource: Add Intel Keem Bay timer support shruthi.sanil
2022-03-07 13:45 ` Andy Shevchenko [this message]
2022-03-07 16:33 ` Sanil, Shruthi
2022-03-07 17:21 ` Daniel Lezcano
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