* [PATCH 1/1] soc/tegra: fuse: Add nvmem cell lookup entries for tegra194
@ 2022-03-24 12:08 Sagar Kamble
2022-04-05 12:44 ` Jon Hunter
2022-04-06 12:59 ` Thierry Reding
0 siblings, 2 replies; 3+ messages in thread
From: Sagar Kamble @ 2022-03-24 12:08 UTC (permalink / raw)
To: thierry.reding, jonathanh, digetx, yangyingliang, ndesaulniers,
pshete, nathan, kkartik, linux-tegra, linux-kernel
Cc: skamble
Add nvmem cell lookup entries for below fuse cells:
- gcplex-config-fuse
- pdi0
- pdi1
Also include the device name prefix "gpu-" in the names of the gpu fuse
cells in nvmem_cell_info.
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
---
drivers/soc/tegra/fuse/fuse-tegra.c | 8 ++++----
drivers/soc/tegra/fuse/fuse-tegra30.c | 17 ++++++++++++++++-
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
index aa94fda282f4..b0a8405dbdb1 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * Copyright (c) 2013-2021, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2013-2022, NVIDIA CORPORATION. All rights reserved.
*/
#include <linux/clk.h>
@@ -162,7 +162,7 @@ static const struct nvmem_cell_info tegra_fuse_cells[] = {
.bit_offset = 0,
.nbits = 32,
}, {
- .name = "gcplex-config-fuse",
+ .name = "gpu-gcplex-config-fuse",
.offset = 0x1c8,
.bytes = 4,
.bit_offset = 0,
@@ -186,13 +186,13 @@ static const struct nvmem_cell_info tegra_fuse_cells[] = {
.bit_offset = 0,
.nbits = 32,
}, {
- .name = "pdi0",
+ .name = "gpu-pdi0",
.offset = 0x300,
.bytes = 4,
.bit_offset = 0,
.nbits = 32,
}, {
- .name = "pdi1",
+ .name = "gpu-pdi1",
.offset = 0x304,
.bytes = 4,
.bit_offset = 0,
diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c
index b071d433d74f..f01d8a2547b6 100644
--- a/drivers/soc/tegra/fuse/fuse-tegra30.c
+++ b/drivers/soc/tegra/fuse/fuse-tegra30.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2013-2022, NVIDIA CORPORATION. All rights reserved.
*/
#include <linux/device.h>
@@ -344,6 +344,21 @@ static const struct nvmem_cell_lookup tegra194_fuse_lookups[] = {
.cell_name = "xusb-pad-calibration-ext",
.dev_id = "3520000.padctl",
.con_id = "calibration-ext",
+ }, {
+ .nvmem_name = "fuse",
+ .cell_name = "gpu-gcplex-config-fuse",
+ .dev_id = "17000000.gpu",
+ .con_id = "gcplex-config-fuse",
+ }, {
+ .nvmem_name = "fuse",
+ .cell_name = "gpu-pdi0",
+ .dev_id = "17000000.gpu",
+ .con_id = "pdi0",
+ }, {
+ .nvmem_name = "fuse",
+ .cell_name = "gpu-pdi1",
+ .dev_id = "17000000.gpu",
+ .con_id = "pdi1",
},
};
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH 1/1] soc/tegra: fuse: Add nvmem cell lookup entries for tegra194
2022-03-24 12:08 [PATCH 1/1] soc/tegra: fuse: Add nvmem cell lookup entries for tegra194 Sagar Kamble
@ 2022-04-05 12:44 ` Jon Hunter
2022-04-06 12:59 ` Thierry Reding
1 sibling, 0 replies; 3+ messages in thread
From: Jon Hunter @ 2022-04-05 12:44 UTC (permalink / raw)
To: Sagar Kamble, thierry.reding, digetx, yangyingliang,
ndesaulniers, pshete, nathan, kkartik, linux-tegra, linux-kernel
On 24/03/2022 12:08, Sagar Kamble wrote:
> Add nvmem cell lookup entries for below fuse cells:
> - gcplex-config-fuse
> - pdi0
> - pdi1
>
> Also include the device name prefix "gpu-" in the names of the gpu fuse
> cells in nvmem_cell_info.
>
> Signed-off-by: Sagar Kamble <skamble@nvidia.com>
> ---
> drivers/soc/tegra/fuse/fuse-tegra.c | 8 ++++----
> drivers/soc/tegra/fuse/fuse-tegra30.c | 17 ++++++++++++++++-
> 2 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c
> index aa94fda282f4..b0a8405dbdb1 100644
> --- a/drivers/soc/tegra/fuse/fuse-tegra.c
> +++ b/drivers/soc/tegra/fuse/fuse-tegra.c
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0-only
> /*
> - * Copyright (c) 2013-2021, NVIDIA CORPORATION. All rights reserved.
> + * Copyright (c) 2013-2022, NVIDIA CORPORATION. All rights reserved.
> */
>
> #include <linux/clk.h>
> @@ -162,7 +162,7 @@ static const struct nvmem_cell_info tegra_fuse_cells[] = {
> .bit_offset = 0,
> .nbits = 32,
> }, {
> - .name = "gcplex-config-fuse",
> + .name = "gpu-gcplex-config-fuse",
> .offset = 0x1c8,
> .bytes = 4,
> .bit_offset = 0,
> @@ -186,13 +186,13 @@ static const struct nvmem_cell_info tegra_fuse_cells[] = {
> .bit_offset = 0,
> .nbits = 32,
> }, {
> - .name = "pdi0",
> + .name = "gpu-pdi0",
> .offset = 0x300,
> .bytes = 4,
> .bit_offset = 0,
> .nbits = 32,
> }, {
> - .name = "pdi1",
> + .name = "gpu-pdi1",
> .offset = 0x304,
> .bytes = 4,
> .bit_offset = 0,
> diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c
> index b071d433d74f..f01d8a2547b6 100644
> --- a/drivers/soc/tegra/fuse/fuse-tegra30.c
> +++ b/drivers/soc/tegra/fuse/fuse-tegra30.c
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0-only
> /*
> - * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
> + * Copyright (c) 2013-2022, NVIDIA CORPORATION. All rights reserved.
> */
>
> #include <linux/device.h>
> @@ -344,6 +344,21 @@ static const struct nvmem_cell_lookup tegra194_fuse_lookups[] = {
> .cell_name = "xusb-pad-calibration-ext",
> .dev_id = "3520000.padctl",
> .con_id = "calibration-ext",
> + }, {
> + .nvmem_name = "fuse",
> + .cell_name = "gpu-gcplex-config-fuse",
> + .dev_id = "17000000.gpu",
> + .con_id = "gcplex-config-fuse",
> + }, {
> + .nvmem_name = "fuse",
> + .cell_name = "gpu-pdi0",
> + .dev_id = "17000000.gpu",
> + .con_id = "pdi0",
> + }, {
> + .nvmem_name = "fuse",
> + .cell_name = "gpu-pdi1",
> + .dev_id = "17000000.gpu",
> + .con_id = "pdi1",
> },
> };
>
Thanks! Looks good to me.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Jon
--
nvpublic
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH 1/1] soc/tegra: fuse: Add nvmem cell lookup entries for tegra194
2022-03-24 12:08 [PATCH 1/1] soc/tegra: fuse: Add nvmem cell lookup entries for tegra194 Sagar Kamble
2022-04-05 12:44 ` Jon Hunter
@ 2022-04-06 12:59 ` Thierry Reding
1 sibling, 0 replies; 3+ messages in thread
From: Thierry Reding @ 2022-04-06 12:59 UTC (permalink / raw)
To: Sagar Kamble
Cc: jonathanh, digetx, yangyingliang, ndesaulniers, pshete, nathan,
kkartik, linux-tegra, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 542 bytes --]
On Thu, Mar 24, 2022 at 05:38:48PM +0530, Sagar Kamble wrote:
> Add nvmem cell lookup entries for below fuse cells:
> - gcplex-config-fuse
> - pdi0
> - pdi1
>
> Also include the device name prefix "gpu-" in the names of the gpu fuse
> cells in nvmem_cell_info.
>
> Signed-off-by: Sagar Kamble <skamble@nvidia.com>
> ---
> drivers/soc/tegra/fuse/fuse-tegra.c | 8 ++++----
> drivers/soc/tegra/fuse/fuse-tegra30.c | 17 ++++++++++++++++-
> 2 files changed, 20 insertions(+), 5 deletions(-)
Applied, thanks.
Thierry
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^ permalink raw reply [flat|nested] 3+ messages in thread
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2022-03-24 12:08 [PATCH 1/1] soc/tegra: fuse: Add nvmem cell lookup entries for tegra194 Sagar Kamble
2022-04-05 12:44 ` Jon Hunter
2022-04-06 12:59 ` Thierry Reding
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