* [PATCH 1/6] phy: handle optional regulator for PHY
2022-05-09 7:48 [PATCH 0/6] arm64: add ethernet to orange pi 3 Corentin Labbe
@ 2022-05-09 7:48 ` Corentin Labbe
2022-05-09 7:48 ` [PATCH 2/6] net: stmmac: dwmac-sun8i: remove regulator Corentin Labbe
` (5 subsequent siblings)
6 siblings, 0 replies; 25+ messages in thread
From: Corentin Labbe @ 2022-05-09 7:48 UTC (permalink / raw)
To: alexandre.torgue, andrew, broonie, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens
Cc: netdev, devicetree, linux-arm-kernel, linux-kernel, linux-sunxi,
Corentin Labbe
Add handling of optional regulators for PHY.
Regulators need to be enabled before PHY scanning, so MDIO bus
initiate this task.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
drivers/net/mdio/fwnode_mdio.c | 32 ++++++++++++++++++++++++++++++++
drivers/net/phy/phy_device.c | 20 ++++++++++++++++++++
include/linux/phy.h | 3 +++
3 files changed, 55 insertions(+)
diff --git a/drivers/net/mdio/fwnode_mdio.c b/drivers/net/mdio/fwnode_mdio.c
index 1c1584fca632..c377cadc14c3 100644
--- a/drivers/net/mdio/fwnode_mdio.c
+++ b/drivers/net/mdio/fwnode_mdio.c
@@ -10,6 +10,7 @@
#include <linux/fwnode_mdio.h>
#include <linux/of.h>
#include <linux/phy.h>
+#include <linux/regulator/consumer.h>
MODULE_AUTHOR("Calvin Johnson <calvin.johnson@oss.nxp.com>");
MODULE_LICENSE("GPL");
@@ -95,6 +96,8 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus,
bool is_c45 = false;
u32 phy_id;
int rc;
+ struct regulator *regulator_phy;
+ struct regulator *regulator_phy_io;
mii_ts = fwnode_find_mii_timestamper(child);
if (IS_ERR(mii_ts))
@@ -104,6 +107,32 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus,
"ethernet-phy-ieee802.3-c45");
if (rc >= 0)
is_c45 = true;
+ regulator_phy_io = devm_regulator_get_optional(&bus->dev, "phy-io");
+ if (IS_ERR(regulator_phy_io)) {
+ rc = PTR_ERR(regulator_phy_io);
+ if (rc == -ENODEV)
+ regulator_phy_io = NULL;
+ else
+ return rc;
+ }
+ regulator_phy = devm_regulator_get_optional(&bus->dev, "phy");
+ if (IS_ERR(regulator_phy)) {
+ rc = PTR_ERR(regulator_phy);
+ if (rc == -ENODEV)
+ regulator_phy = NULL;
+ else
+ return rc;
+ }
+ if (regulator_phy_io) {
+ rc = regulator_enable(regulator_phy_io);
+ if (rc)
+ return rc;
+ }
+ if (regulator_phy) {
+ rc = regulator_enable(regulator_phy);
+ if (rc)
+ return rc;
+ }
if (is_c45 || fwnode_get_phy_id(child, &phy_id))
phy = get_phy_device(bus, addr, is_c45);
@@ -114,6 +143,9 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus,
return PTR_ERR(phy);
}
+ phy->regulator_phy = regulator_phy;
+ phy->regulator_phy_io = regulator_phy_io;
+
if (is_acpi_node(child)) {
phy->irq = bus->irq[addr];
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index 431a8719c635..ce64df596580 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -27,6 +27,7 @@
#include <linux/phy.h>
#include <linux/phy_led_triggers.h>
#include <linux/property.h>
+#include <linux/regulator/consumer.h>
#include <linux/sfp.h>
#include <linux/skbuff.h>
#include <linux/slab.h>
@@ -1785,6 +1786,11 @@ int phy_suspend(struct phy_device *phydev)
if (!ret)
phydev->suspended = true;
+ if (phydev->regulator_phy)
+ regulator_disable(phydev->regulator_phy);
+ if (phydev->regulator_phy_io)
+ regulator_disable(phydev->regulator_phy_io);
+
return ret;
}
EXPORT_SYMBOL(phy_suspend);
@@ -1811,6 +1817,20 @@ int phy_resume(struct phy_device *phydev)
{
int ret;
+ if (phydev->regulator_phy_io) {
+ ret = regulator_enable(phydev->regulator_phy_io);
+ if (ret)
+ return ret;
+ }
+ if (phydev->regulator_phy) {
+ ret = regulator_enable(phydev->regulator_phy);
+ if (ret) {
+ if (phydev->regulator_phy_io)
+ regulator_disable(phydev->regulator_phy_io);
+ return ret;
+ }
+ }
+
mutex_lock(&phydev->lock);
ret = __phy_resume(phydev);
mutex_unlock(&phydev->lock);
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 2d12054932ba..c29f45668d94 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -704,6 +704,9 @@ struct phy_device {
void (*phy_link_change)(struct phy_device *phydev, bool up);
void (*adjust_link)(struct net_device *dev);
+ struct regulator *regulator_phy;
+ struct regulator *regulator_phy_io;
+
#if IS_ENABLED(CONFIG_MACSEC)
/* MACsec management functions */
const struct macsec_ops *macsec_ops;
--
2.35.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 2/6] net: stmmac: dwmac-sun8i: remove regulator
2022-05-09 7:48 [PATCH 0/6] arm64: add ethernet to orange pi 3 Corentin Labbe
2022-05-09 7:48 ` [PATCH 1/6] phy: handle optional regulator for PHY Corentin Labbe
@ 2022-05-09 7:48 ` Corentin Labbe
2022-05-09 14:09 ` Andre Przywara
2022-05-09 7:48 ` [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply Corentin Labbe
` (4 subsequent siblings)
6 siblings, 1 reply; 25+ messages in thread
From: Corentin Labbe @ 2022-05-09 7:48 UTC (permalink / raw)
To: alexandre.torgue, andrew, broonie, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens
Cc: netdev, devicetree, linux-arm-kernel, linux-kernel, linux-sunxi,
Corentin Labbe
Now regulator is handled by phy core, there is no need to handle it in
stmmac driver.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 37 +------------------
1 file changed, 2 insertions(+), 35 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index f834472599f7..17888813c707 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -17,7 +17,6 @@
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
-#include <linux/regulator/consumer.h>
#include <linux/regmap.h>
#include <linux/stmmac.h>
@@ -59,7 +58,6 @@ struct emac_variant {
/* struct sunxi_priv_data - hold all sunxi private data
* @ephy_clk: reference to the optional EPHY clock for the internal PHY
- * @regulator: reference to the optional regulator
* @rst_ephy: reference to the optional EPHY reset for the internal PHY
* @variant: reference to the current board variant
* @regmap: regmap for using the syscon
@@ -69,7 +67,6 @@ struct emac_variant {
*/
struct sunxi_priv_data {
struct clk *ephy_clk;
- struct regulator *regulator;
struct reset_control *rst_ephy;
const struct emac_variant *variant;
struct regmap_field *regmap_field;
@@ -568,29 +565,11 @@ static int sun8i_dwmac_init(struct platform_device *pdev, void *priv)
{
struct net_device *ndev = platform_get_drvdata(pdev);
struct sunxi_priv_data *gmac = priv;
- int ret;
- if (gmac->regulator) {
- ret = regulator_enable(gmac->regulator);
- if (ret) {
- dev_err(&pdev->dev, "Fail to enable regulator\n");
- return ret;
- }
- }
-
- if (gmac->use_internal_phy) {
- ret = sun8i_dwmac_power_internal_phy(netdev_priv(ndev));
- if (ret)
- goto err_disable_regulator;
- }
+ if (gmac->use_internal_phy)
+ return sun8i_dwmac_power_internal_phy(netdev_priv(ndev));
return 0;
-
-err_disable_regulator:
- if (gmac->regulator)
- regulator_disable(gmac->regulator);
-
- return ret;
}
static void sun8i_dwmac_core_init(struct mac_device_info *hw,
@@ -1034,9 +1013,6 @@ static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
if (gmac->variant->soc_has_internal_phy)
sun8i_dwmac_unpower_internal_phy(gmac);
-
- if (gmac->regulator)
- regulator_disable(gmac->regulator);
}
static void sun8i_dwmac_set_mac_loopback(void __iomem *ioaddr, bool enable)
@@ -1157,15 +1133,6 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
return -EINVAL;
}
- /* Optional regulator for PHY */
- gmac->regulator = devm_regulator_get_optional(dev, "phy");
- if (IS_ERR(gmac->regulator)) {
- if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER)
- return -EPROBE_DEFER;
- dev_info(dev, "No regulator found\n");
- gmac->regulator = NULL;
- }
-
/* The "GMAC clock control" register might be located in the
* CCU address range (on the R40), or the system control address
* range (on most other sun8i and later SoCs).
--
2.35.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 2/6] net: stmmac: dwmac-sun8i: remove regulator
2022-05-09 7:48 ` [PATCH 2/6] net: stmmac: dwmac-sun8i: remove regulator Corentin Labbe
@ 2022-05-09 14:09 ` Andre Przywara
2022-05-09 14:38 ` LABBE Corentin
0 siblings, 1 reply; 25+ messages in thread
From: Andre Przywara @ 2022-05-09 14:09 UTC (permalink / raw)
To: Corentin Labbe
Cc: alexandre.torgue, andrew, broonie, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens, netdev, devicetree,
linux-arm-kernel, linux-kernel, linux-sunxi
On Mon, 9 May 2022 07:48:53 +0000
Corentin Labbe <clabbe@baylibre.com> wrote:
Hi,
> Now regulator is handled by phy core, there is no need to handle it in
> stmmac driver.
I don't think you can do that, since we definitely need to maintain
compatibility with *older* DTs.
Is there a real need for this patch, or is it just a cleanup?
I mean we should be able to keep both approaches in, and the respective
board and DT version selects which it is using.
Cheers,
Andre
> Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
> ---
> .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 37 +------------------
> 1 file changed, 2 insertions(+), 35 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> index f834472599f7..17888813c707 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> @@ -17,7 +17,6 @@
> #include <linux/phy.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> -#include <linux/regulator/consumer.h>
> #include <linux/regmap.h>
> #include <linux/stmmac.h>
>
> @@ -59,7 +58,6 @@ struct emac_variant {
>
> /* struct sunxi_priv_data - hold all sunxi private data
> * @ephy_clk: reference to the optional EPHY clock for the internal PHY
> - * @regulator: reference to the optional regulator
> * @rst_ephy: reference to the optional EPHY reset for the internal PHY
> * @variant: reference to the current board variant
> * @regmap: regmap for using the syscon
> @@ -69,7 +67,6 @@ struct emac_variant {
> */
> struct sunxi_priv_data {
> struct clk *ephy_clk;
> - struct regulator *regulator;
> struct reset_control *rst_ephy;
> const struct emac_variant *variant;
> struct regmap_field *regmap_field;
> @@ -568,29 +565,11 @@ static int sun8i_dwmac_init(struct platform_device *pdev, void *priv)
> {
> struct net_device *ndev = platform_get_drvdata(pdev);
> struct sunxi_priv_data *gmac = priv;
> - int ret;
>
> - if (gmac->regulator) {
> - ret = regulator_enable(gmac->regulator);
> - if (ret) {
> - dev_err(&pdev->dev, "Fail to enable regulator\n");
> - return ret;
> - }
> - }
> -
> - if (gmac->use_internal_phy) {
> - ret = sun8i_dwmac_power_internal_phy(netdev_priv(ndev));
> - if (ret)
> - goto err_disable_regulator;
> - }
> + if (gmac->use_internal_phy)
> + return sun8i_dwmac_power_internal_phy(netdev_priv(ndev));
>
> return 0;
> -
> -err_disable_regulator:
> - if (gmac->regulator)
> - regulator_disable(gmac->regulator);
> -
> - return ret;
> }
>
> static void sun8i_dwmac_core_init(struct mac_device_info *hw,
> @@ -1034,9 +1013,6 @@ static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
>
> if (gmac->variant->soc_has_internal_phy)
> sun8i_dwmac_unpower_internal_phy(gmac);
> -
> - if (gmac->regulator)
> - regulator_disable(gmac->regulator);
> }
>
> static void sun8i_dwmac_set_mac_loopback(void __iomem *ioaddr, bool enable)
> @@ -1157,15 +1133,6 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
> return -EINVAL;
> }
>
> - /* Optional regulator for PHY */
> - gmac->regulator = devm_regulator_get_optional(dev, "phy");
> - if (IS_ERR(gmac->regulator)) {
> - if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER)
> - return -EPROBE_DEFER;
> - dev_info(dev, "No regulator found\n");
> - gmac->regulator = NULL;
> - }
> -
> /* The "GMAC clock control" register might be located in the
> * CCU address range (on the R40), or the system control address
> * range (on most other sun8i and later SoCs).
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 2/6] net: stmmac: dwmac-sun8i: remove regulator
2022-05-09 14:09 ` Andre Przywara
@ 2022-05-09 14:38 ` LABBE Corentin
0 siblings, 0 replies; 25+ messages in thread
From: LABBE Corentin @ 2022-05-09 14:38 UTC (permalink / raw)
To: Andre Przywara
Cc: alexandre.torgue, andrew, broonie, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens, netdev, devicetree,
linux-arm-kernel, linux-kernel, linux-sunxi
Le Mon, May 09, 2022 at 03:09:07PM +0100, Andre Przywara a écrit :
> On Mon, 9 May 2022 07:48:53 +0000
> Corentin Labbe <clabbe@baylibre.com> wrote:
>
> Hi,
>
> > Now regulator is handled by phy core, there is no need to handle it in
> > stmmac driver.
>
> I don't think you can do that, since we definitely need to maintain
> compatibility with *older* DTs.
> Is there a real need for this patch, or is it just a cleanup?
> I mean we should be able to keep both approaches in, and the respective
> board and DT version selects which it is using.
>
> Cheers,
> Andre
>
It is just a cleanup. But yes, probably keeping it will be necessary for easy compatibility.
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply
2022-05-09 7:48 [PATCH 0/6] arm64: add ethernet to orange pi 3 Corentin Labbe
2022-05-09 7:48 ` [PATCH 1/6] phy: handle optional regulator for PHY Corentin Labbe
2022-05-09 7:48 ` [PATCH 2/6] net: stmmac: dwmac-sun8i: remove regulator Corentin Labbe
@ 2022-05-09 7:48 ` Corentin Labbe
2022-05-09 12:17 ` Andrew Lunn
2022-05-09 7:48 ` [PATCH 4/6] ARM: dts: sunxi: move phy regulator in PHY node Corentin Labbe
` (3 subsequent siblings)
6 siblings, 1 reply; 25+ messages in thread
From: Corentin Labbe @ 2022-05-09 7:48 UTC (permalink / raw)
To: alexandre.torgue, andrew, broonie, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens
Cc: netdev, devicetree, linux-arm-kernel, linux-kernel, linux-sunxi,
Corentin Labbe
Add entries for the 2 new phy-supply and phy-io-supply.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
.../devicetree/bindings/net/ethernet-phy.yaml | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
index ed1415a4381f..2a6b45ddf010 100644
--- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml
+++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
@@ -153,6 +153,16 @@ properties:
used. The absence of this property indicates the muxers
should be configured so that the external PHY is used.
+ phy-supply:
+ description:
+ Phandle to a regulator that provides power to the PHY. This
+ regulator will be managed during the PHY power on/off sequence.
+
+ phy-io-supply:
+ description:
+ Phandle to a regulator that provides power to the PHY. This
+ regulator will be managed during the PHY power on/off sequence.
+
resets:
maxItems: 1
--
2.35.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply
2022-05-09 7:48 ` [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply Corentin Labbe
@ 2022-05-09 12:17 ` Andrew Lunn
2022-05-09 13:26 ` LABBE Corentin
0 siblings, 1 reply; 25+ messages in thread
From: Andrew Lunn @ 2022-05-09 12:17 UTC (permalink / raw)
To: Corentin Labbe
Cc: alexandre.torgue, broonie, calvin.johnson, davem, edumazet,
hkallweit1, jernej.skrabec, joabreu, krzysztof.kozlowski+dt,
kuba, lgirdwood, linux, pabeni, peppe.cavallaro, robh+dt, samuel,
wens, netdev, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
On Mon, May 09, 2022 at 07:48:54AM +0000, Corentin Labbe wrote:
> Add entries for the 2 new phy-supply and phy-io-supply.
>
> Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
> ---
> .../devicetree/bindings/net/ethernet-phy.yaml | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> index ed1415a4381f..2a6b45ddf010 100644
> --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> @@ -153,6 +153,16 @@ properties:
> used. The absence of this property indicates the muxers
> should be configured so that the external PHY is used.
>
> + phy-supply:
> + description:
> + Phandle to a regulator that provides power to the PHY. This
> + regulator will be managed during the PHY power on/off sequence.
> +
> + phy-io-supply:
> + description:
> + Phandle to a regulator that provides power to the PHY. This
> + regulator will be managed during the PHY power on/off sequence.
If you need two differently named regulators, you need to make it clear
how they differ. My _guess_ would be, you only need the io variant in
order to talk to the PHY registers. However, to talk to a link
partner, you need the other one enabled as well. Which means handling
that regulator probably should be in the PHY driver, so it is enabled
only when the interface is configured up.
Andrew
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply
2022-05-09 12:17 ` Andrew Lunn
@ 2022-05-09 13:26 ` LABBE Corentin
2022-05-09 16:02 ` Andrew Lunn
0 siblings, 1 reply; 25+ messages in thread
From: LABBE Corentin @ 2022-05-09 13:26 UTC (permalink / raw)
To: Andrew Lunn
Cc: alexandre.torgue, broonie, calvin.johnson, davem, edumazet,
hkallweit1, jernej.skrabec, joabreu, krzysztof.kozlowski+dt,
kuba, lgirdwood, linux, pabeni, peppe.cavallaro, robh+dt, samuel,
wens, netdev, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
Le Mon, May 09, 2022 at 02:17:27PM +0200, Andrew Lunn a écrit :
> On Mon, May 09, 2022 at 07:48:54AM +0000, Corentin Labbe wrote:
> > Add entries for the 2 new phy-supply and phy-io-supply.
> >
> > Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
> > ---
> > .../devicetree/bindings/net/ethernet-phy.yaml | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> > index ed1415a4381f..2a6b45ddf010 100644
> > --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> > +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> > @@ -153,6 +153,16 @@ properties:
> > used. The absence of this property indicates the muxers
> > should be configured so that the external PHY is used.
> >
> > + phy-supply:
> > + description:
> > + Phandle to a regulator that provides power to the PHY. This
> > + regulator will be managed during the PHY power on/off sequence.
> > +
> > + phy-io-supply:
> > + description:
> > + Phandle to a regulator that provides power to the PHY. This
> > + regulator will be managed during the PHY power on/off sequence.
>
> If you need two differently named regulators, you need to make it clear
> how they differ. My _guess_ would be, you only need the io variant in
> order to talk to the PHY registers. However, to talk to a link
> partner, you need the other one enabled as well. Which means handling
> that regulator probably should be in the PHY driver, so it is enabled
> only when the interface is configured up.
>
If I enable only the IO one, stmmac fail to reset, so both are needed to be up.
I tried also to keep the "phy" one handled by stmmac (by removing patch 2), this lead to the PHY to not be found by MDIO scan.
Proably because stmmac enable the "phy" before the "phy-io".
For the difference between the 2, according to my basic read (I am bad a it) of the shematic
https://linux-sunxi.org/images/5/50/OrangePi_3_Schematics_v1.5.pdf
phy-io(ephy-vdd25) seems to (at least) power MDIO bus.
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply
2022-05-09 13:26 ` LABBE Corentin
@ 2022-05-09 16:02 ` Andrew Lunn
2022-05-09 16:12 ` Mark Brown
0 siblings, 1 reply; 25+ messages in thread
From: Andrew Lunn @ 2022-05-09 16:02 UTC (permalink / raw)
To: LABBE Corentin
Cc: alexandre.torgue, broonie, calvin.johnson, davem, edumazet,
hkallweit1, jernej.skrabec, joabreu, krzysztof.kozlowski+dt,
kuba, lgirdwood, linux, pabeni, peppe.cavallaro, robh+dt, samuel,
wens, netdev, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
On Mon, May 09, 2022 at 03:26:47PM +0200, LABBE Corentin wrote:
> Le Mon, May 09, 2022 at 02:17:27PM +0200, Andrew Lunn a écrit :
> > On Mon, May 09, 2022 at 07:48:54AM +0000, Corentin Labbe wrote:
> > > Add entries for the 2 new phy-supply and phy-io-supply.
> > >
> > > Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
> > > ---
> > > .../devicetree/bindings/net/ethernet-phy.yaml | 10 ++++++++++
> > > 1 file changed, 10 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> > > index ed1415a4381f..2a6b45ddf010 100644
> > > --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> > > +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml
> > > @@ -153,6 +153,16 @@ properties:
> > > used. The absence of this property indicates the muxers
> > > should be configured so that the external PHY is used.
> > >
> > > + phy-supply:
> > > + description:
> > > + Phandle to a regulator that provides power to the PHY. This
> > > + regulator will be managed during the PHY power on/off sequence.
> > > +
> > > + phy-io-supply:
> > > + description:
> > > + Phandle to a regulator that provides power to the PHY. This
> > > + regulator will be managed during the PHY power on/off sequence.
> >
> > If you need two differently named regulators, you need to make it clear
> > how they differ. My _guess_ would be, you only need the io variant in
> > order to talk to the PHY registers. However, to talk to a link
> > partner, you need the other one enabled as well. Which means handling
> > that regulator probably should be in the PHY driver, so it is enabled
> > only when the interface is configured up.
> >
>
> If I enable only the IO one, stmmac fail to reset, so both are needed to be up.
> I tried also to keep the "phy" one handled by stmmac (by removing patch 2), this lead to the PHY to not be found by MDIO scan.
> Proably because stmmac enable the "phy" before the "phy-io".
>
> For the difference between the 2, according to my basic read (I am bad a it) of the shematic
> https://linux-sunxi.org/images/5/50/OrangePi_3_Schematics_v1.5.pdf
> phy-io(ephy-vdd25) seems to (at least) power MDIO bus.
So there is nothing in the data sheet of the RTL8211E to suggest you
can uses these different power supplies independently. The naming
'phy-io-supply' is very specific to RTL8211E, but you are defining a
generic binding here. I don't know the regulator binding, it is
possible to make phy-supply a list?
Andrew
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply
2022-05-09 16:02 ` Andrew Lunn
@ 2022-05-09 16:12 ` Mark Brown
2022-05-09 16:38 ` Andrew Lunn
0 siblings, 1 reply; 25+ messages in thread
From: Mark Brown @ 2022-05-09 16:12 UTC (permalink / raw)
To: Andrew Lunn
Cc: LABBE Corentin, alexandre.torgue, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens, netdev, devicetree,
linux-arm-kernel, linux-kernel, linux-sunxi
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On Mon, May 09, 2022 at 06:02:55PM +0200, Andrew Lunn wrote:
> On Mon, May 09, 2022 at 03:26:47PM +0200, LABBE Corentin wrote:
> > For the difference between the 2, according to my basic read (I am bad a it) of the shematic
> > https://linux-sunxi.org/images/5/50/OrangePi_3_Schematics_v1.5.pdf
> > phy-io(ephy-vdd25) seems to (at least) power MDIO bus.
> So there is nothing in the data sheet of the RTL8211E to suggest you
> can uses these different power supplies independently. The naming
> 'phy-io-supply' is very specific to RTL8211E, but you are defining a
> generic binding here. I don't know the regulator binding, it is
> possible to make phy-supply a list?
No, that's not a thing - the supplies are individual, named properties
and even if there were a list we'd still want them to be named so it's
clear what's going on.
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply
2022-05-09 16:12 ` Mark Brown
@ 2022-05-09 16:38 ` Andrew Lunn
2022-05-09 16:56 ` Mark Brown
2022-05-17 0:47 ` Rob Herring
0 siblings, 2 replies; 25+ messages in thread
From: Andrew Lunn @ 2022-05-09 16:38 UTC (permalink / raw)
To: Mark Brown
Cc: LABBE Corentin, alexandre.torgue, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens, netdev, devicetree,
linux-arm-kernel, linux-kernel, linux-sunxi
> No, that's not a thing - the supplies are individual, named properties
> and even if there were a list we'd still want them to be named so it's
> clear what's going on.
So we have a collection of regulators, varying in numbers between
different PHYs, with different vendor names and purposes. In general,
they all should be turned on. Yet we want them named so it is clear
what is going on.
Is there a generic solution here so that the phylib core can somehow
enumerate them and turn them on, without actually knowing what they
are called because they have vendor specific names in order to be
clear what they are?
There must be a solution to this, phylib cannot be the first subsystem
to have this requirement, so if you could point to an example, that
would be great.
Thanks
Andrew
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply
2022-05-09 16:38 ` Andrew Lunn
@ 2022-05-09 16:56 ` Mark Brown
2022-05-11 8:02 ` LABBE Corentin
2022-05-17 0:47 ` Rob Herring
1 sibling, 1 reply; 25+ messages in thread
From: Mark Brown @ 2022-05-09 16:56 UTC (permalink / raw)
To: Andrew Lunn
Cc: LABBE Corentin, alexandre.torgue, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens, netdev, devicetree,
linux-arm-kernel, linux-kernel, linux-sunxi
[-- Attachment #1: Type: text/plain, Size: 1234 bytes --]
On Mon, May 09, 2022 at 06:38:05PM +0200, Andrew Lunn wrote:
> So we have a collection of regulators, varying in numbers between
> different PHYs, with different vendor names and purposes. In general,
> they all should be turned on. Yet we want them named so it is clear
> what is going on.
> Is there a generic solution here so that the phylib core can somehow
> enumerate them and turn them on, without actually knowing what they
> are called because they have vendor specific names in order to be
> clear what they are?
> There must be a solution to this, phylib cannot be the first subsystem
> to have this requirement, so if you could point to an example, that
> would be great.
No, it's not really come up much before - generally things with
regulator control that have generic drivers tend not to be sophisticated
enough to have more than one supply, or to be on an enumerable bus where
the power is part of the bus specification so have the power specified
as part of the bus. You'd need to extend the regulator bindings to
support parallel array of phandles and array of names properties like
clocks have as an option like you were asking for, which would doubtless
be fun for validation but is probably the thing here.
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply
2022-05-09 16:56 ` Mark Brown
@ 2022-05-11 8:02 ` LABBE Corentin
2022-05-11 12:50 ` Mark Brown
0 siblings, 1 reply; 25+ messages in thread
From: LABBE Corentin @ 2022-05-11 8:02 UTC (permalink / raw)
To: Mark Brown
Cc: Andrew Lunn, alexandre.torgue, calvin.johnson, davem, edumazet,
hkallweit1, jernej.skrabec, joabreu, krzysztof.kozlowski+dt,
kuba, lgirdwood, linux, pabeni, peppe.cavallaro, robh+dt, samuel,
wens, netdev, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
Le Mon, May 09, 2022 at 05:56:34PM +0100, Mark Brown a écrit :
> On Mon, May 09, 2022 at 06:38:05PM +0200, Andrew Lunn wrote:
>
> > So we have a collection of regulators, varying in numbers between
> > different PHYs, with different vendor names and purposes. In general,
> > they all should be turned on. Yet we want them named so it is clear
> > what is going on.
>
> > Is there a generic solution here so that the phylib core can somehow
> > enumerate them and turn them on, without actually knowing what they
> > are called because they have vendor specific names in order to be
> > clear what they are?
>
> > There must be a solution to this, phylib cannot be the first subsystem
> > to have this requirement, so if you could point to an example, that
> > would be great.
>
> No, it's not really come up much before - generally things with
> regulator control that have generic drivers tend not to be sophisticated
> enough to have more than one supply, or to be on an enumerable bus where
> the power is part of the bus specification so have the power specified
> as part of the bus. You'd need to extend the regulator bindings to
> support parallel array of phandles and array of names properties like
> clocks have as an option like you were asking for, which would doubtless
> be fun for validation but is probably the thing here.
Does you mean something like this:
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 1e54a833f2cf..404f5b874b59 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -351,6 +351,32 @@ static void regulator_lock_dependent(struct regulator_dev *rdev,
mutex_unlock(®ulator_list_mutex);
}
+/**
+ * of_get_regulator_from_list - get a regulator device node based on supply name
+ * from a DT regulators list
+ * @dev: Device pointer for the consumer (of regulator) device
+ * @supply: regulator supply name
+ *
+ * Extract the regulator device node corresponding to the supply name.
+ * returns the device node corresponding to the regulator if found, else
+ * returns NULL.
+ */
+static struct device_node *of_get_regulator_from_list(struct device *dev,
+ struct device_node *np,
+ const char *supply)
+{
+ int index, ret;
+ struct of_phandle_args regspec;
+
+ index = of_property_match_string(np, "regulator-names", supply);
+ if (index >= 0) {
+ ret = of_parse_phandle_with_args(np, "regulators", NULL, index, ®spec);
+ if (ret == 0)
+ return regspec.np;
+ }
+ return NULL;
+}
+
/**
* of_get_child_regulator - get a child regulator device node
* based on supply name
@@ -362,17 +388,23 @@ static void regulator_lock_dependent(struct regulator_dev *rdev,
* returns the device node corresponding to the regulator if found, else
* returns NULL.
*/
-static struct device_node *of_get_child_regulator(struct device_node *parent,
- const char *prop_name)
+static struct device_node *of_get_child_regulator(struct device *dev,
+ struct device_node *parent,
+ const char *supply)
{
struct device_node *regnode = NULL;
struct device_node *child = NULL;
+ char prop_name[64]; /* 64 is max size of property name */
+ snprintf(prop_name, 64, "%s-supply", supply);
for_each_child_of_node(parent, child) {
+ regnode = of_get_regulator_from_list(dev, child, supply);
+ if (regnode)
+ return regnode;
regnode = of_parse_phandle(child, prop_name, 0);
if (!regnode) {
- regnode = of_get_child_regulator(child, prop_name);
+ regnode = of_get_child_regulator(dev, child, prop_name);
if (regnode)
goto err_node_put;
} else {
@@ -401,12 +433,15 @@ static struct device_node *of_get_regulator(struct device *dev, const char *supp
char prop_name[64]; /* 64 is max size of property name */
dev_dbg(dev, "Looking up %s-supply from device tree\n", supply);
+ regnode = of_get_regulator_from_list(dev, dev->of_node, supply);
+ if (regnode)
+ return regnode;
snprintf(prop_name, 64, "%s-supply", supply);
regnode = of_parse_phandle(dev->of_node, prop_name, 0);
if (!regnode) {
- regnode = of_get_child_regulator(dev->of_node, prop_name);
+ regnode = of_get_child_regulator(dev, dev->of_node, supply);
if (regnode)
return regnode;
And then for our case, a regulator_get_bulk will be needed.
Does I well understood what you mean ?
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply
2022-05-11 8:02 ` LABBE Corentin
@ 2022-05-11 12:50 ` Mark Brown
0 siblings, 0 replies; 25+ messages in thread
From: Mark Brown @ 2022-05-11 12:50 UTC (permalink / raw)
To: LABBE Corentin
Cc: Andrew Lunn, alexandre.torgue, calvin.johnson, davem, edumazet,
hkallweit1, jernej.skrabec, joabreu, krzysztof.kozlowski+dt,
kuba, lgirdwood, linux, pabeni, peppe.cavallaro, robh+dt, samuel,
wens, netdev, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
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On Wed, May 11, 2022 at 10:02:58AM +0200, LABBE Corentin wrote:
> Le Mon, May 09, 2022 at 05:56:34PM +0100, Mark Brown a écrit :
> > as part of the bus. You'd need to extend the regulator bindings to
> > support parallel array of phandles and array of names properties like
> > clocks have as an option like you were asking for, which would doubtless
> > be fun for validation but is probably the thing here.
> Does you mean something like this:
...
> And then for our case, a regulator_get_bulk will be needed.
> Does I well understood what you mean ?
Yes.
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply
2022-05-09 16:38 ` Andrew Lunn
2022-05-09 16:56 ` Mark Brown
@ 2022-05-17 0:47 ` Rob Herring
1 sibling, 0 replies; 25+ messages in thread
From: Rob Herring @ 2022-05-17 0:47 UTC (permalink / raw)
To: Andrew Lunn
Cc: Mark Brown, LABBE Corentin, alexandre.torgue, calvin.johnson,
davem, edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, samuel, wens, netdev, devicetree,
linux-arm-kernel, linux-kernel, linux-sunxi
On Mon, May 09, 2022 at 06:38:05PM +0200, Andrew Lunn wrote:
> > No, that's not a thing - the supplies are individual, named properties
> > and even if there were a list we'd still want them to be named so it's
> > clear what's going on.
>
> So we have a collection of regulators, varying in numbers between
> different PHYs, with different vendor names and purposes. In general,
> they all should be turned on. Yet we want them named so it is clear
> what is going on.
In what order do we turn the supplies on? How much time in between each
one? Does an external clock need to be running before or after (and how
long after). Oh, and what about resets and the order and timing of them
relative to everything else?
This always happens in the same order. First, it's just one resource
like a regulator or reset. Then one more. Then another device with some
timing constraints. If we wanted a generic solution in DT, it would need
to be able to describe any power sequencing waveform. But we don't have
that because we don't want it.
> Is there a generic solution here so that the phylib core can somehow
> enumerate them and turn them on, without actually knowing what they
> are called because they have vendor specific names in order to be
> clear what they are?
Other devices have specific compatibles so that the device can be
identified and powered up. Once again, MDIO should not be special here.
> There must be a solution to this, phylib cannot be the first subsystem
> to have this requirement, so if you could point to an example, that
> would be great.
Well, no one seems to want to make non-discoverable devices on
'discoverable' buses work. Still an issue for PCI and USB. I thought
MDIO had a solution here to probe any devices in the DT even if not
discovered.
Rob
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 4/6] ARM: dts: sunxi: move phy regulator in PHY node
2022-05-09 7:48 [PATCH 0/6] arm64: add ethernet to orange pi 3 Corentin Labbe
` (2 preceding siblings ...)
2022-05-09 7:48 ` [PATCH 3/6] dt-bindings: net: Add documentation for phy-supply Corentin Labbe
@ 2022-05-09 7:48 ` Corentin Labbe
2022-05-09 10:55 ` Andre Przywara
2022-05-09 7:48 ` [PATCH 5/6] arm64: dts: allwinner: " Corentin Labbe
` (2 subsequent siblings)
6 siblings, 1 reply; 25+ messages in thread
From: Corentin Labbe @ 2022-05-09 7:48 UTC (permalink / raw)
To: alexandre.torgue, andrew, broonie, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens
Cc: netdev, devicetree, linux-arm-kernel, linux-kernel, linux-sunxi,
Corentin Labbe
Now that PHY core can handle regulators, move regulator handle in PHY
node.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 2 +-
arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 2 +-
arch/arm/boot/dts/sun8i-h3-zeropi.dts | 2 +-
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 2 +-
arch/arm/boot/dts/sun8i-r40-oka40i-c.dts | 2 +-
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 2 +-
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 2 +-
arch/arm/boot/dts/sun9i-a80-optimus.dts | 2 +-
arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi | 2 +-
13 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
index 5a7e1bd5f825..b450be0a45ed 100644
--- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
@@ -129,7 +129,6 @@ &ehci0 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_sw>;
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii-id";
allwinner,rx-delay-ps = <700>;
@@ -151,6 +150,7 @@ &mdio {
rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_sw>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
index 870993393fc2..fe70b350cdbb 100644
--- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
@@ -181,7 +181,6 @@ &ehci1 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_dldo4>;
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
@@ -201,6 +200,7 @@ &mdio {
rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_dldo4>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index a2f2ef2b0092..c393612f44c6 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -103,7 +103,6 @@ &ehci2 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii";
@@ -114,6 +113,7 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
index 26e2e6172e0d..70bde396856b 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
@@ -80,7 +80,6 @@ &ehci2 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
@@ -90,6 +89,7 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
index d05fa679dcd3..c6dcf1af3298 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
@@ -83,7 +83,6 @@ &ehci3 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
@@ -94,6 +93,7 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
index b6ca45d18e51..61eb8c003186 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
@@ -65,7 +65,6 @@ reg_gmac_3v3: gmac-3v3 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
@@ -75,5 +74,6 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-h3-zeropi.dts b/arch/arm/boot/dts/sun8i-h3-zeropi.dts
index 7d3e7323b661..54174ef18823 100644
--- a/arch/arm/boot/dts/sun8i-h3-zeropi.dts
+++ b/arch/arm/boot/dts/sun8i-h3-zeropi.dts
@@ -65,13 +65,13 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
+ phy-supply = <®_gmac_3v3>;
};
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index a6a1087a0c9b..b1f269bbd479 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -130,7 +130,6 @@ &gmac {
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
- phy-supply = <®_dc1sw>;
status = "okay";
};
@@ -138,6 +137,7 @@ &gmac_mdio {
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_dc1sw>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts b/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts
index 0bd1336206b8..c43476b426df 100644
--- a/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts
+++ b/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts
@@ -93,7 +93,6 @@ &gmac {
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
- phy-supply = <®_dcdc1>;
status = "okay";
};
@@ -101,6 +100,7 @@ &gmac_mdio {
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_dcdc1>;
};
};
diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
index 47954551f573..050a649d7bda 100644
--- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
+++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -121,7 +121,6 @@ &gmac {
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
- phy-supply = <®_dc1sw>;
status = "okay";
};
@@ -129,6 +128,7 @@ &gmac_mdio {
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_dc1sw>;
};
};
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index c8ca8cb7f5c9..ab9bf4bf7343 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -130,7 +130,6 @@ &gmac {
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
- phy-supply = <®_cldo1>;
status = "okay";
};
@@ -142,6 +141,7 @@ &i2c3 {
&mdio {
phy1: ethernet-phy@1 {
+ phy-supply = <®_cldo1>;
reg = <1>;
};
};
diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts
index 5c3580d712e4..48219b8049b1 100644
--- a/arch/arm/boot/dts/sun9i-a80-optimus.dts
+++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts
@@ -125,13 +125,13 @@ &gmac {
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
- phy-supply = <®_cldo1>;
status = "okay";
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
+ phy-supply = <®_cldo1>;
};
};
diff --git a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
index d03f5853ef7b..65f0a3c2af3f 100644
--- a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
+++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
@@ -125,7 +125,6 @@ &ehci2 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
@@ -136,6 +135,7 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_gmac_3v3>;
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 4/6] ARM: dts: sunxi: move phy regulator in PHY node
2022-05-09 7:48 ` [PATCH 4/6] ARM: dts: sunxi: move phy regulator in PHY node Corentin Labbe
@ 2022-05-09 10:55 ` Andre Przywara
2022-05-09 11:16 ` LABBE Corentin
0 siblings, 1 reply; 25+ messages in thread
From: Andre Przywara @ 2022-05-09 10:55 UTC (permalink / raw)
To: Corentin Labbe
Cc: alexandre.torgue, andrew, broonie, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens, netdev, devicetree,
linux-arm-kernel, linux-kernel, linux-sunxi
On Mon, 9 May 2022 07:48:55 +0000
Corentin Labbe <clabbe@baylibre.com> wrote:
Hi!
> Now that PHY core can handle regulators, move regulator handle in PHY
> node.
Other than this is somewhat more "correct", is it really needed for those
boards? Because it breaks compatibility with older kernels, so when we
update the DTs in U-Boot, we run into problems (again).
IIUC this series is about the OPi3 & friends, which didn't work with older
kernels anyway, so can we just skip this patch (and 5/6), to just enable
the boards that didn't work before?
Cheers,
Andre
>
> Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
> ---
> arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 2 +-
> arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 2 +-
> arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 2 +-
> arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts | 2 +-
> arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 2 +-
> arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 2 +-
> arch/arm/boot/dts/sun8i-h3-zeropi.dts | 2 +-
> arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 2 +-
> arch/arm/boot/dts/sun8i-r40-oka40i-c.dts | 2 +-
> arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 2 +-
> arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 2 +-
> arch/arm/boot/dts/sun9i-a80-optimus.dts | 2 +-
> arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi | 2 +-
> 13 files changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> index 5a7e1bd5f825..b450be0a45ed 100644
> --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> @@ -129,7 +129,6 @@ &ehci0 {
> &emac {
> pinctrl-names = "default";
> pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_sw>;
> phy-handle = <&rgmii_phy>;
> phy-mode = "rgmii-id";
> allwinner,rx-delay-ps = <700>;
> @@ -151,6 +150,7 @@ &mdio {
> rgmii_phy: ethernet-phy@1 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <1>;
> + phy-supply = <®_sw>;
> };
> };
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
> index 870993393fc2..fe70b350cdbb 100644
> --- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
> +++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
> @@ -181,7 +181,6 @@ &ehci1 {
> &emac {
> pinctrl-names = "default";
> pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_dldo4>;
> phy-handle = <&rgmii_phy>;
> phy-mode = "rgmii-id";
> status = "okay";
> @@ -201,6 +200,7 @@ &mdio {
> rgmii_phy: ethernet-phy@1 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <1>;
> + phy-supply = <®_dldo4>;
> };
> };
>
> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
> index a2f2ef2b0092..c393612f44c6 100644
> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
> @@ -103,7 +103,6 @@ &ehci2 {
> &emac {
> pinctrl-names = "default";
> pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> phy-handle = <&ext_rgmii_phy>;
> phy-mode = "rgmii";
>
> @@ -114,6 +113,7 @@ &external_mdio {
> ext_rgmii_phy: ethernet-phy@1 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <7>;
> + phy-supply = <®_gmac_3v3>;
> };
> };
>
> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> index 26e2e6172e0d..70bde396856b 100644
> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
> @@ -80,7 +80,6 @@ &ehci2 {
> &emac {
> pinctrl-names = "default";
> pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> phy-handle = <&ext_rgmii_phy>;
> phy-mode = "rgmii-id";
> status = "okay";
> @@ -90,6 +89,7 @@ &external_mdio {
> ext_rgmii_phy: ethernet-phy@7 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <7>;
> + phy-supply = <®_gmac_3v3>;
> };
> };
>
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> index d05fa679dcd3..c6dcf1af3298 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> @@ -83,7 +83,6 @@ &ehci3 {
> &emac {
> pinctrl-names = "default";
> pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> phy-handle = <&ext_rgmii_phy>;
> phy-mode = "rgmii-id";
>
> @@ -94,6 +93,7 @@ &external_mdio {
> ext_rgmii_phy: ethernet-phy@1 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <0>;
> + phy-supply = <®_gmac_3v3>;
> };
> };
>
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> index b6ca45d18e51..61eb8c003186 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> @@ -65,7 +65,6 @@ reg_gmac_3v3: gmac-3v3 {
> &emac {
> pinctrl-names = "default";
> pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> phy-handle = <&ext_rgmii_phy>;
> phy-mode = "rgmii-id";
> status = "okay";
> @@ -75,5 +74,6 @@ &external_mdio {
> ext_rgmii_phy: ethernet-phy@1 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <1>;
> + phy-supply = <®_gmac_3v3>;
> };
> };
> diff --git a/arch/arm/boot/dts/sun8i-h3-zeropi.dts b/arch/arm/boot/dts/sun8i-h3-zeropi.dts
> index 7d3e7323b661..54174ef18823 100644
> --- a/arch/arm/boot/dts/sun8i-h3-zeropi.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-zeropi.dts
> @@ -65,13 +65,13 @@ &external_mdio {
> ext_rgmii_phy: ethernet-phy@7 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <7>;
> + phy-supply = <®_gmac_3v3>;
> };
> };
>
> &emac {
> pinctrl-names = "default";
> pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> phy-handle = <&ext_rgmii_phy>;
> phy-mode = "rgmii-id";
>
> diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> index a6a1087a0c9b..b1f269bbd479 100644
> --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> @@ -130,7 +130,6 @@ &gmac {
> pinctrl-0 = <&gmac_rgmii_pins>;
> phy-handle = <&phy1>;
> phy-mode = "rgmii-id";
> - phy-supply = <®_dc1sw>;
> status = "okay";
> };
>
> @@ -138,6 +137,7 @@ &gmac_mdio {
> phy1: ethernet-phy@1 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <1>;
> + phy-supply = <®_dc1sw>;
> };
> };
>
> diff --git a/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts b/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts
> index 0bd1336206b8..c43476b426df 100644
> --- a/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts
> +++ b/arch/arm/boot/dts/sun8i-r40-oka40i-c.dts
> @@ -93,7 +93,6 @@ &gmac {
> pinctrl-0 = <&gmac_rgmii_pins>;
> phy-handle = <&phy1>;
> phy-mode = "rgmii-id";
> - phy-supply = <®_dcdc1>;
> status = "okay";
> };
>
> @@ -101,6 +100,7 @@ &gmac_mdio {
> phy1: ethernet-phy@1 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <1>;
> + phy-supply = <®_dcdc1>;
> };
> };
>
> diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
> index 47954551f573..050a649d7bda 100644
> --- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
> +++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
> @@ -121,7 +121,6 @@ &gmac {
> pinctrl-0 = <&gmac_rgmii_pins>;
> phy-handle = <&phy1>;
> phy-mode = "rgmii-id";
> - phy-supply = <®_dc1sw>;
> status = "okay";
> };
>
> @@ -129,6 +128,7 @@ &gmac_mdio {
> phy1: ethernet-phy@1 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <1>;
> + phy-supply = <®_dc1sw>;
> };
> };
>
> diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
> index c8ca8cb7f5c9..ab9bf4bf7343 100644
> --- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
> +++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
> @@ -130,7 +130,6 @@ &gmac {
> pinctrl-0 = <&gmac_rgmii_pins>;
> phy-handle = <&phy1>;
> phy-mode = "rgmii-id";
> - phy-supply = <®_cldo1>;
> status = "okay";
> };
>
> @@ -142,6 +141,7 @@ &i2c3 {
>
> &mdio {
> phy1: ethernet-phy@1 {
> + phy-supply = <®_cldo1>;
> reg = <1>;
> };
> };
> diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts
> index 5c3580d712e4..48219b8049b1 100644
> --- a/arch/arm/boot/dts/sun9i-a80-optimus.dts
> +++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts
> @@ -125,13 +125,13 @@ &gmac {
> pinctrl-0 = <&gmac_rgmii_pins>;
> phy-handle = <&phy1>;
> phy-mode = "rgmii-id";
> - phy-supply = <®_cldo1>;
> status = "okay";
> };
>
> &mdio {
> phy1: ethernet-phy@1 {
> reg = <1>;
> + phy-supply = <®_cldo1>;
> };
> };
>
> diff --git a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
> index d03f5853ef7b..65f0a3c2af3f 100644
> --- a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
> +++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
> @@ -125,7 +125,6 @@ &ehci2 {
> &emac {
> pinctrl-names = "default";
> pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> phy-handle = <&ext_rgmii_phy>;
> phy-mode = "rgmii-id";
>
> @@ -136,6 +135,7 @@ &external_mdio {
> ext_rgmii_phy: ethernet-phy@1 {
> compatible = "ethernet-phy-ieee802.3-c22";
> reg = <1>;
> + phy-supply = <®_gmac_3v3>;
> };
> };
>
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 4/6] ARM: dts: sunxi: move phy regulator in PHY node
2022-05-09 10:55 ` Andre Przywara
@ 2022-05-09 11:16 ` LABBE Corentin
0 siblings, 0 replies; 25+ messages in thread
From: LABBE Corentin @ 2022-05-09 11:16 UTC (permalink / raw)
To: Andre Przywara
Cc: alexandre.torgue, andrew, broonie, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens, netdev, devicetree,
linux-arm-kernel, linux-kernel, linux-sunxi
Le Mon, May 09, 2022 at 11:55:33AM +0100, Andre Przywara a écrit :
> On Mon, 9 May 2022 07:48:55 +0000
> Corentin Labbe <clabbe@baylibre.com> wrote:
>
> Hi!
>
> > Now that PHY core can handle regulators, move regulator handle in PHY
> > node.
>
> Other than this is somewhat more "correct", is it really needed for those
> boards? Because it breaks compatibility with older kernels, so when we
> update the DTs in U-Boot, we run into problems (again).
>
> IIUC this series is about the OPi3 & friends, which didn't work with older
> kernels anyway, so can we just skip this patch (and 5/6), to just enable
> the boards that didn't work before?
>
> Cheers,
> Andre
>
We could have a situation where stmmac handle phy for older boards, and PHY core handle them for new boards.
Up to maintainers to see if they want a split situation or not.
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 5/6] arm64: dts: allwinner: move phy regulator in PHY node
2022-05-09 7:48 [PATCH 0/6] arm64: add ethernet to orange pi 3 Corentin Labbe
` (3 preceding siblings ...)
2022-05-09 7:48 ` [PATCH 4/6] ARM: dts: sunxi: move phy regulator in PHY node Corentin Labbe
@ 2022-05-09 7:48 ` Corentin Labbe
2022-05-09 7:48 ` [PATCH 6/6] arm64: dts: allwinner: orange-pi-3: Enable ethernet Corentin Labbe
2022-05-09 12:20 ` [PATCH 0/6] arm64: add ethernet to orange pi 3 Andrew Lunn
6 siblings, 0 replies; 25+ messages in thread
From: Corentin Labbe @ 2022-05-09 7:48 UTC (permalink / raw)
To: alexandre.torgue, andrew, broonie, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens
Cc: netdev, devicetree, linux-arm-kernel, linux-kernel, linux-sunxi,
Corentin Labbe
Now that PHY core can handle regulators, move regulator handle in PHY
node.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 2 +-
.../boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 2 +-
.../boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 2 +-
.../boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts | 2 +-
.../boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 2 +-
.../arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 2 +-
.../boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts | 2 +-
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 2 +-
.../boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts | 8 ++++----
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 2 +-
17 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index 997a19372683..f44345e0f749 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -107,7 +107,6 @@ &emac {
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
- phy-supply = <®_dc1sw>;
status = "okay";
};
@@ -134,6 +133,7 @@ &mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_dc1sw>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index e47ff06a6fa9..9923d8fb3289 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -82,7 +82,6 @@ &emac {
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-handle = <&ext_rgmii_phy>;
- phy-supply = <®_dcdc1>;
status = "okay";
};
@@ -106,6 +105,7 @@ &mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
+ phy-supply = <®_dcdc1>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
index 577f9e1d08a1..ec511efee942 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
@@ -30,7 +30,6 @@ &emac {
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-handle = <&ext_rgmii_phy>;
- phy-supply = <®_dc1sw>;
allwinner,tx-delay-ps = <600>;
status = "okay";
};
@@ -55,6 +54,7 @@ &mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_dc1sw>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index bfb806cf6d7a..c172cc4291b7 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -104,7 +104,6 @@ &emac {
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-handle = <&ext_rgmii_phy>;
- phy-supply = <®_dcdc1>;
allwinner,tx-delay-ps = <600>;
status = "okay";
};
@@ -124,6 +123,7 @@ &mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_dcdc1>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index c519d9fa6967..3f9622f141b6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -122,7 +122,6 @@ &emac {
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
- phy-supply = <®_gmac_3v3>;
status = "okay";
};
@@ -141,6 +140,7 @@ &mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 2accb5ddf783..70039380d454 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -83,7 +83,6 @@ &emac {
pinctrl-0 = <&rmii_pins>;
phy-mode = "rmii";
phy-handle = <&ext_rmii_phy1>;
- phy-supply = <®_dc1sw>;
status = "okay";
};
@@ -111,6 +110,7 @@ &mdio {
ext_rmii_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_dc1sw>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 5e66ce1a334f..716a8c1faef2 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -81,7 +81,6 @@ &emac {
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii-txid";
phy-handle = <&ext_rgmii_phy>;
- phy-supply = <®_dc1sw>;
status = "okay";
};
@@ -100,6 +99,7 @@ &mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_dc1sw>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
index 6e30a564c87f..4e3dae6ee3a4 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
@@ -34,7 +34,6 @@ &codec {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
/delete-property/ allwinner,leds-active-low;
@@ -45,6 +44,7 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
index 4c3921ac236c..e07142b0cddf 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -94,7 +94,6 @@ &ehci3 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
@@ -104,6 +103,7 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index 05486cccee1c..77940e90bd36 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -73,7 +73,6 @@ &ehci3 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
@@ -83,6 +82,7 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
index 55b369534a08..7280bcbc0f40 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
@@ -125,7 +125,6 @@ &ehci2 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
@@ -135,6 +134,7 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index 1010c1b22d2e..95bc670a4b8e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -121,7 +121,6 @@ &ehci3 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
@@ -131,6 +130,7 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index 74e0444af19b..8b4403ca610f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -122,7 +122,6 @@ &ehci3 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
@@ -132,6 +131,7 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
index 7ec5ac850a0d..74d2a60ce113 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
@@ -67,7 +67,6 @@ &ehci1 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
- phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
@@ -77,6 +76,7 @@ &external_mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_gmac_3v3>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index 6249e9e02928..ecfb99c07f69 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
@@ -99,7 +99,6 @@ &emac {
pinctrl-0 = <&ext_rgmii_pins>;
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
- phy-supply = <®_aldo2>;
status = "okay";
};
@@ -122,6 +121,7 @@ &mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_aldo2>;
};
};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts
index 686f58e77004..6594d2e5284a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64-model-b.dts
@@ -18,12 +18,12 @@ wifi_pwrseq: wifi_pwrseq {
};
};
-&hdmi_connector {
- /delete-property/ ddc-en-gpios;
+&ext_rgmii_phy {
+ phy-supply = <®_aldo2>;
};
-&emac {
- phy-supply = <®_aldo2>;
+&hdmi_connector {
+ /delete-property/ ddc-en-gpios;
};
&mmc1 {
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 1ffd68f43f87..dae637720432 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -102,7 +102,6 @@ &emac {
pinctrl-0 = <&ext_rgmii_pins>;
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
- phy-supply = <®_gmac_3v3>;
allwinner,rx-delay-ps = <200>;
allwinner,tx-delay-ps = <200>;
status = "okay";
@@ -127,6 +126,7 @@ &mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
+ phy-supply = <®_gmac_3v3>;
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 6/6] arm64: dts: allwinner: orange-pi-3: Enable ethernet
2022-05-09 7:48 [PATCH 0/6] arm64: add ethernet to orange pi 3 Corentin Labbe
` (4 preceding siblings ...)
2022-05-09 7:48 ` [PATCH 5/6] arm64: dts: allwinner: " Corentin Labbe
@ 2022-05-09 7:48 ` Corentin Labbe
2022-05-09 12:20 ` [PATCH 0/6] arm64: add ethernet to orange pi 3 Andrew Lunn
6 siblings, 0 replies; 25+ messages in thread
From: Corentin Labbe @ 2022-05-09 7:48 UTC (permalink / raw)
To: alexandre.torgue, andrew, broonie, calvin.johnson, davem,
edumazet, hkallweit1, jernej.skrabec, joabreu,
krzysztof.kozlowski+dt, kuba, lgirdwood, linux, pabeni,
peppe.cavallaro, robh+dt, samuel, wens
Cc: netdev, devicetree, linux-arm-kernel, linux-kernel, linux-sunxi,
Ondřej Jirman, Corentin Labbe
From: Ondřej Jirman <megi@xff.cz>
Orange Pi 3 has two regulators that power the Realtek RTL8211E
PHY. According to the datasheet, both regulators need to be enabled
at the same time, or that "phy-io" should be enabled slightly earlier
than "phy" regulator.
RTL8211E/RTL8211EG datasheet says:
Note 4: 2.5V (or 1.8/1.5V) RGMII power should be risen simultaneously
or slightly earlier than 3.3V power. Rising 2.5V (or 1.8/1.5V) power
later than 3.3V power may lead to errors.
The timing is set in DT via startup-delay-us.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index c45d7b7fb39a..fd1d4f5bbc83 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -13,6 +13,7 @@ / {
compatible = "xunlong,orangepi-3", "allwinner,sun50i-h6";
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
serial1 = &uart1;
};
@@ -55,6 +56,15 @@ led-1 {
};
};
+ reg_gmac_2v5: gmac-2v5 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-2v5";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
+ };
+
reg_vcc5v: vcc5v {
/* board wide 5V supply directly from the DC jack */
compatible = "regulator-fixed";
@@ -113,6 +123,33 @@ &ehci3 {
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-mode = "rgmii-id";
+ phy-handle = <&ext_rgmii_phy>;
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ /*
+ * The board uses 2.5V RGMII signalling. Power sequence to enable
+ * the phy is to enable GMAC-2V5 and GMAC-3V (aldo2) power rails
+ * at the same time and to wait 100ms. The driver enables phy-io
+ * first. Delay is achieved with enable-ramp-delay on reg_aldo2.
+ */
+ phy-io-supply = <®_gmac_2v5>;
+ phy-supply = <®_aldo2>;
+
+ reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */
+ reset-assert-us = <15000>;
+ reset-deassert-us = <40000>;
+ };
+};
+
&gpu {
mali-supply = <®_dcdcc>;
status = "okay";
@@ -211,6 +248,7 @@ reg_aldo2: aldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc33-audio-tv-ephy-mac";
+ regulator-enable-ramp-delay = <100000>;
};
/* ALDO3 is shorted to CLDO1 */
--
2.35.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 0/6] arm64: add ethernet to orange pi 3
2022-05-09 7:48 [PATCH 0/6] arm64: add ethernet to orange pi 3 Corentin Labbe
` (5 preceding siblings ...)
2022-05-09 7:48 ` [PATCH 6/6] arm64: dts: allwinner: orange-pi-3: Enable ethernet Corentin Labbe
@ 2022-05-09 12:20 ` Andrew Lunn
2022-05-09 13:27 ` LABBE Corentin
6 siblings, 1 reply; 25+ messages in thread
From: Andrew Lunn @ 2022-05-09 12:20 UTC (permalink / raw)
To: Corentin Labbe
Cc: alexandre.torgue, broonie, calvin.johnson, davem, edumazet,
hkallweit1, jernej.skrabec, joabreu, krzysztof.kozlowski+dt,
kuba, lgirdwood, linux, pabeni, peppe.cavallaro, robh+dt, samuel,
wens, netdev, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
On Mon, May 09, 2022 at 07:48:51AM +0000, Corentin Labbe wrote:
> Hello
>
> 2 sunxi board still does not have ethernet working, orangepi 1+ and
> orangepi 3.
> This is due to the fact thoses boards have a PHY which need 2 regulators.
Why PHY make/module is it which is causing problems?
Andrew
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/6] arm64: add ethernet to orange pi 3
2022-05-09 12:20 ` [PATCH 0/6] arm64: add ethernet to orange pi 3 Andrew Lunn
@ 2022-05-09 13:27 ` LABBE Corentin
2022-05-09 15:19 ` Andrew Lunn
0 siblings, 1 reply; 25+ messages in thread
From: LABBE Corentin @ 2022-05-09 13:27 UTC (permalink / raw)
To: Andrew Lunn
Cc: alexandre.torgue, broonie, calvin.johnson, davem, edumazet,
hkallweit1, jernej.skrabec, joabreu, krzysztof.kozlowski+dt,
kuba, lgirdwood, linux, pabeni, peppe.cavallaro, robh+dt, samuel,
wens, netdev, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
Le Mon, May 09, 2022 at 02:20:07PM +0200, Andrew Lunn a écrit :
> On Mon, May 09, 2022 at 07:48:51AM +0000, Corentin Labbe wrote:
> > Hello
> >
> > 2 sunxi board still does not have ethernet working, orangepi 1+ and
> > orangepi 3.
> > This is due to the fact thoses boards have a PHY which need 2 regulators.
>
> Why PHY make/module is it which is causing problems?
>
The problem was stmmac support only one regulator for PHY.
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 0/6] arm64: add ethernet to orange pi 3
2022-05-09 13:27 ` LABBE Corentin
@ 2022-05-09 15:19 ` Andrew Lunn
2022-05-09 15:24 ` LABBE Corentin
0 siblings, 1 reply; 25+ messages in thread
From: Andrew Lunn @ 2022-05-09 15:19 UTC (permalink / raw)
To: LABBE Corentin
Cc: alexandre.torgue, broonie, calvin.johnson, davem, edumazet,
hkallweit1, jernej.skrabec, joabreu, krzysztof.kozlowski+dt,
kuba, lgirdwood, linux, pabeni, peppe.cavallaro, robh+dt, samuel,
wens, netdev, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
On Mon, May 09, 2022 at 03:27:30PM +0200, LABBE Corentin wrote:
> Le Mon, May 09, 2022 at 02:20:07PM +0200, Andrew Lunn a écrit :
> > On Mon, May 09, 2022 at 07:48:51AM +0000, Corentin Labbe wrote:
> > > Hello
> > >
> > > 2 sunxi board still does not have ethernet working, orangepi 1+ and
> > > orangepi 3.
> > > This is due to the fact thoses boards have a PHY which need 2 regulators.
> >
> > Why PHY make/module is it which is causing problems?
> >
>
> The problem was stmmac support only one regulator for PHY.
I'm trying to understand the differences between the two different
regulators. If you tell me what the PHY is, i might be able to find
the data sheet, and then understand why two regulators are needed and
if one needs to be controlled by the PHY driver, not the MDIO bus
driver.
Andrew
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 0/6] arm64: add ethernet to orange pi 3
2022-05-09 15:19 ` Andrew Lunn
@ 2022-05-09 15:24 ` LABBE Corentin
2022-05-09 15:56 ` Mark Brown
0 siblings, 1 reply; 25+ messages in thread
From: LABBE Corentin @ 2022-05-09 15:24 UTC (permalink / raw)
To: Andrew Lunn
Cc: alexandre.torgue, broonie, calvin.johnson, davem, edumazet,
hkallweit1, jernej.skrabec, joabreu, krzysztof.kozlowski+dt,
kuba, lgirdwood, linux, pabeni, peppe.cavallaro, robh+dt, samuel,
wens, netdev, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
Le Mon, May 09, 2022 at 05:19:16PM +0200, Andrew Lunn a écrit :
> On Mon, May 09, 2022 at 03:27:30PM +0200, LABBE Corentin wrote:
> > Le Mon, May 09, 2022 at 02:20:07PM +0200, Andrew Lunn a écrit :
> > > On Mon, May 09, 2022 at 07:48:51AM +0000, Corentin Labbe wrote:
> > > > Hello
> > > >
> > > > 2 sunxi board still does not have ethernet working, orangepi 1+ and
> > > > orangepi 3.
> > > > This is due to the fact thoses boards have a PHY which need 2 regulators.
> > >
> > > Why PHY make/module is it which is causing problems?
> > >
> >
> > The problem was stmmac support only one regulator for PHY.
>
> I'm trying to understand the differences between the two different
> regulators. If you tell me what the PHY is, i might be able to find
> the data sheet, and then understand why two regulators are needed and
> if one needs to be controlled by the PHY driver, not the MDIO bus
> driver.
The schematic for the board is https://linux-sunxi.org/images/5/50/OrangePi_3_Schematics_v1.5.pdf
Which show a RTL8211E.
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 0/6] arm64: add ethernet to orange pi 3
2022-05-09 15:24 ` LABBE Corentin
@ 2022-05-09 15:56 ` Mark Brown
0 siblings, 0 replies; 25+ messages in thread
From: Mark Brown @ 2022-05-09 15:56 UTC (permalink / raw)
To: LABBE Corentin
Cc: Andrew Lunn, alexandre.torgue, calvin.johnson, davem, edumazet,
hkallweit1, jernej.skrabec, joabreu, krzysztof.kozlowski+dt,
kuba, lgirdwood, linux, pabeni, peppe.cavallaro, robh+dt, samuel,
wens, netdev, devicetree, linux-arm-kernel, linux-kernel,
linux-sunxi
[-- Attachment #1: Type: text/plain, Size: 842 bytes --]
On Mon, May 09, 2022 at 05:24:26PM +0200, LABBE Corentin wrote:
> Le Mon, May 09, 2022 at 05:19:16PM +0200, Andrew Lunn a écrit :
> > I'm trying to understand the differences between the two different
> > regulators. If you tell me what the PHY is, i might be able to find
> > the data sheet, and then understand why two regulators are needed and
> > if one needs to be controlled by the PHY driver, not the MDIO bus
> > driver.
> The schematic for the board is https://linux-sunxi.org/images/5/50/OrangePi_3_Schematics_v1.5.pdf
> Which show a RTL8211E.
Most hardware will want all the regulators for the device turned on or
off en masse (possibly in a specific sequence) - it's rare for devices
to support only having some of their supplies enabled for extended
periods, I'd be surprised if something like a PHY did that.
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^ permalink raw reply [flat|nested] 25+ messages in thread