* [PATCH v3 0/4] pass -march= only to compiler
@ 2022-05-16 21:09 Nick Desaulniers
2022-05-16 21:09 ` [PATCH v3 1/4] ARM: remove lazy evaluation in Makefile Nick Desaulniers
` (4 more replies)
0 siblings, 5 replies; 13+ messages in thread
From: Nick Desaulniers @ 2022-05-16 21:09 UTC (permalink / raw)
To: Arnd Bergmann, Ard, Biesheuvel
Cc: Russell King, Masahiro Yamada, Linus Walleij, linux-arm-kernel,
linux-kernel, llvm, Nick Desaulniers
When both -march= and -Wa,-march= are specified for assembler or
assembler-with-cpp sources, GCC and Clang will prefer the -Wa,-march=
value but Clang will warn that -march= is unused.
warning: argument unused during compilation: '-march=armv6k'
[-Wunused-command-line-argument]
This is the top group of warnings we observe when using clang to
assemble the kernel via `ARCH=arm make LLVM=1`.
Arnd sent a v2 of my previous patch
https://lore.kernel.org/linux-arm-kernel/20210928154143.2106903-14-arnd@kernel.org/
I added yet a few more instances I found since then.
Fixing this will allow us to enable
-Werror=unused-command-line-argument for clang builds.
Nick Desaulniers (4):
ARM: remove lazy evaluation in Makefile
ARM: use .arch directives instead of assembler command line flags
ARM: only use -mtp=cp15 for the compiler
ARM: pass -march= only to compiler
arch/arm/Makefile | 76 ++++++++++++++++-------------
arch/arm/boot/compressed/Makefile | 1 -
arch/arm/common/Makefile | 2 -
arch/arm/common/mcpm_head.S | 2 +
arch/arm/common/vlock.S | 2 +
arch/arm/kernel/Makefile | 2 -
arch/arm/kernel/hyp-stub.S | 2 +
arch/arm/kernel/swp_emulate.c | 1 +
arch/arm/lib/Makefile | 4 --
arch/arm/lib/delay-loop.S | 4 ++
arch/arm/mach-at91/Makefile | 3 --
arch/arm/mach-at91/pm_suspend.S | 4 ++
arch/arm/mach-imx/Makefile | 3 --
arch/arm/mach-imx/headsmp.S | 2 +
arch/arm/mach-imx/resume-imx6.S | 2 +
arch/arm/mach-imx/suspend-imx6.S | 2 +
arch/arm/mach-mvebu/Makefile | 3 --
arch/arm/mach-mvebu/coherency_ll.S | 1 +
arch/arm/mach-mvebu/pmsu.c | 1 +
arch/arm/mach-npcm/Makefile | 2 -
arch/arm/mach-npcm/headsmp.S | 2 +
arch/arm/mach-tegra/Makefile | 2 -
arch/arm/mach-tegra/reset-handler.S | 2 +
arch/arm/mach-tegra/sleep-tegra20.S | 2 +
arch/arm/mach-tegra/sleep-tegra30.S | 2 +
arch/arm/mm/Makefile | 15 ------
arch/arm/mm/abort-ev6.S | 1 +
arch/arm/mm/abort-ev7.S | 1 +
arch/arm/mm/cache-v6.S | 2 +
arch/arm/mm/cache-v7.S | 2 +
arch/arm/mm/cache-v7m.S | 2 +
arch/arm/mm/copypage-feroceon.c | 1 +
arch/arm/mm/proc-v6.S | 2 +
arch/arm/mm/proc-v7-2level.S | 2 +
arch/arm/mm/proc-v7.S | 2 +
arch/arm/mm/tlb-v6.S | 2 +
arch/arm/mm/tlb-v7.S | 2 +
drivers/memory/Makefile | 2 -
drivers/memory/ti-emif-sram-pm.S | 1 +
drivers/soc/bcm/brcmstb/pm/Makefile | 1 -
drivers/soc/bcm/brcmstb/pm/s2-arm.S | 1 +
41 files changed, 94 insertions(+), 74 deletions(-)
base-commit: 0ac824f379fba2c2b17b75fd5ada69cd68c66348
--
2.36.0.550.gb090851708-goog
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 1/4] ARM: remove lazy evaluation in Makefile
2022-05-16 21:09 [PATCH v3 0/4] pass -march= only to compiler Nick Desaulniers
@ 2022-05-16 21:09 ` Nick Desaulniers
2022-05-16 21:15 ` Nick Desaulniers
2022-05-16 21:09 ` [PATCH v3 2/4] ARM: use .arch directives instead of assembler command line flags Nick Desaulniers
` (3 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Nick Desaulniers @ 2022-05-16 21:09 UTC (permalink / raw)
To: Arnd Bergmann, Ard, Biesheuvel
Cc: Russell King, Masahiro Yamada, Linus Walleij, linux-arm-kernel,
linux-kernel, llvm, Nick Desaulniers
arch-y and tune-y used lazy evaluation since they used to contain
cc-option checks. They don't any longer, so just eagerly evaluate these
command line flags.
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
---
arch/arm/Makefile | 60 +++++++++++++++++++++--------------------------
1 file changed, 27 insertions(+), 33 deletions(-)
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index a2391b8de5a5..99a7ed7e9f09 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -60,44 +60,38 @@ KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra)
# Note that GCC does not numerically define an architecture version
# macro, but instead defines a whole series of macros which makes
# testing for a specific architecture or later rather impossible.
-arch-$(CONFIG_CPU_32v7M) =-D__LINUX_ARM_ARCH__=7 -march=armv7-m
-arch-$(CONFIG_CPU_32v7) =-D__LINUX_ARM_ARCH__=7 -march=armv7-a
-arch-$(CONFIG_CPU_32v6) =-D__LINUX_ARM_ARCH__=6 -march=armv6
-# Only override the compiler option if ARMv6. The ARMv6K extensions are
+arch-$(CONFIG_CPU_32v7M) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-m
+arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-a
+arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 -march=armv6
+# Only override the compiler opt:ion if ARMv6. The ARMv6K extensions are
# always available in ARMv7
ifeq ($(CONFIG_CPU_32v6),y)
-arch-$(CONFIG_CPU_32v6K) =-D__LINUX_ARM_ARCH__=6 -march=armv6k
+arch-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6 -march=armv6k
endif
-arch-$(CONFIG_CPU_32v5) =-D__LINUX_ARM_ARCH__=5 -march=armv5te
-arch-$(CONFIG_CPU_32v4T) =-D__LINUX_ARM_ARCH__=4 -march=armv4t
-arch-$(CONFIG_CPU_32v4) =-D__LINUX_ARM_ARCH__=4 -march=armv4
-arch-$(CONFIG_CPU_32v3) =-D__LINUX_ARM_ARCH__=3 -march=armv3m
-
-# Evaluate arch cc-option calls now
-arch-y := $(arch-y)
+arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 -march=armv5te
+arch-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4 -march=armv4t
+arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4
+arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3m
# This selects how we optimise for the processor.
-tune-$(CONFIG_CPU_ARM7TDMI) =-mtune=arm7tdmi
-tune-$(CONFIG_CPU_ARM720T) =-mtune=arm7tdmi
-tune-$(CONFIG_CPU_ARM740T) =-mtune=arm7tdmi
-tune-$(CONFIG_CPU_ARM9TDMI) =-mtune=arm9tdmi
-tune-$(CONFIG_CPU_ARM940T) =-mtune=arm9tdmi
-tune-$(CONFIG_CPU_ARM946E) =-mtune=arm9e
-tune-$(CONFIG_CPU_ARM920T) =-mtune=arm9tdmi
-tune-$(CONFIG_CPU_ARM922T) =-mtune=arm9tdmi
-tune-$(CONFIG_CPU_ARM925T) =-mtune=arm9tdmi
-tune-$(CONFIG_CPU_ARM926T) =-mtune=arm9tdmi
-tune-$(CONFIG_CPU_FA526) =-mtune=arm9tdmi
-tune-$(CONFIG_CPU_SA110) =-mtune=strongarm110
-tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100
-tune-$(CONFIG_CPU_XSCALE) =-mtune=xscale
-tune-$(CONFIG_CPU_XSC3) =-mtune=xscale
-tune-$(CONFIG_CPU_FEROCEON) =-mtune=xscale
-tune-$(CONFIG_CPU_V6) =-mtune=arm1136j-s
-tune-$(CONFIG_CPU_V6K) =-mtune=arm1136j-s
-
-# Evaluate tune cc-option calls now
-tune-y := $(tune-y)
+tune-$(CONFIG_CPU_ARM7TDMI) :=-mtune=arm7tdmi
+tune-$(CONFIG_CPU_ARM720T) :=-mtune=arm7tdmi
+tune-$(CONFIG_CPU_ARM740T) :=-mtune=arm7tdmi
+tune-$(CONFIG_CPU_ARM9TDMI) :=-mtune=arm9tdmi
+tune-$(CONFIG_CPU_ARM940T) :=-mtune=arm9tdmi
+tune-$(CONFIG_CPU_ARM946E) :=-mtune=arm9e
+tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9tdmi
+tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi
+tune-$(CONFIG_CPU_ARM925T) :=-mtune=arm9tdmi
+tune-$(CONFIG_CPU_ARM926T) :=-mtune=arm9tdmi
+tune-$(CONFIG_CPU_FA526) :=-mtune=arm9tdmi
+tune-$(CONFIG_CPU_SA110) :=-mtune=strongarm110
+tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100
+tune-$(CONFIG_CPU_XSCALE) :=-mtune=xscale
+tune-$(CONFIG_CPU_XSC3) :=-mtune=xscale
+tune-$(CONFIG_CPU_FEROCEON) :=-mtune=xscale
+tune-$(CONFIG_CPU_V6) :=-mtune=arm1136j-s
+tune-$(CONFIG_CPU_V6K) :=-mtune=arm1136j-s
ifeq ($(CONFIG_AEABI),y)
CFLAGS_ABI :=-mabi=aapcs-linux -mfpu=vfp
--
2.36.0.550.gb090851708-goog
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 2/4] ARM: use .arch directives instead of assembler command line flags
2022-05-16 21:09 [PATCH v3 0/4] pass -march= only to compiler Nick Desaulniers
2022-05-16 21:09 ` [PATCH v3 1/4] ARM: remove lazy evaluation in Makefile Nick Desaulniers
@ 2022-05-16 21:09 ` Nick Desaulniers
2022-05-16 21:15 ` Nick Desaulniers
2022-05-16 21:09 ` [PATCH v3 3/4] ARM: only use -mtp=cp15 for the compiler Nick Desaulniers
` (2 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Nick Desaulniers @ 2022-05-16 21:09 UTC (permalink / raw)
To: Arnd Bergmann, Ard, Biesheuvel
Cc: Russell King, Masahiro Yamada, Linus Walleij, linux-arm-kernel,
linux-kernel, llvm, Nick Desaulniers
Similar to commit a6c30873ee4a ("ARM: 8989/1: use .fpu assembler
directives instead of assembler arguments").
GCC and GNU binutils support setting the "sub arch" via -march=,
-Wa,-march, target function attribute, and .arch assembler directive.
Clang was missing support for -Wa,-march=, but this was implemented in
clang-13.
The behavior of both GCC and Clang is to
prefer -Wa,-march= over -march= for assembler and assembler-with-cpp
sources, but Clang will warn about the -march= being unused.
clang: warning: argument unused during compilation: '-march=armv6k'
[-Wunused-command-line-argument]
Since most assembler is non-conditionally assembled with one sub arch
(modulo arch/arm/delay-loop.S which conditionally is assembled as armv4
based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is
conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the
.arch assembler directive.
Link: https://github.com/llvm/llvm-project/commit/1d51c699b9e2ebc5bcfdbe85c74cc871426333d4
Link: https://bugs.llvm.org/show_bug.cgi?id=48894
Link: https://github.com/ClangBuiltLinux/linux/issues/1195
Link: https://github.com/ClangBuiltLinux/linux/issues/1315
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
[arnd] add a few more instances found in compile testing
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/boot/compressed/Makefile | 1 -
arch/arm/common/Makefile | 2 --
arch/arm/common/mcpm_head.S | 2 ++
arch/arm/common/vlock.S | 2 ++
arch/arm/kernel/Makefile | 2 --
arch/arm/kernel/hyp-stub.S | 2 ++
arch/arm/kernel/swp_emulate.c | 1 +
arch/arm/lib/Makefile | 4 ----
arch/arm/lib/delay-loop.S | 4 ++++
arch/arm/mach-at91/Makefile | 3 ---
arch/arm/mach-at91/pm_suspend.S | 4 ++++
arch/arm/mach-imx/Makefile | 3 ---
arch/arm/mach-imx/headsmp.S | 2 ++
arch/arm/mach-imx/resume-imx6.S | 2 ++
arch/arm/mach-imx/suspend-imx6.S | 2 ++
arch/arm/mach-mvebu/Makefile | 3 ---
arch/arm/mach-mvebu/coherency_ll.S | 1 +
arch/arm/mach-mvebu/pmsu.c | 1 +
arch/arm/mach-npcm/Makefile | 2 --
arch/arm/mach-npcm/headsmp.S | 2 ++
arch/arm/mach-tegra/Makefile | 2 --
arch/arm/mach-tegra/reset-handler.S | 2 ++
arch/arm/mach-tegra/sleep-tegra20.S | 2 ++
arch/arm/mach-tegra/sleep-tegra30.S | 2 ++
arch/arm/mm/Makefile | 15 ---------------
arch/arm/mm/abort-ev6.S | 1 +
arch/arm/mm/abort-ev7.S | 1 +
arch/arm/mm/cache-v6.S | 2 ++
arch/arm/mm/cache-v7.S | 2 ++
arch/arm/mm/cache-v7m.S | 2 ++
arch/arm/mm/copypage-feroceon.c | 1 +
arch/arm/mm/proc-v6.S | 2 ++
arch/arm/mm/proc-v7-2level.S | 2 ++
arch/arm/mm/proc-v7.S | 2 ++
arch/arm/mm/tlb-v6.S | 2 ++
arch/arm/mm/tlb-v7.S | 2 ++
drivers/memory/Makefile | 2 --
drivers/memory/ti-emif-sram-pm.S | 1 +
drivers/soc/bcm/brcmstb/pm/Makefile | 1 -
drivers/soc/bcm/brcmstb/pm/s2-arm.S | 1 +
40 files changed, 52 insertions(+), 40 deletions(-)
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 41bcbb460fac..e5c80ff42a4f 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -163,4 +163,3 @@ $(obj)/piggy_data: $(obj)/../Image FORCE
$(obj)/piggy.o: $(obj)/piggy_data
CFLAGS_font.o := -Dstatic=
-AFLAGS_hyp-stub.o := -Wa,-march=armv7-a
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
index 8cd574be94cf..6a42600fa4c5 100644
--- a/arch/arm/common/Makefile
+++ b/arch/arm/common/Makefile
@@ -14,7 +14,5 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o
obj-$(CONFIG_CPU_V7) += secure_cntvoff.o
obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o
CFLAGS_REMOVE_mcpm_entry.o = -pg
-AFLAGS_mcpm_head.o := -march=armv7-a
-AFLAGS_vlock.o := -march=armv7-a
obj-$(CONFIG_BL_SWITCHER) += bL_switcher.o
obj-$(CONFIG_BL_SWITCHER_DUMMY_IF) += bL_switcher_dummy_if.o
diff --git a/arch/arm/common/mcpm_head.S b/arch/arm/common/mcpm_head.S
index 291d969bc719..299495c43dfd 100644
--- a/arch/arm/common/mcpm_head.S
+++ b/arch/arm/common/mcpm_head.S
@@ -15,6 +15,8 @@
#include "vlock.h"
+.arch armv7-a
+
.if MCPM_SYNC_CLUSTER_CPUS
.error "cpus must be the first member of struct mcpm_sync_struct"
.endif
diff --git a/arch/arm/common/vlock.S b/arch/arm/common/vlock.S
index f1c7fd44f1b1..1fa09c4697ed 100644
--- a/arch/arm/common/vlock.S
+++ b/arch/arm/common/vlock.S
@@ -12,6 +12,8 @@
#include <linux/linkage.h>
#include "vlock.h"
+.arch armv7-a
+
/* Select different code if voting flags can fit in a single word. */
#if VLOCK_VOTING_SIZE > 4
#define FEW(x...)
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 553866751e1a..e64ed3a82f70 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -71,7 +71,6 @@ obj-$(CONFIG_HAVE_TCM) += tcm.o
obj-$(CONFIG_OF) += devtree.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_SWP_EMULATE) += swp_emulate.o
-CFLAGS_swp_emulate.o := -Wa,-march=armv7-a
obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
@@ -100,7 +99,6 @@ CFLAGS_head-inflate-data.o := $(call cc-option,-Wframe-larger-than=10240)
obj-$(CONFIG_XIP_DEFLATED_DATA) += head-inflate-data.o
obj-$(CONFIG_ARM_VIRT_EXT) += hyp-stub.o
-AFLAGS_hyp-stub.o :=-Wa,-march=armv7-a
ifeq ($(CONFIG_ARM_PSCI),y)
obj-$(CONFIG_SMP) += psci_smp.o
endif
diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
index b699b22a4db1..3a506b9095a5 100644
--- a/arch/arm/kernel/hyp-stub.S
+++ b/arch/arm/kernel/hyp-stub.S
@@ -9,6 +9,8 @@
#include <asm/assembler.h>
#include <asm/virt.h>
+.arch armv7-a
+
#ifndef ZIMAGE
/*
* For the kernel proper, we need to find out the CPU boot mode long after
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
index b74bfcf94fb1..fdce83c95acb 100644
--- a/arch/arm/kernel/swp_emulate.c
+++ b/arch/arm/kernel/swp_emulate.c
@@ -34,6 +34,7 @@
*/
#define __user_swpX_asm(data, addr, res, temp, B) \
__asm__ __volatile__( \
+ ".arch armv7-a\n" \
"0: ldrex"B" %2, [%3]\n" \
"1: strex"B" %0, %1, [%3]\n" \
" cmp %0, #0\n" \
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 6d2ba454f25b..42fb75c06647 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -36,10 +36,6 @@ else
lib-y += io-readsw-armv4.o io-writesw-armv4.o
endif
-ifeq ($(CONFIG_ARCH_RPC),y)
- AFLAGS_delay-loop.o += -march=armv4
-endif
-
$(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S
$(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S
diff --git a/arch/arm/lib/delay-loop.S b/arch/arm/lib/delay-loop.S
index 3ccade0f8130..3ac05177d097 100644
--- a/arch/arm/lib/delay-loop.S
+++ b/arch/arm/lib/delay-loop.S
@@ -8,6 +8,10 @@
#include <asm/assembler.h>
#include <asm/delay.h>
+#ifdef CONFIG_ARCH_RPC
+ .arch armv4
+#endif
+
.text
.LC0: .word loops_per_jiffy
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 522b680b6446..e7a47fa03626 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -14,9 +14,6 @@ obj-$(CONFIG_SOC_SAMV7) += samv7.o
# Power Management
obj-$(CONFIG_ATMEL_PM) += pm.o pm_suspend.o
-ifeq ($(CONFIG_CPU_V7),y)
-AFLAGS_pm_suspend.o := -march=armv7-a
-endif
ifeq ($(CONFIG_PM_DEBUG),y)
CFLAGS_pm.o += -DDEBUG
endif
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index abe4ced33eda..f0aa220d668d 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -12,6 +12,10 @@
#include "pm.h"
#include "pm_data-offsets.h"
+#ifdef CONFIG_CPU_V7
+.arch armv7-a
+#endif
+
#define SRAMC_SELF_FRESH_ACTIVE 0x01
#define SRAMC_SELF_FRESH_EXIT 0x00
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 6fb3965b9ae6..5c650bf40e02 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -34,7 +34,6 @@ obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
obj-$(CONFIG_HAVE_IMX_SRC) += src.o
ifneq ($(CONFIG_SOC_IMX6)$(CONFIG_SOC_IMX7D_CA7)$(CONFIG_SOC_LS1021A),)
-AFLAGS_headsmp.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SMP) += headsmp.o platsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
endif
@@ -48,12 +47,10 @@ obj-$(CONFIG_SOC_IMX7D_CM4) += mach-imx7d-cm4.o
obj-$(CONFIG_SOC_IMX7ULP) += mach-imx7ulp.o pm-imx7ulp.o
ifeq ($(CONFIG_SUSPEND),y)
-AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o
obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o
endif
ifeq ($(CONFIG_ARM_CPU_SUSPEND),y)
-AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a
obj-$(CONFIG_SOC_IMX6) += resume-imx6.o
endif
obj-$(CONFIG_SOC_IMX6) += pm-imx6.o
diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S
index fcba58be8e79..5f9c7b48ae80 100644
--- a/arch/arm/mach-imx/headsmp.S
+++ b/arch/arm/mach-imx/headsmp.S
@@ -8,6 +8,8 @@
#include <linux/init.h>
#include <asm/assembler.h>
+.arch armv7-a
+
diag_reg_offset:
.word g_diag_reg - .
diff --git a/arch/arm/mach-imx/resume-imx6.S b/arch/arm/mach-imx/resume-imx6.S
index 5bd1ba7ef15b..2c0c5c771251 100644
--- a/arch/arm/mach-imx/resume-imx6.S
+++ b/arch/arm/mach-imx/resume-imx6.S
@@ -9,6 +9,8 @@
#include <asm/hardware/cache-l2x0.h>
#include "hardware.h"
+.arch armv7-a
+
/*
* The following code must assume it is running from physical address
* where absolute virtual addresses to the data section have to be
diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
index e06f946b75b9..63ccc2d0e920 100644
--- a/arch/arm/mach-imx/suspend-imx6.S
+++ b/arch/arm/mach-imx/suspend-imx6.S
@@ -9,6 +9,8 @@
#include <asm/hardware/cache-l2x0.h>
#include "hardware.h"
+.arch armv7-a
+
/*
* ==================== low level suspend ====================
*
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index cb106899dd7c..9b9fddb69958 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -1,9 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-orion/include
-AFLAGS_coherency_ll.o := -Wa,-march=armv7-a
-CFLAGS_pmsu.o := -march=armv7-a
-
obj-$(CONFIG_MACH_MVEBU_ANY) += system-controller.o mvebu-soc-id.o
ifeq ($(CONFIG_MACH_MVEBU_V7),y)
diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S
index a3a64bf97250..25197290632d 100644
--- a/arch/arm/mach-mvebu/coherency_ll.S
+++ b/arch/arm/mach-mvebu/coherency_ll.S
@@ -23,6 +23,7 @@
#include <asm/assembler.h>
#include <asm/cp15.h>
+ .arch armv7-a
.text
/*
* Returns the coherency base address in r1 (r0 is untouched), or 0 if
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index 73d5d72dfc3e..9a77cc3a10bd 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -294,6 +294,7 @@ int armada_370_xp_pmsu_idle_enter(unsigned long deepidle)
/* Test the CR_C bit and set it if it was cleared */
asm volatile(
+ ".arch armv7-a\n\t"
"mrc p15, 0, r0, c1, c0, 0 \n\t"
"tst r0, %0 \n\t"
"orreq r0, r0, #(1 << 2) \n\t"
diff --git a/arch/arm/mach-npcm/Makefile b/arch/arm/mach-npcm/Makefile
index 8d61fcd42fb1..ac83e1caf2ee 100644
--- a/arch/arm/mach-npcm/Makefile
+++ b/arch/arm/mach-npcm/Makefile
@@ -1,6 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
-AFLAGS_headsmp.o += -march=armv7-a
-
obj-$(CONFIG_ARCH_WPCM450) += wpcm450.o
obj-$(CONFIG_ARCH_NPCM7XX) += npcm7xx.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
diff --git a/arch/arm/mach-npcm/headsmp.S b/arch/arm/mach-npcm/headsmp.S
index c083fe09a07b..84d2b6daaf0b 100644
--- a/arch/arm/mach-npcm/headsmp.S
+++ b/arch/arm/mach-npcm/headsmp.S
@@ -6,6 +6,8 @@
#include <linux/init.h>
#include <asm/assembler.h>
+.arch armv7-a
+
/*
* The boot ROM does not start secondary CPUs in SVC mode, so we need to do that
* here.
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 07572b5373b8..a2bb55bc0081 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -1,6 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-asflags-y += -march=armv7-a
-
obj-y += io.o
obj-y += irq.o
obj-y += pm.o
diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index 06ca44b09381..0ea456264f3e 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -19,6 +19,8 @@
#define PMC_SCRATCH41 0x140
+.arch armv7-a
+
#ifdef CONFIG_PM_SLEEP
/*
* tegra_resume
diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S
index a5a36cce142a..d8cd487a8f63 100644
--- a/arch/arm/mach-tegra/sleep-tegra20.S
+++ b/arch/arm/mach-tegra/sleep-tegra20.S
@@ -47,6 +47,8 @@
#define PLLM_STORE_MASK (1 << 1)
#define PLLP_STORE_MASK (1 << 2)
+.arch armv7-a
+
.macro test_pll_state, rd, test_mask
ldr \rd, tegra_pll_state
tst \rd, #\test_mask
diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index 0cc40b6b2ba3..134ea5fe49b2 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -78,6 +78,8 @@
#define PLLX_STORE_MASK (1 << 4)
#define PLLM_PMC_STORE_MASK (1 << 5)
+.arch armv7-a
+
.macro emc_device_mask, rd, base
ldr \rd, [\base, #EMC_ADR_CFG]
tst \rd, #0x1
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 3510503bc5e6..71b858c9b10c 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -33,9 +33,6 @@ obj-$(CONFIG_CPU_ABRT_EV5TJ) += abort-ev5tj.o
obj-$(CONFIG_CPU_ABRT_EV6) += abort-ev6.o
obj-$(CONFIG_CPU_ABRT_EV7) += abort-ev7.o
-AFLAGS_abort-ev6.o :=-Wa,-march=armv6k
-AFLAGS_abort-ev7.o :=-Wa,-march=armv7-a
-
obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o
obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
@@ -49,10 +46,6 @@ obj-$(CONFIG_CPU_CACHE_FA) += cache-fa.o
obj-$(CONFIG_CPU_CACHE_NOP) += cache-nop.o
obj-$(CONFIG_CPU_CACHE_V7M) += cache-v7m.o
-AFLAGS_cache-v6.o :=-Wa,-march=armv6
-AFLAGS_cache-v7.o :=-Wa,-march=armv7-a
-AFLAGS_cache-v7m.o :=-Wa,-march=armv7-m
-
obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o
obj-$(CONFIG_CPU_COPY_V4WB) += copypage-v4wb.o
obj-$(CONFIG_CPU_COPY_FEROCEON) += copypage-feroceon.o
@@ -62,8 +55,6 @@ obj-$(CONFIG_CPU_XSCALE) += copypage-xscale.o
obj-$(CONFIG_CPU_XSC3) += copypage-xsc3.o
obj-$(CONFIG_CPU_COPY_FA) += copypage-fa.o
-CFLAGS_copypage-feroceon.o := -march=armv5te
-
obj-$(CONFIG_CPU_TLB_V4WT) += tlb-v4.o
obj-$(CONFIG_CPU_TLB_V4WB) += tlb-v4wb.o
obj-$(CONFIG_CPU_TLB_V4WBI) += tlb-v4wbi.o
@@ -72,9 +63,6 @@ obj-$(CONFIG_CPU_TLB_V6) += tlb-v6.o
obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o
obj-$(CONFIG_CPU_TLB_FA) += tlb-fa.o
-AFLAGS_tlb-v6.o :=-Wa,-march=armv6
-AFLAGS_tlb-v7.o :=-Wa,-march=armv7-a
-
obj-$(CONFIG_CPU_ARM7TDMI) += proc-arm7tdmi.o
obj-$(CONFIG_CPU_ARM720T) += proc-arm720.o
obj-$(CONFIG_CPU_ARM740T) += proc-arm740.o
@@ -101,9 +89,6 @@ obj-$(CONFIG_CPU_V6K) += proc-v6.o
obj-$(CONFIG_CPU_V7) += proc-v7.o proc-v7-bugs.o
obj-$(CONFIG_CPU_V7M) += proc-v7m.o
-AFLAGS_proc-v6.o :=-Wa,-march=armv6
-AFLAGS_proc-v7.o :=-Wa,-march=armv7-a
-
obj-$(CONFIG_OUTER_CACHE) += l2c-common.o
obj-$(CONFIG_CACHE_B15_RAC) += cache-b15-rac.o
obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
index c58bf8b43fea..836dc1299243 100644
--- a/arch/arm/mm/abort-ev6.S
+++ b/arch/arm/mm/abort-ev6.S
@@ -16,6 +16,7 @@
* abort here if the I-TLB and D-TLB aren't seeing the same
* picture. Unfortunately, this does happen. We live with it.
*/
+ .arch armv6k
.align 5
ENTRY(v6_early_abort)
mrc p15, 0, r1, c5, c0, 0 @ get FSR
diff --git a/arch/arm/mm/abort-ev7.S b/arch/arm/mm/abort-ev7.S
index f81bceacc660..53fb41c24774 100644
--- a/arch/arm/mm/abort-ev7.S
+++ b/arch/arm/mm/abort-ev7.S
@@ -12,6 +12,7 @@
*
* Purpose : obtain information about current aborted instruction.
*/
+ .arch armv7-a
.align 5
ENTRY(v7_early_abort)
mrc p15, 0, r1, c5, c0, 0 @ get FSR
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index f0f65eb073e4..250c83bf7158 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -19,6 +19,8 @@
#define D_CACHE_LINE_SIZE 32
#define BTB_FLUSH_SIZE 8
+.arch armv6
+
/*
* v6_flush_icache_all()
*
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 7c9499b728c4..127afe2096ba 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -16,6 +16,8 @@
#include "proc-macros.S"
+.arch armv7-a
+
#ifdef CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND
.globl icache_size
.data
diff --git a/arch/arm/mm/cache-v7m.S b/arch/arm/mm/cache-v7m.S
index 1bc3a0a50753..eb60b5e5e2ad 100644
--- a/arch/arm/mm/cache-v7m.S
+++ b/arch/arm/mm/cache-v7m.S
@@ -18,6 +18,8 @@
#include "proc-macros.S"
+.arch armv7-m
+
/* Generic V7M read/write macros for memory mapped cache operations */
.macro v7m_cache_read, rt, reg
movw \rt, #:lower16:BASEADDR_V7M_SCB + \reg
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
index 064b19e63571..5fc8ef1e665f 100644
--- a/arch/arm/mm/copypage-feroceon.c
+++ b/arch/arm/mm/copypage-feroceon.c
@@ -15,6 +15,7 @@ static void feroceon_copy_user_page(void *kto, const void *kfrom)
int tmp;
asm volatile ("\
+.arch armv5te \n\
1: ldmia %1!, {r2 - r7, ip, lr} \n\
pld [%1, #0] \n\
pld [%1, #32] \n\
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index a0618f3e6836..203dff89ab1a 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -32,6 +32,8 @@
#define TTB_FLAGS_SMP TTB_RGN_WBWA|TTB_S
#define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S
+.arch armv6
+
ENTRY(cpu_v6_proc_init)
ret lr
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
index 5db029c8f987..0a3083ad19c2 100644
--- a/arch/arm/mm/proc-v7-2level.S
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -24,6 +24,8 @@
#define TTB_FLAGS_SMP TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA
#define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S
+.arch armv7-a
+
/*
* cpu_v7_switch_mm(pgd_phys, tsk)
*
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 26d726a08a34..6b4ef9539b68 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -24,6 +24,8 @@
#include "proc-v7-2level.S"
#endif
+.arch armv7-a
+
ENTRY(cpu_v7_proc_init)
ret lr
ENDPROC(cpu_v7_proc_init)
diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S
index 74f4b383afe3..1d91e49b2c2d 100644
--- a/arch/arm/mm/tlb-v6.S
+++ b/arch/arm/mm/tlb-v6.S
@@ -17,6 +17,8 @@
#define HARVARD_TLB
+.arch armv6
+
/*
* v6wbi_flush_user_tlb_range(start, end, vma)
*
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
index 87bf4ab17721..35fd6d4f0d03 100644
--- a/arch/arm/mm/tlb-v7.S
+++ b/arch/arm/mm/tlb-v7.S
@@ -16,6 +16,8 @@
#include <asm/tlbflush.h>
#include "proc-macros.S"
+.arch armv7-a
+
/*
* v7wbi_flush_user_tlb_range(start, end, vma)
*
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index bc7663ed1c25..d1388a748872 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -32,8 +32,6 @@ obj-$(CONFIG_FPGA_DFL_EMIF) += dfl-emif.o
ti-emif-sram-objs := ti-emif-pm.o ti-emif-sram-pm.o
-AFLAGS_ti-emif-sram-pm.o :=-Wa,-march=armv7-a
-
$(obj)/ti-emif-sram-pm.o: $(obj)/ti-emif-asm-offsets.h
$(obj)/ti-emif-asm-offsets.h: $(obj)/emif-asm-offsets.s FORCE
diff --git a/drivers/memory/ti-emif-sram-pm.S b/drivers/memory/ti-emif-sram-pm.S
index d1c83bd5b98e..af2feb251303 100644
--- a/drivers/memory/ti-emif-sram-pm.S
+++ b/drivers/memory/ti-emif-sram-pm.S
@@ -36,6 +36,7 @@
.arm
.align 3
+ .arch armv7-a
ENTRY(ti_emif_sram)
diff --git a/drivers/soc/bcm/brcmstb/pm/Makefile b/drivers/soc/bcm/brcmstb/pm/Makefile
index 8e10abb14f8b..f849cfa69446 100644
--- a/drivers/soc/bcm/brcmstb/pm/Makefile
+++ b/drivers/soc/bcm/brcmstb/pm/Makefile
@@ -1,4 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_ARM) += s2-arm.o pm-arm.o
-AFLAGS_s2-arm.o := -march=armv7-a
obj-$(CONFIG_BMIPS_GENERIC) += s2-mips.o s3-mips.o pm-mips.o
diff --git a/drivers/soc/bcm/brcmstb/pm/s2-arm.S b/drivers/soc/bcm/brcmstb/pm/s2-arm.S
index 5f0c4a8ae9df..0d693795de27 100644
--- a/drivers/soc/bcm/brcmstb/pm/s2-arm.S
+++ b/drivers/soc/bcm/brcmstb/pm/s2-arm.S
@@ -8,6 +8,7 @@
#include "pm.h"
+ .arch armv7-a
.text
.align 3
--
2.36.0.550.gb090851708-goog
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 3/4] ARM: only use -mtp=cp15 for the compiler
2022-05-16 21:09 [PATCH v3 0/4] pass -march= only to compiler Nick Desaulniers
2022-05-16 21:09 ` [PATCH v3 1/4] ARM: remove lazy evaluation in Makefile Nick Desaulniers
2022-05-16 21:09 ` [PATCH v3 2/4] ARM: use .arch directives instead of assembler command line flags Nick Desaulniers
@ 2022-05-16 21:09 ` Nick Desaulniers
2022-05-16 21:15 ` Nick Desaulniers
2022-05-16 21:09 ` [PATCH v3 4/4] ARM: pass -march= only to compiler Nick Desaulniers
2022-05-16 21:14 ` [PATCH v3 0/4] " Nick Desaulniers
4 siblings, 1 reply; 13+ messages in thread
From: Nick Desaulniers @ 2022-05-16 21:09 UTC (permalink / raw)
To: Arnd Bergmann, Ard, Biesheuvel
Cc: Russell King, Masahiro Yamada, Linus Walleij, linux-arm-kernel,
linux-kernel, llvm, Nick Desaulniers
Avoids an error from the assembler for CONFIG_THUMB2 kernels:
clang-15: error: hardware TLS register is not supported for the thumbv4t
sub-architecture
This flag only makes sense to pass to the compiler, not the assembler.
Perhaps CFLAGS_ABI can be renamed to CPPFLAGS_ABI to reflect that they
will be passed to both the compiler and assembler for sources that
require pre-processing.
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
---
arch/arm/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 99a7ed7e9f09..1029c2503aef 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -108,7 +108,7 @@ CFLAGS_ABI += -meabi gnu
endif
ifeq ($(CONFIG_CURRENT_POINTER_IN_TPIDRURO),y)
-CFLAGS_ABI += -mtp=cp15
+KBUILD_CFLAGS += -mtp=cp15
endif
# Accept old syntax despite ".syntax unified"
--
2.36.0.550.gb090851708-goog
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v3 4/4] ARM: pass -march= only to compiler
2022-05-16 21:09 [PATCH v3 0/4] pass -march= only to compiler Nick Desaulniers
` (2 preceding siblings ...)
2022-05-16 21:09 ` [PATCH v3 3/4] ARM: only use -mtp=cp15 for the compiler Nick Desaulniers
@ 2022-05-16 21:09 ` Nick Desaulniers
2022-05-16 21:16 ` Nick Desaulniers
2022-05-18 1:25 ` kernel test robot
2022-05-16 21:14 ` [PATCH v3 0/4] " Nick Desaulniers
4 siblings, 2 replies; 13+ messages in thread
From: Nick Desaulniers @ 2022-05-16 21:09 UTC (permalink / raw)
To: Arnd Bergmann, Ard, Biesheuvel
Cc: Russell King, Masahiro Yamada, Linus Walleij, linux-arm-kernel,
linux-kernel, llvm, Nick Desaulniers
When both -march= and -Wa,-march= are specified for assembler or
assembler-with-cpp sources, GCC and Clang will prefer the -Wa,-march=
value but Clang will warn that -march= is unused.
warning: argument unused during compilation: '-march=armv6k'
[-Wunused-command-line-argument]
This is the top group of warnings we observe when using clang to
assemble the kernel via `ARCH=arm make LLVM=1`.
Split the arch-y make variable into two, so that -march= flags only get
passed to the compiler, not the assembler. -D flags are added to
KBUILD_CPPFLAGS which is used for both C and assembler-with-cpp sources.
Link: https://github.com/ClangBuiltLinux/linux/issues/1315
Link: https://github.com/ClangBuiltLinux/linux/issues/1587
Link: https://lore.kernel.org/llvm/628249e8.1c69fb81.d20fd.02ea@mx.google.com/
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
---
arch/arm/Makefile | 34 ++++++++++++++++++++++++----------
1 file changed, 24 insertions(+), 10 deletions(-)
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1029c2503aef..47a300f6f99c 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -57,21 +57,34 @@ endif
KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra)
# This selects which instruction set is used.
+arch-$(CONFIG_CPU_32v7M) :=-march=armv7-m
+arch-$(CONFIG_CPU_32v7) :=-march=armv7-a
+arch-$(CONFIG_CPU_32v6) :=-march=armv6
+# Only override the compiler option if ARMv6. The ARMv6K extensions are
+# always available in ARMv7
+ifeq ($(CONFIG_CPU_32v6),y)
+arch-$(CONFIG_CPU_32v6K) :=-march=armv6k
+endif
+arch-$(CONFIG_CPU_32v5) :=-march=armv5te
+arch-$(CONFIG_CPU_32v4T) :=-march=armv4t
+arch-$(CONFIG_CPU_32v4) :=-march=armv4
+arch-$(CONFIG_CPU_32v3) :=-march=armv3m
+
# Note that GCC does not numerically define an architecture version
# macro, but instead defines a whole series of macros which makes
# testing for a specific architecture or later rather impossible.
-arch-$(CONFIG_CPU_32v7M) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-m
-arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-a
-arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 -march=armv6
-# Only override the compiler opt:ion if ARMv6. The ARMv6K extensions are
+cpp-$(CONFIG_CPU_32v7M) :=-D__LINUX_ARM_ARCH__=7
+cpp-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7
+cpp-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6
+# Only override the compiler option if ARMv6. The ARMv6K extensions are
# always available in ARMv7
ifeq ($(CONFIG_CPU_32v6),y)
-arch-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6 -march=armv6k
+cpp-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6
endif
-arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 -march=armv5te
-arch-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4 -march=armv4t
-arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4
-arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3m
+cpp-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5
+cpp-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4
+cpp-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4
+cpp-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3
# This selects how we optimise for the processor.
tune-$(CONFIG_CPU_ARM7TDMI) :=-mtune=arm7tdmi
@@ -123,8 +136,9 @@ AFLAGS_ISA :=$(CFLAGS_ISA)
endif
# Need -Uarm for gcc < 3.x
+KBUILD_CPPFLAGS +=$(cpp-y)
KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
-KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
+KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) -Wa,$(arch-y) $(tune-y) -include asm/unified.h -msoft-float
CHECKFLAGS += -D__arm__
--
2.36.0.550.gb090851708-goog
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v3 0/4] pass -march= only to compiler
2022-05-16 21:09 [PATCH v3 0/4] pass -march= only to compiler Nick Desaulniers
` (3 preceding siblings ...)
2022-05-16 21:09 ` [PATCH v3 4/4] ARM: pass -march= only to compiler Nick Desaulniers
@ 2022-05-16 21:14 ` Nick Desaulniers
4 siblings, 0 replies; 13+ messages in thread
From: Nick Desaulniers @ 2022-05-16 21:14 UTC (permalink / raw)
To: Arnd Bergmann, Ard Biesheuvel
Cc: Russell King, Masahiro Yamada, Linus Walleij, linux-arm-kernel,
linux-kernel, llvm
+ Ard (I messed up my command line invocation of git send-email, sorry
for more noise)
https://lore.kernel.org/llvm/20220516210954.1660716-1-ndesaulniers@google.com/
On Mon, May 16, 2022 at 2:10 PM Nick Desaulniers
<ndesaulniers@google.com> wrote:
>
> When both -march= and -Wa,-march= are specified for assembler or
> assembler-with-cpp sources, GCC and Clang will prefer the -Wa,-march=
> value but Clang will warn that -march= is unused.
>
> warning: argument unused during compilation: '-march=armv6k'
> [-Wunused-command-line-argument]
>
> This is the top group of warnings we observe when using clang to
> assemble the kernel via `ARCH=arm make LLVM=1`.
>
> Arnd sent a v2 of my previous patch
> https://lore.kernel.org/linux-arm-kernel/20210928154143.2106903-14-arnd@kernel.org/
> I added yet a few more instances I found since then.
>
> Fixing this will allow us to enable
> -Werror=unused-command-line-argument for clang builds.
>
> Nick Desaulniers (4):
> ARM: remove lazy evaluation in Makefile
> ARM: use .arch directives instead of assembler command line flags
> ARM: only use -mtp=cp15 for the compiler
> ARM: pass -march= only to compiler
>
> arch/arm/Makefile | 76 ++++++++++++++++-------------
> arch/arm/boot/compressed/Makefile | 1 -
> arch/arm/common/Makefile | 2 -
> arch/arm/common/mcpm_head.S | 2 +
> arch/arm/common/vlock.S | 2 +
> arch/arm/kernel/Makefile | 2 -
> arch/arm/kernel/hyp-stub.S | 2 +
> arch/arm/kernel/swp_emulate.c | 1 +
> arch/arm/lib/Makefile | 4 --
> arch/arm/lib/delay-loop.S | 4 ++
> arch/arm/mach-at91/Makefile | 3 --
> arch/arm/mach-at91/pm_suspend.S | 4 ++
> arch/arm/mach-imx/Makefile | 3 --
> arch/arm/mach-imx/headsmp.S | 2 +
> arch/arm/mach-imx/resume-imx6.S | 2 +
> arch/arm/mach-imx/suspend-imx6.S | 2 +
> arch/arm/mach-mvebu/Makefile | 3 --
> arch/arm/mach-mvebu/coherency_ll.S | 1 +
> arch/arm/mach-mvebu/pmsu.c | 1 +
> arch/arm/mach-npcm/Makefile | 2 -
> arch/arm/mach-npcm/headsmp.S | 2 +
> arch/arm/mach-tegra/Makefile | 2 -
> arch/arm/mach-tegra/reset-handler.S | 2 +
> arch/arm/mach-tegra/sleep-tegra20.S | 2 +
> arch/arm/mach-tegra/sleep-tegra30.S | 2 +
> arch/arm/mm/Makefile | 15 ------
> arch/arm/mm/abort-ev6.S | 1 +
> arch/arm/mm/abort-ev7.S | 1 +
> arch/arm/mm/cache-v6.S | 2 +
> arch/arm/mm/cache-v7.S | 2 +
> arch/arm/mm/cache-v7m.S | 2 +
> arch/arm/mm/copypage-feroceon.c | 1 +
> arch/arm/mm/proc-v6.S | 2 +
> arch/arm/mm/proc-v7-2level.S | 2 +
> arch/arm/mm/proc-v7.S | 2 +
> arch/arm/mm/tlb-v6.S | 2 +
> arch/arm/mm/tlb-v7.S | 2 +
> drivers/memory/Makefile | 2 -
> drivers/memory/ti-emif-sram-pm.S | 1 +
> drivers/soc/bcm/brcmstb/pm/Makefile | 1 -
> drivers/soc/bcm/brcmstb/pm/s2-arm.S | 1 +
> 41 files changed, 94 insertions(+), 74 deletions(-)
>
>
> base-commit: 0ac824f379fba2c2b17b75fd5ada69cd68c66348
> --
> 2.36.0.550.gb090851708-goog
>
--
Thanks,
~Nick Desaulniers
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 1/4] ARM: remove lazy evaluation in Makefile
2022-05-16 21:09 ` [PATCH v3 1/4] ARM: remove lazy evaluation in Makefile Nick Desaulniers
@ 2022-05-16 21:15 ` Nick Desaulniers
0 siblings, 0 replies; 13+ messages in thread
From: Nick Desaulniers @ 2022-05-16 21:15 UTC (permalink / raw)
To: Arnd Bergmann, Ard Biesheuvel
Cc: Russell King, Masahiro Yamada, Linus Walleij, linux-arm-kernel,
linux-kernel, llvm
+ Ard (I messed up my command line invocation of git send-email, sorry
for more noise)
https://lore.kernel.org/llvm/20220516210954.1660716-1-ndesaulniers@google.com/
On Mon, May 16, 2022 at 2:10 PM Nick Desaulniers
<ndesaulniers@google.com> wrote:
>
> arch-y and tune-y used lazy evaluation since they used to contain
> cc-option checks. They don't any longer, so just eagerly evaluate these
> command line flags.
>
> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
> ---
> arch/arm/Makefile | 60 +++++++++++++++++++++--------------------------
> 1 file changed, 27 insertions(+), 33 deletions(-)
>
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index a2391b8de5a5..99a7ed7e9f09 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -60,44 +60,38 @@ KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra)
> # Note that GCC does not numerically define an architecture version
> # macro, but instead defines a whole series of macros which makes
> # testing for a specific architecture or later rather impossible.
> -arch-$(CONFIG_CPU_32v7M) =-D__LINUX_ARM_ARCH__=7 -march=armv7-m
> -arch-$(CONFIG_CPU_32v7) =-D__LINUX_ARM_ARCH__=7 -march=armv7-a
> -arch-$(CONFIG_CPU_32v6) =-D__LINUX_ARM_ARCH__=6 -march=armv6
> -# Only override the compiler option if ARMv6. The ARMv6K extensions are
> +arch-$(CONFIG_CPU_32v7M) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-m
> +arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-a
> +arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 -march=armv6
> +# Only override the compiler opt:ion if ARMv6. The ARMv6K extensions are
> # always available in ARMv7
> ifeq ($(CONFIG_CPU_32v6),y)
> -arch-$(CONFIG_CPU_32v6K) =-D__LINUX_ARM_ARCH__=6 -march=armv6k
> +arch-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6 -march=armv6k
> endif
> -arch-$(CONFIG_CPU_32v5) =-D__LINUX_ARM_ARCH__=5 -march=armv5te
> -arch-$(CONFIG_CPU_32v4T) =-D__LINUX_ARM_ARCH__=4 -march=armv4t
> -arch-$(CONFIG_CPU_32v4) =-D__LINUX_ARM_ARCH__=4 -march=armv4
> -arch-$(CONFIG_CPU_32v3) =-D__LINUX_ARM_ARCH__=3 -march=armv3m
> -
> -# Evaluate arch cc-option calls now
> -arch-y := $(arch-y)
> +arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 -march=armv5te
> +arch-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4 -march=armv4t
> +arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4
> +arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3m
>
> # This selects how we optimise for the processor.
> -tune-$(CONFIG_CPU_ARM7TDMI) =-mtune=arm7tdmi
> -tune-$(CONFIG_CPU_ARM720T) =-mtune=arm7tdmi
> -tune-$(CONFIG_CPU_ARM740T) =-mtune=arm7tdmi
> -tune-$(CONFIG_CPU_ARM9TDMI) =-mtune=arm9tdmi
> -tune-$(CONFIG_CPU_ARM940T) =-mtune=arm9tdmi
> -tune-$(CONFIG_CPU_ARM946E) =-mtune=arm9e
> -tune-$(CONFIG_CPU_ARM920T) =-mtune=arm9tdmi
> -tune-$(CONFIG_CPU_ARM922T) =-mtune=arm9tdmi
> -tune-$(CONFIG_CPU_ARM925T) =-mtune=arm9tdmi
> -tune-$(CONFIG_CPU_ARM926T) =-mtune=arm9tdmi
> -tune-$(CONFIG_CPU_FA526) =-mtune=arm9tdmi
> -tune-$(CONFIG_CPU_SA110) =-mtune=strongarm110
> -tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100
> -tune-$(CONFIG_CPU_XSCALE) =-mtune=xscale
> -tune-$(CONFIG_CPU_XSC3) =-mtune=xscale
> -tune-$(CONFIG_CPU_FEROCEON) =-mtune=xscale
> -tune-$(CONFIG_CPU_V6) =-mtune=arm1136j-s
> -tune-$(CONFIG_CPU_V6K) =-mtune=arm1136j-s
> -
> -# Evaluate tune cc-option calls now
> -tune-y := $(tune-y)
> +tune-$(CONFIG_CPU_ARM7TDMI) :=-mtune=arm7tdmi
> +tune-$(CONFIG_CPU_ARM720T) :=-mtune=arm7tdmi
> +tune-$(CONFIG_CPU_ARM740T) :=-mtune=arm7tdmi
> +tune-$(CONFIG_CPU_ARM9TDMI) :=-mtune=arm9tdmi
> +tune-$(CONFIG_CPU_ARM940T) :=-mtune=arm9tdmi
> +tune-$(CONFIG_CPU_ARM946E) :=-mtune=arm9e
> +tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9tdmi
> +tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi
> +tune-$(CONFIG_CPU_ARM925T) :=-mtune=arm9tdmi
> +tune-$(CONFIG_CPU_ARM926T) :=-mtune=arm9tdmi
> +tune-$(CONFIG_CPU_FA526) :=-mtune=arm9tdmi
> +tune-$(CONFIG_CPU_SA110) :=-mtune=strongarm110
> +tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100
> +tune-$(CONFIG_CPU_XSCALE) :=-mtune=xscale
> +tune-$(CONFIG_CPU_XSC3) :=-mtune=xscale
> +tune-$(CONFIG_CPU_FEROCEON) :=-mtune=xscale
> +tune-$(CONFIG_CPU_V6) :=-mtune=arm1136j-s
> +tune-$(CONFIG_CPU_V6K) :=-mtune=arm1136j-s
>
> ifeq ($(CONFIG_AEABI),y)
> CFLAGS_ABI :=-mabi=aapcs-linux -mfpu=vfp
> --
> 2.36.0.550.gb090851708-goog
>
--
Thanks,
~Nick Desaulniers
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 2/4] ARM: use .arch directives instead of assembler command line flags
2022-05-16 21:09 ` [PATCH v3 2/4] ARM: use .arch directives instead of assembler command line flags Nick Desaulniers
@ 2022-05-16 21:15 ` Nick Desaulniers
0 siblings, 0 replies; 13+ messages in thread
From: Nick Desaulniers @ 2022-05-16 21:15 UTC (permalink / raw)
To: Arnd Bergmann, Ard Biesheuvel
Cc: Russell King, Masahiro Yamada, Linus Walleij, linux-arm-kernel,
linux-kernel, llvm
+ Ard (I messed up my command line invocation of git send-email, sorry
for more noise)
https://lore.kernel.org/llvm/20220516210954.1660716-1-ndesaulniers@google.com/
On Mon, May 16, 2022 at 2:10 PM Nick Desaulniers
<ndesaulniers@google.com> wrote:
>
> Similar to commit a6c30873ee4a ("ARM: 8989/1: use .fpu assembler
> directives instead of assembler arguments").
>
> GCC and GNU binutils support setting the "sub arch" via -march=,
> -Wa,-march, target function attribute, and .arch assembler directive.
>
> Clang was missing support for -Wa,-march=, but this was implemented in
> clang-13.
>
> The behavior of both GCC and Clang is to
> prefer -Wa,-march= over -march= for assembler and assembler-with-cpp
> sources, but Clang will warn about the -march= being unused.
>
> clang: warning: argument unused during compilation: '-march=armv6k'
> [-Wunused-command-line-argument]
>
> Since most assembler is non-conditionally assembled with one sub arch
> (modulo arch/arm/delay-loop.S which conditionally is assembled as armv4
> based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is
> conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the
> .arch assembler directive.
>
> Link: https://github.com/llvm/llvm-project/commit/1d51c699b9e2ebc5bcfdbe85c74cc871426333d4
> Link: https://bugs.llvm.org/show_bug.cgi?id=48894
> Link: https://github.com/ClangBuiltLinux/linux/issues/1195
> Link: https://github.com/ClangBuiltLinux/linux/issues/1315
> Suggested-by: Arnd Bergmann <arnd@arndb.de>
> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
> [arnd] add a few more instances found in compile testing
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> arch/arm/boot/compressed/Makefile | 1 -
> arch/arm/common/Makefile | 2 --
> arch/arm/common/mcpm_head.S | 2 ++
> arch/arm/common/vlock.S | 2 ++
> arch/arm/kernel/Makefile | 2 --
> arch/arm/kernel/hyp-stub.S | 2 ++
> arch/arm/kernel/swp_emulate.c | 1 +
> arch/arm/lib/Makefile | 4 ----
> arch/arm/lib/delay-loop.S | 4 ++++
> arch/arm/mach-at91/Makefile | 3 ---
> arch/arm/mach-at91/pm_suspend.S | 4 ++++
> arch/arm/mach-imx/Makefile | 3 ---
> arch/arm/mach-imx/headsmp.S | 2 ++
> arch/arm/mach-imx/resume-imx6.S | 2 ++
> arch/arm/mach-imx/suspend-imx6.S | 2 ++
> arch/arm/mach-mvebu/Makefile | 3 ---
> arch/arm/mach-mvebu/coherency_ll.S | 1 +
> arch/arm/mach-mvebu/pmsu.c | 1 +
> arch/arm/mach-npcm/Makefile | 2 --
> arch/arm/mach-npcm/headsmp.S | 2 ++
> arch/arm/mach-tegra/Makefile | 2 --
> arch/arm/mach-tegra/reset-handler.S | 2 ++
> arch/arm/mach-tegra/sleep-tegra20.S | 2 ++
> arch/arm/mach-tegra/sleep-tegra30.S | 2 ++
> arch/arm/mm/Makefile | 15 ---------------
> arch/arm/mm/abort-ev6.S | 1 +
> arch/arm/mm/abort-ev7.S | 1 +
> arch/arm/mm/cache-v6.S | 2 ++
> arch/arm/mm/cache-v7.S | 2 ++
> arch/arm/mm/cache-v7m.S | 2 ++
> arch/arm/mm/copypage-feroceon.c | 1 +
> arch/arm/mm/proc-v6.S | 2 ++
> arch/arm/mm/proc-v7-2level.S | 2 ++
> arch/arm/mm/proc-v7.S | 2 ++
> arch/arm/mm/tlb-v6.S | 2 ++
> arch/arm/mm/tlb-v7.S | 2 ++
> drivers/memory/Makefile | 2 --
> drivers/memory/ti-emif-sram-pm.S | 1 +
> drivers/soc/bcm/brcmstb/pm/Makefile | 1 -
> drivers/soc/bcm/brcmstb/pm/s2-arm.S | 1 +
> 40 files changed, 52 insertions(+), 40 deletions(-)
>
> diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
> index 41bcbb460fac..e5c80ff42a4f 100644
> --- a/arch/arm/boot/compressed/Makefile
> +++ b/arch/arm/boot/compressed/Makefile
> @@ -163,4 +163,3 @@ $(obj)/piggy_data: $(obj)/../Image FORCE
> $(obj)/piggy.o: $(obj)/piggy_data
>
> CFLAGS_font.o := -Dstatic=
> -AFLAGS_hyp-stub.o := -Wa,-march=armv7-a
> diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile
> index 8cd574be94cf..6a42600fa4c5 100644
> --- a/arch/arm/common/Makefile
> +++ b/arch/arm/common/Makefile
> @@ -14,7 +14,5 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o
> obj-$(CONFIG_CPU_V7) += secure_cntvoff.o
> obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o
> CFLAGS_REMOVE_mcpm_entry.o = -pg
> -AFLAGS_mcpm_head.o := -march=armv7-a
> -AFLAGS_vlock.o := -march=armv7-a
> obj-$(CONFIG_BL_SWITCHER) += bL_switcher.o
> obj-$(CONFIG_BL_SWITCHER_DUMMY_IF) += bL_switcher_dummy_if.o
> diff --git a/arch/arm/common/mcpm_head.S b/arch/arm/common/mcpm_head.S
> index 291d969bc719..299495c43dfd 100644
> --- a/arch/arm/common/mcpm_head.S
> +++ b/arch/arm/common/mcpm_head.S
> @@ -15,6 +15,8 @@
>
> #include "vlock.h"
>
> +.arch armv7-a
> +
> .if MCPM_SYNC_CLUSTER_CPUS
> .error "cpus must be the first member of struct mcpm_sync_struct"
> .endif
> diff --git a/arch/arm/common/vlock.S b/arch/arm/common/vlock.S
> index f1c7fd44f1b1..1fa09c4697ed 100644
> --- a/arch/arm/common/vlock.S
> +++ b/arch/arm/common/vlock.S
> @@ -12,6 +12,8 @@
> #include <linux/linkage.h>
> #include "vlock.h"
>
> +.arch armv7-a
> +
> /* Select different code if voting flags can fit in a single word. */
> #if VLOCK_VOTING_SIZE > 4
> #define FEW(x...)
> diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
> index 553866751e1a..e64ed3a82f70 100644
> --- a/arch/arm/kernel/Makefile
> +++ b/arch/arm/kernel/Makefile
> @@ -71,7 +71,6 @@ obj-$(CONFIG_HAVE_TCM) += tcm.o
> obj-$(CONFIG_OF) += devtree.o
> obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
> obj-$(CONFIG_SWP_EMULATE) += swp_emulate.o
> -CFLAGS_swp_emulate.o := -Wa,-march=armv7-a
> obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
>
> obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
> @@ -100,7 +99,6 @@ CFLAGS_head-inflate-data.o := $(call cc-option,-Wframe-larger-than=10240)
> obj-$(CONFIG_XIP_DEFLATED_DATA) += head-inflate-data.o
>
> obj-$(CONFIG_ARM_VIRT_EXT) += hyp-stub.o
> -AFLAGS_hyp-stub.o :=-Wa,-march=armv7-a
> ifeq ($(CONFIG_ARM_PSCI),y)
> obj-$(CONFIG_SMP) += psci_smp.o
> endif
> diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
> index b699b22a4db1..3a506b9095a5 100644
> --- a/arch/arm/kernel/hyp-stub.S
> +++ b/arch/arm/kernel/hyp-stub.S
> @@ -9,6 +9,8 @@
> #include <asm/assembler.h>
> #include <asm/virt.h>
>
> +.arch armv7-a
> +
> #ifndef ZIMAGE
> /*
> * For the kernel proper, we need to find out the CPU boot mode long after
> diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
> index b74bfcf94fb1..fdce83c95acb 100644
> --- a/arch/arm/kernel/swp_emulate.c
> +++ b/arch/arm/kernel/swp_emulate.c
> @@ -34,6 +34,7 @@
> */
> #define __user_swpX_asm(data, addr, res, temp, B) \
> __asm__ __volatile__( \
> + ".arch armv7-a\n" \
> "0: ldrex"B" %2, [%3]\n" \
> "1: strex"B" %0, %1, [%3]\n" \
> " cmp %0, #0\n" \
> diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
> index 6d2ba454f25b..42fb75c06647 100644
> --- a/arch/arm/lib/Makefile
> +++ b/arch/arm/lib/Makefile
> @@ -36,10 +36,6 @@ else
> lib-y += io-readsw-armv4.o io-writesw-armv4.o
> endif
>
> -ifeq ($(CONFIG_ARCH_RPC),y)
> - AFLAGS_delay-loop.o += -march=armv4
> -endif
> -
> $(obj)/csumpartialcopy.o: $(obj)/csumpartialcopygeneric.S
> $(obj)/csumpartialcopyuser.o: $(obj)/csumpartialcopygeneric.S
>
> diff --git a/arch/arm/lib/delay-loop.S b/arch/arm/lib/delay-loop.S
> index 3ccade0f8130..3ac05177d097 100644
> --- a/arch/arm/lib/delay-loop.S
> +++ b/arch/arm/lib/delay-loop.S
> @@ -8,6 +8,10 @@
> #include <asm/assembler.h>
> #include <asm/delay.h>
>
> +#ifdef CONFIG_ARCH_RPC
> + .arch armv4
> +#endif
> +
> .text
>
> .LC0: .word loops_per_jiffy
> diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> index 522b680b6446..e7a47fa03626 100644
> --- a/arch/arm/mach-at91/Makefile
> +++ b/arch/arm/mach-at91/Makefile
> @@ -14,9 +14,6 @@ obj-$(CONFIG_SOC_SAMV7) += samv7.o
> # Power Management
> obj-$(CONFIG_ATMEL_PM) += pm.o pm_suspend.o
>
> -ifeq ($(CONFIG_CPU_V7),y)
> -AFLAGS_pm_suspend.o := -march=armv7-a
> -endif
> ifeq ($(CONFIG_PM_DEBUG),y)
> CFLAGS_pm.o += -DDEBUG
> endif
> diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
> index abe4ced33eda..f0aa220d668d 100644
> --- a/arch/arm/mach-at91/pm_suspend.S
> +++ b/arch/arm/mach-at91/pm_suspend.S
> @@ -12,6 +12,10 @@
> #include "pm.h"
> #include "pm_data-offsets.h"
>
> +#ifdef CONFIG_CPU_V7
> +.arch armv7-a
> +#endif
> +
> #define SRAMC_SELF_FRESH_ACTIVE 0x01
> #define SRAMC_SELF_FRESH_EXIT 0x00
>
> diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
> index 6fb3965b9ae6..5c650bf40e02 100644
> --- a/arch/arm/mach-imx/Makefile
> +++ b/arch/arm/mach-imx/Makefile
> @@ -34,7 +34,6 @@ obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
> obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
> obj-$(CONFIG_HAVE_IMX_SRC) += src.o
> ifneq ($(CONFIG_SOC_IMX6)$(CONFIG_SOC_IMX7D_CA7)$(CONFIG_SOC_LS1021A),)
> -AFLAGS_headsmp.o :=-Wa,-march=armv7-a
> obj-$(CONFIG_SMP) += headsmp.o platsmp.o
> obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
> endif
> @@ -48,12 +47,10 @@ obj-$(CONFIG_SOC_IMX7D_CM4) += mach-imx7d-cm4.o
> obj-$(CONFIG_SOC_IMX7ULP) += mach-imx7ulp.o pm-imx7ulp.o
>
> ifeq ($(CONFIG_SUSPEND),y)
> -AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
> obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o
> obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o
> endif
> ifeq ($(CONFIG_ARM_CPU_SUSPEND),y)
> -AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a
> obj-$(CONFIG_SOC_IMX6) += resume-imx6.o
> endif
> obj-$(CONFIG_SOC_IMX6) += pm-imx6.o
> diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S
> index fcba58be8e79..5f9c7b48ae80 100644
> --- a/arch/arm/mach-imx/headsmp.S
> +++ b/arch/arm/mach-imx/headsmp.S
> @@ -8,6 +8,8 @@
> #include <linux/init.h>
> #include <asm/assembler.h>
>
> +.arch armv7-a
> +
> diag_reg_offset:
> .word g_diag_reg - .
>
> diff --git a/arch/arm/mach-imx/resume-imx6.S b/arch/arm/mach-imx/resume-imx6.S
> index 5bd1ba7ef15b..2c0c5c771251 100644
> --- a/arch/arm/mach-imx/resume-imx6.S
> +++ b/arch/arm/mach-imx/resume-imx6.S
> @@ -9,6 +9,8 @@
> #include <asm/hardware/cache-l2x0.h>
> #include "hardware.h"
>
> +.arch armv7-a
> +
> /*
> * The following code must assume it is running from physical address
> * where absolute virtual addresses to the data section have to be
> diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
> index e06f946b75b9..63ccc2d0e920 100644
> --- a/arch/arm/mach-imx/suspend-imx6.S
> +++ b/arch/arm/mach-imx/suspend-imx6.S
> @@ -9,6 +9,8 @@
> #include <asm/hardware/cache-l2x0.h>
> #include "hardware.h"
>
> +.arch armv7-a
> +
> /*
> * ==================== low level suspend ====================
> *
> diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
> index cb106899dd7c..9b9fddb69958 100644
> --- a/arch/arm/mach-mvebu/Makefile
> +++ b/arch/arm/mach-mvebu/Makefile
> @@ -1,9 +1,6 @@
> # SPDX-License-Identifier: GPL-2.0
> ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-orion/include
>
> -AFLAGS_coherency_ll.o := -Wa,-march=armv7-a
> -CFLAGS_pmsu.o := -march=armv7-a
> -
> obj-$(CONFIG_MACH_MVEBU_ANY) += system-controller.o mvebu-soc-id.o
>
> ifeq ($(CONFIG_MACH_MVEBU_V7),y)
> diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S
> index a3a64bf97250..25197290632d 100644
> --- a/arch/arm/mach-mvebu/coherency_ll.S
> +++ b/arch/arm/mach-mvebu/coherency_ll.S
> @@ -23,6 +23,7 @@
> #include <asm/assembler.h>
> #include <asm/cp15.h>
>
> + .arch armv7-a
> .text
> /*
> * Returns the coherency base address in r1 (r0 is untouched), or 0 if
> diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
> index 73d5d72dfc3e..9a77cc3a10bd 100644
> --- a/arch/arm/mach-mvebu/pmsu.c
> +++ b/arch/arm/mach-mvebu/pmsu.c
> @@ -294,6 +294,7 @@ int armada_370_xp_pmsu_idle_enter(unsigned long deepidle)
>
> /* Test the CR_C bit and set it if it was cleared */
> asm volatile(
> + ".arch armv7-a\n\t"
> "mrc p15, 0, r0, c1, c0, 0 \n\t"
> "tst r0, %0 \n\t"
> "orreq r0, r0, #(1 << 2) \n\t"
> diff --git a/arch/arm/mach-npcm/Makefile b/arch/arm/mach-npcm/Makefile
> index 8d61fcd42fb1..ac83e1caf2ee 100644
> --- a/arch/arm/mach-npcm/Makefile
> +++ b/arch/arm/mach-npcm/Makefile
> @@ -1,6 +1,4 @@
> # SPDX-License-Identifier: GPL-2.0-only
> -AFLAGS_headsmp.o += -march=armv7-a
> -
> obj-$(CONFIG_ARCH_WPCM450) += wpcm450.o
> obj-$(CONFIG_ARCH_NPCM7XX) += npcm7xx.o
> obj-$(CONFIG_SMP) += platsmp.o headsmp.o
> diff --git a/arch/arm/mach-npcm/headsmp.S b/arch/arm/mach-npcm/headsmp.S
> index c083fe09a07b..84d2b6daaf0b 100644
> --- a/arch/arm/mach-npcm/headsmp.S
> +++ b/arch/arm/mach-npcm/headsmp.S
> @@ -6,6 +6,8 @@
> #include <linux/init.h>
> #include <asm/assembler.h>
>
> +.arch armv7-a
> +
> /*
> * The boot ROM does not start secondary CPUs in SVC mode, so we need to do that
> * here.
> diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
> index 07572b5373b8..a2bb55bc0081 100644
> --- a/arch/arm/mach-tegra/Makefile
> +++ b/arch/arm/mach-tegra/Makefile
> @@ -1,6 +1,4 @@
> # SPDX-License-Identifier: GPL-2.0
> -asflags-y += -march=armv7-a
> -
> obj-y += io.o
> obj-y += irq.o
> obj-y += pm.o
> diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
> index 06ca44b09381..0ea456264f3e 100644
> --- a/arch/arm/mach-tegra/reset-handler.S
> +++ b/arch/arm/mach-tegra/reset-handler.S
> @@ -19,6 +19,8 @@
>
> #define PMC_SCRATCH41 0x140
>
> +.arch armv7-a
> +
> #ifdef CONFIG_PM_SLEEP
> /*
> * tegra_resume
> diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S
> index a5a36cce142a..d8cd487a8f63 100644
> --- a/arch/arm/mach-tegra/sleep-tegra20.S
> +++ b/arch/arm/mach-tegra/sleep-tegra20.S
> @@ -47,6 +47,8 @@
> #define PLLM_STORE_MASK (1 << 1)
> #define PLLP_STORE_MASK (1 << 2)
>
> +.arch armv7-a
> +
> .macro test_pll_state, rd, test_mask
> ldr \rd, tegra_pll_state
> tst \rd, #\test_mask
> diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
> index 0cc40b6b2ba3..134ea5fe49b2 100644
> --- a/arch/arm/mach-tegra/sleep-tegra30.S
> +++ b/arch/arm/mach-tegra/sleep-tegra30.S
> @@ -78,6 +78,8 @@
> #define PLLX_STORE_MASK (1 << 4)
> #define PLLM_PMC_STORE_MASK (1 << 5)
>
> +.arch armv7-a
> +
> .macro emc_device_mask, rd, base
> ldr \rd, [\base, #EMC_ADR_CFG]
> tst \rd, #0x1
> diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
> index 3510503bc5e6..71b858c9b10c 100644
> --- a/arch/arm/mm/Makefile
> +++ b/arch/arm/mm/Makefile
> @@ -33,9 +33,6 @@ obj-$(CONFIG_CPU_ABRT_EV5TJ) += abort-ev5tj.o
> obj-$(CONFIG_CPU_ABRT_EV6) += abort-ev6.o
> obj-$(CONFIG_CPU_ABRT_EV7) += abort-ev7.o
>
> -AFLAGS_abort-ev6.o :=-Wa,-march=armv6k
> -AFLAGS_abort-ev7.o :=-Wa,-march=armv7-a
> -
> obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o
> obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
> obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
> @@ -49,10 +46,6 @@ obj-$(CONFIG_CPU_CACHE_FA) += cache-fa.o
> obj-$(CONFIG_CPU_CACHE_NOP) += cache-nop.o
> obj-$(CONFIG_CPU_CACHE_V7M) += cache-v7m.o
>
> -AFLAGS_cache-v6.o :=-Wa,-march=armv6
> -AFLAGS_cache-v7.o :=-Wa,-march=armv7-a
> -AFLAGS_cache-v7m.o :=-Wa,-march=armv7-m
> -
> obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o
> obj-$(CONFIG_CPU_COPY_V4WB) += copypage-v4wb.o
> obj-$(CONFIG_CPU_COPY_FEROCEON) += copypage-feroceon.o
> @@ -62,8 +55,6 @@ obj-$(CONFIG_CPU_XSCALE) += copypage-xscale.o
> obj-$(CONFIG_CPU_XSC3) += copypage-xsc3.o
> obj-$(CONFIG_CPU_COPY_FA) += copypage-fa.o
>
> -CFLAGS_copypage-feroceon.o := -march=armv5te
> -
> obj-$(CONFIG_CPU_TLB_V4WT) += tlb-v4.o
> obj-$(CONFIG_CPU_TLB_V4WB) += tlb-v4wb.o
> obj-$(CONFIG_CPU_TLB_V4WBI) += tlb-v4wbi.o
> @@ -72,9 +63,6 @@ obj-$(CONFIG_CPU_TLB_V6) += tlb-v6.o
> obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o
> obj-$(CONFIG_CPU_TLB_FA) += tlb-fa.o
>
> -AFLAGS_tlb-v6.o :=-Wa,-march=armv6
> -AFLAGS_tlb-v7.o :=-Wa,-march=armv7-a
> -
> obj-$(CONFIG_CPU_ARM7TDMI) += proc-arm7tdmi.o
> obj-$(CONFIG_CPU_ARM720T) += proc-arm720.o
> obj-$(CONFIG_CPU_ARM740T) += proc-arm740.o
> @@ -101,9 +89,6 @@ obj-$(CONFIG_CPU_V6K) += proc-v6.o
> obj-$(CONFIG_CPU_V7) += proc-v7.o proc-v7-bugs.o
> obj-$(CONFIG_CPU_V7M) += proc-v7m.o
>
> -AFLAGS_proc-v6.o :=-Wa,-march=armv6
> -AFLAGS_proc-v7.o :=-Wa,-march=armv7-a
> -
> obj-$(CONFIG_OUTER_CACHE) += l2c-common.o
> obj-$(CONFIG_CACHE_B15_RAC) += cache-b15-rac.o
> obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o
> diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
> index c58bf8b43fea..836dc1299243 100644
> --- a/arch/arm/mm/abort-ev6.S
> +++ b/arch/arm/mm/abort-ev6.S
> @@ -16,6 +16,7 @@
> * abort here if the I-TLB and D-TLB aren't seeing the same
> * picture. Unfortunately, this does happen. We live with it.
> */
> + .arch armv6k
> .align 5
> ENTRY(v6_early_abort)
> mrc p15, 0, r1, c5, c0, 0 @ get FSR
> diff --git a/arch/arm/mm/abort-ev7.S b/arch/arm/mm/abort-ev7.S
> index f81bceacc660..53fb41c24774 100644
> --- a/arch/arm/mm/abort-ev7.S
> +++ b/arch/arm/mm/abort-ev7.S
> @@ -12,6 +12,7 @@
> *
> * Purpose : obtain information about current aborted instruction.
> */
> + .arch armv7-a
> .align 5
> ENTRY(v7_early_abort)
> mrc p15, 0, r1, c5, c0, 0 @ get FSR
> diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
> index f0f65eb073e4..250c83bf7158 100644
> --- a/arch/arm/mm/cache-v6.S
> +++ b/arch/arm/mm/cache-v6.S
> @@ -19,6 +19,8 @@
> #define D_CACHE_LINE_SIZE 32
> #define BTB_FLUSH_SIZE 8
>
> +.arch armv6
> +
> /*
> * v6_flush_icache_all()
> *
> diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
> index 7c9499b728c4..127afe2096ba 100644
> --- a/arch/arm/mm/cache-v7.S
> +++ b/arch/arm/mm/cache-v7.S
> @@ -16,6 +16,8 @@
>
> #include "proc-macros.S"
>
> +.arch armv7-a
> +
> #ifdef CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND
> .globl icache_size
> .data
> diff --git a/arch/arm/mm/cache-v7m.S b/arch/arm/mm/cache-v7m.S
> index 1bc3a0a50753..eb60b5e5e2ad 100644
> --- a/arch/arm/mm/cache-v7m.S
> +++ b/arch/arm/mm/cache-v7m.S
> @@ -18,6 +18,8 @@
>
> #include "proc-macros.S"
>
> +.arch armv7-m
> +
> /* Generic V7M read/write macros for memory mapped cache operations */
> .macro v7m_cache_read, rt, reg
> movw \rt, #:lower16:BASEADDR_V7M_SCB + \reg
> diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
> index 064b19e63571..5fc8ef1e665f 100644
> --- a/arch/arm/mm/copypage-feroceon.c
> +++ b/arch/arm/mm/copypage-feroceon.c
> @@ -15,6 +15,7 @@ static void feroceon_copy_user_page(void *kto, const void *kfrom)
> int tmp;
>
> asm volatile ("\
> +.arch armv5te \n\
> 1: ldmia %1!, {r2 - r7, ip, lr} \n\
> pld [%1, #0] \n\
> pld [%1, #32] \n\
> diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
> index a0618f3e6836..203dff89ab1a 100644
> --- a/arch/arm/mm/proc-v6.S
> +++ b/arch/arm/mm/proc-v6.S
> @@ -32,6 +32,8 @@
> #define TTB_FLAGS_SMP TTB_RGN_WBWA|TTB_S
> #define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S
>
> +.arch armv6
> +
> ENTRY(cpu_v6_proc_init)
> ret lr
>
> diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
> index 5db029c8f987..0a3083ad19c2 100644
> --- a/arch/arm/mm/proc-v7-2level.S
> +++ b/arch/arm/mm/proc-v7-2level.S
> @@ -24,6 +24,8 @@
> #define TTB_FLAGS_SMP TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA
> #define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S
>
> +.arch armv7-a
> +
> /*
> * cpu_v7_switch_mm(pgd_phys, tsk)
> *
> diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
> index 26d726a08a34..6b4ef9539b68 100644
> --- a/arch/arm/mm/proc-v7.S
> +++ b/arch/arm/mm/proc-v7.S
> @@ -24,6 +24,8 @@
> #include "proc-v7-2level.S"
> #endif
>
> +.arch armv7-a
> +
> ENTRY(cpu_v7_proc_init)
> ret lr
> ENDPROC(cpu_v7_proc_init)
> diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S
> index 74f4b383afe3..1d91e49b2c2d 100644
> --- a/arch/arm/mm/tlb-v6.S
> +++ b/arch/arm/mm/tlb-v6.S
> @@ -17,6 +17,8 @@
>
> #define HARVARD_TLB
>
> +.arch armv6
> +
> /*
> * v6wbi_flush_user_tlb_range(start, end, vma)
> *
> diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
> index 87bf4ab17721..35fd6d4f0d03 100644
> --- a/arch/arm/mm/tlb-v7.S
> +++ b/arch/arm/mm/tlb-v7.S
> @@ -16,6 +16,8 @@
> #include <asm/tlbflush.h>
> #include "proc-macros.S"
>
> +.arch armv7-a
> +
> /*
> * v7wbi_flush_user_tlb_range(start, end, vma)
> *
> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
> index bc7663ed1c25..d1388a748872 100644
> --- a/drivers/memory/Makefile
> +++ b/drivers/memory/Makefile
> @@ -32,8 +32,6 @@ obj-$(CONFIG_FPGA_DFL_EMIF) += dfl-emif.o
>
> ti-emif-sram-objs := ti-emif-pm.o ti-emif-sram-pm.o
>
> -AFLAGS_ti-emif-sram-pm.o :=-Wa,-march=armv7-a
> -
> $(obj)/ti-emif-sram-pm.o: $(obj)/ti-emif-asm-offsets.h
>
> $(obj)/ti-emif-asm-offsets.h: $(obj)/emif-asm-offsets.s FORCE
> diff --git a/drivers/memory/ti-emif-sram-pm.S b/drivers/memory/ti-emif-sram-pm.S
> index d1c83bd5b98e..af2feb251303 100644
> --- a/drivers/memory/ti-emif-sram-pm.S
> +++ b/drivers/memory/ti-emif-sram-pm.S
> @@ -36,6 +36,7 @@
>
> .arm
> .align 3
> + .arch armv7-a
>
> ENTRY(ti_emif_sram)
>
> diff --git a/drivers/soc/bcm/brcmstb/pm/Makefile b/drivers/soc/bcm/brcmstb/pm/Makefile
> index 8e10abb14f8b..f849cfa69446 100644
> --- a/drivers/soc/bcm/brcmstb/pm/Makefile
> +++ b/drivers/soc/bcm/brcmstb/pm/Makefile
> @@ -1,4 +1,3 @@
> # SPDX-License-Identifier: GPL-2.0-only
> obj-$(CONFIG_ARM) += s2-arm.o pm-arm.o
> -AFLAGS_s2-arm.o := -march=armv7-a
> obj-$(CONFIG_BMIPS_GENERIC) += s2-mips.o s3-mips.o pm-mips.o
> diff --git a/drivers/soc/bcm/brcmstb/pm/s2-arm.S b/drivers/soc/bcm/brcmstb/pm/s2-arm.S
> index 5f0c4a8ae9df..0d693795de27 100644
> --- a/drivers/soc/bcm/brcmstb/pm/s2-arm.S
> +++ b/drivers/soc/bcm/brcmstb/pm/s2-arm.S
> @@ -8,6 +8,7 @@
>
> #include "pm.h"
>
> + .arch armv7-a
> .text
> .align 3
>
> --
> 2.36.0.550.gb090851708-goog
>
--
Thanks,
~Nick Desaulniers
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 3/4] ARM: only use -mtp=cp15 for the compiler
2022-05-16 21:09 ` [PATCH v3 3/4] ARM: only use -mtp=cp15 for the compiler Nick Desaulniers
@ 2022-05-16 21:15 ` Nick Desaulniers
0 siblings, 0 replies; 13+ messages in thread
From: Nick Desaulniers @ 2022-05-16 21:15 UTC (permalink / raw)
To: Arnd Bergmann, Ard Biesheuvel
Cc: Russell King, Masahiro Yamada, Linus Walleij, linux-arm-kernel,
linux-kernel, llvm
+ Ard (I messed up my command line invocation of git send-email, sorry
for more noise)
https://lore.kernel.org/llvm/20220516210954.1660716-1-ndesaulniers@google.com/
On Mon, May 16, 2022 at 2:10 PM Nick Desaulniers
<ndesaulniers@google.com> wrote:
>
> Avoids an error from the assembler for CONFIG_THUMB2 kernels:
>
> clang-15: error: hardware TLS register is not supported for the thumbv4t
> sub-architecture
>
> This flag only makes sense to pass to the compiler, not the assembler.
>
> Perhaps CFLAGS_ABI can be renamed to CPPFLAGS_ABI to reflect that they
> will be passed to both the compiler and assembler for sources that
> require pre-processing.
>
> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
> ---
> arch/arm/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 99a7ed7e9f09..1029c2503aef 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -108,7 +108,7 @@ CFLAGS_ABI += -meabi gnu
> endif
>
> ifeq ($(CONFIG_CURRENT_POINTER_IN_TPIDRURO),y)
> -CFLAGS_ABI += -mtp=cp15
> +KBUILD_CFLAGS += -mtp=cp15
> endif
>
> # Accept old syntax despite ".syntax unified"
> --
> 2.36.0.550.gb090851708-goog
>
--
Thanks,
~Nick Desaulniers
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 4/4] ARM: pass -march= only to compiler
2022-05-16 21:09 ` [PATCH v3 4/4] ARM: pass -march= only to compiler Nick Desaulniers
@ 2022-05-16 21:16 ` Nick Desaulniers
2022-05-18 1:25 ` kernel test robot
1 sibling, 0 replies; 13+ messages in thread
From: Nick Desaulniers @ 2022-05-16 21:16 UTC (permalink / raw)
To: Arnd Bergmann, Ard Biesheuvel
Cc: Russell King, Masahiro Yamada, Linus Walleij, linux-arm-kernel,
linux-kernel, llvm
+ Ard (I messed up my command line invocation of git send-email, sorry
for more noise)
https://lore.kernel.org/llvm/20220516210954.1660716-1-ndesaulniers@google.com/
On Mon, May 16, 2022 at 2:10 PM Nick Desaulniers
<ndesaulniers@google.com> wrote:
>
> When both -march= and -Wa,-march= are specified for assembler or
> assembler-with-cpp sources, GCC and Clang will prefer the -Wa,-march=
> value but Clang will warn that -march= is unused.
>
> warning: argument unused during compilation: '-march=armv6k'
> [-Wunused-command-line-argument]
>
> This is the top group of warnings we observe when using clang to
> assemble the kernel via `ARCH=arm make LLVM=1`.
>
> Split the arch-y make variable into two, so that -march= flags only get
> passed to the compiler, not the assembler. -D flags are added to
> KBUILD_CPPFLAGS which is used for both C and assembler-with-cpp sources.
>
> Link: https://github.com/ClangBuiltLinux/linux/issues/1315
> Link: https://github.com/ClangBuiltLinux/linux/issues/1587
> Link: https://lore.kernel.org/llvm/628249e8.1c69fb81.d20fd.02ea@mx.google.com/
> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
> ---
> arch/arm/Makefile | 34 ++++++++++++++++++++++++----------
> 1 file changed, 24 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 1029c2503aef..47a300f6f99c 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -57,21 +57,34 @@ endif
> KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra)
>
> # This selects which instruction set is used.
> +arch-$(CONFIG_CPU_32v7M) :=-march=armv7-m
> +arch-$(CONFIG_CPU_32v7) :=-march=armv7-a
> +arch-$(CONFIG_CPU_32v6) :=-march=armv6
> +# Only override the compiler option if ARMv6. The ARMv6K extensions are
> +# always available in ARMv7
> +ifeq ($(CONFIG_CPU_32v6),y)
> +arch-$(CONFIG_CPU_32v6K) :=-march=armv6k
> +endif
> +arch-$(CONFIG_CPU_32v5) :=-march=armv5te
> +arch-$(CONFIG_CPU_32v4T) :=-march=armv4t
> +arch-$(CONFIG_CPU_32v4) :=-march=armv4
> +arch-$(CONFIG_CPU_32v3) :=-march=armv3m
> +
> # Note that GCC does not numerically define an architecture version
> # macro, but instead defines a whole series of macros which makes
> # testing for a specific architecture or later rather impossible.
> -arch-$(CONFIG_CPU_32v7M) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-m
> -arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 -march=armv7-a
> -arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 -march=armv6
> -# Only override the compiler opt:ion if ARMv6. The ARMv6K extensions are
> +cpp-$(CONFIG_CPU_32v7M) :=-D__LINUX_ARM_ARCH__=7
> +cpp-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7
> +cpp-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6
> +# Only override the compiler option if ARMv6. The ARMv6K extensions are
> # always available in ARMv7
> ifeq ($(CONFIG_CPU_32v6),y)
> -arch-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6 -march=armv6k
> +cpp-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6
> endif
> -arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 -march=armv5te
> -arch-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4 -march=armv4t
> -arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4
> -arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3m
> +cpp-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5
> +cpp-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4
> +cpp-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4
> +cpp-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3
>
> # This selects how we optimise for the processor.
> tune-$(CONFIG_CPU_ARM7TDMI) :=-mtune=arm7tdmi
> @@ -123,8 +136,9 @@ AFLAGS_ISA :=$(CFLAGS_ISA)
> endif
>
> # Need -Uarm for gcc < 3.x
> +KBUILD_CPPFLAGS +=$(cpp-y)
> KBUILD_CFLAGS +=$(CFLAGS_ABI) $(CFLAGS_ISA) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm
> -KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) $(arch-y) $(tune-y) -include asm/unified.h -msoft-float
> +KBUILD_AFLAGS +=$(CFLAGS_ABI) $(AFLAGS_ISA) -Wa,$(arch-y) $(tune-y) -include asm/unified.h -msoft-float
>
> CHECKFLAGS += -D__arm__
>
> --
> 2.36.0.550.gb090851708-goog
>
--
Thanks,
~Nick Desaulniers
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 4/4] ARM: pass -march= only to compiler
2022-05-16 21:09 ` [PATCH v3 4/4] ARM: pass -march= only to compiler Nick Desaulniers
2022-05-16 21:16 ` Nick Desaulniers
@ 2022-05-18 1:25 ` kernel test robot
2022-05-18 22:38 ` Nick Desaulniers
1 sibling, 1 reply; 13+ messages in thread
From: kernel test robot @ 2022-05-18 1:25 UTC (permalink / raw)
To: Nick Desaulniers, Arnd Bergmann, Ard, Biesheuvel
Cc: llvm, kbuild-all, Russell King, Masahiro Yamada, Linus Walleij,
linux-arm-kernel, linux-kernel, Nick Desaulniers
Hi Nick,
I love your patch! Yet something to improve:
[auto build test ERROR on 0ac824f379fba2c2b17b75fd5ada69cd68c66348]
url: https://github.com/intel-lab-lkp/linux/commits/Nick-Desaulniers/pass-march-only-to-compiler/20220517-051756
base: 0ac824f379fba2c2b17b75fd5ada69cd68c66348
config: arm-randconfig-r026-20220516 (https://download.01.org/0day-ci/archive/20220518/202205180917.RNpZaxIl-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 853fa8ee225edf2d0de94b0dcbd31bea916e825e)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/intel-lab-lkp/linux/commit/6da98100eed87e4316be5ec584fe415134f25a3e
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Nick-Desaulniers/pass-march-only-to-compiler/20220517-051756
git checkout 6da98100eed87e4316be5ec584fe415134f25a3e
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> arch/arm/crypto/poly1305-core.S:16:1: error: target does not support ARM mode
.code 32
^
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 4/4] ARM: pass -march= only to compiler
2022-05-18 1:25 ` kernel test robot
@ 2022-05-18 22:38 ` Nick Desaulniers
2022-05-19 9:38 ` Russell King (Oracle)
0 siblings, 1 reply; 13+ messages in thread
From: Nick Desaulniers @ 2022-05-18 22:38 UTC (permalink / raw)
To: David Spickett, Ard Biesheuvel, Arnd Bergmann
Cc: llvm, kbuild-all, Russell King, Masahiro Yamada, Linus Walleij,
linux-arm-kernel, linux-kernel, kernel test robot
Lore thread, for context:
https://lore.kernel.org/llvm/20220516210954.1660716-1-ndesaulniers@google.com/
On Tue, May 17, 2022 at 6:26 PM kernel test robot <lkp@intel.com> wrote:
>
> Hi Nick,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on 0ac824f379fba2c2b17b75fd5ada69cd68c66348]
>
> url: https://github.com/intel-lab-lkp/linux/commits/Nick-Desaulniers/pass-march-only-to-compiler/20220517-051756
> base: 0ac824f379fba2c2b17b75fd5ada69cd68c66348
> config: arm-randconfig-r026-20220516 (https://download.01.org/0day-ci/archive/20220518/202205180917.RNpZaxIl-lkp@intel.com/config)
^ looks like this is a THUMB2 build.
> compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 853fa8ee225edf2d0de94b0dcbd31bea916e825e)
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # install arm cross compiling tool for clang build
> # apt-get install binutils-arm-linux-gnueabi
> # https://github.com/intel-lab-lkp/linux/commit/6da98100eed87e4316be5ec584fe415134f25a3e
> git remote add linux-review https://github.com/intel-lab-lkp/linux
> git fetch --no-tags linux-review Nick-Desaulniers/pass-march-only-to-compiler/20220517-051756
> git checkout 6da98100eed87e4316be5ec584fe415134f25a3e
> # save the config file
> mkdir build_dir && cp config build_dir/.config
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
>
> All errors (new ones prefixed by >>):
>
> >> arch/arm/crypto/poly1305-core.S:16:1: error: target does not support ARM mode
> .code 32
> ^
It looks like arch/arm/crypto/poly1305-core.S has a preprocessor guard
for __thumb2__.
My change changes the command line from:
from:
$(CC) ... -march=armv7-m ...
to:
$(CC ... -Wa,-march=armv7-m ...
(where ... contains `-mthumb -Wa,-mthumb` for BOTH).
$ arm-linux-gnueabi-gcc -march=armv7-m -mthumb -dM -E - < /dev/null | grep thumb
#define __thumb2__ 1
#define __thumb__ 1
$ arm-linux-gnueabi-gcc -Wa,-march=armv7-m -mthumb -dM -E - <
/dev/null | grep thumb
#define __thumb__ 1
$ clang --target=arm-linux-gnueabi -march=armv7-m -mthumb -dM -E - <
/dev/null | grep thumb
#define __thumb2__ 1
#define __thumb__ 1
$ clang --target=arm-linux-gnueabi -Wa,-march=armv7-m -mthumb -dM -E -
< /dev/null | grep thumb
#define __thumb__ 1
$
(so it seems that the preprocessor definition of `__thumb2__` is
dependent on `-march=`, not `-Wa,-march=`).
David, we might have a very subtle bug in clang:
$ clang --target=arm-linux-gnueabi -mthumb -Wa,-mthumb -march=armv7-m
-Wa,-march=armv7-m -x assembler-with-cpp
-Wunused-command-line-argument - < /dev/null -dM -E
<prints a bunch of preprocessor defines, but no instance of
-Wunused-command-line-argument>
$ clang --target=arm-linux-gnueabi -mthumb -Wa,-mthumb -march=armv7-m
-Wa,-march=armv7-m -x assembler-with-cpp
-Wunused-command-line-argument - < /dev/null -dM -c
clang-15: warning: argument unused during compilation:
'-march=armv7-m' [-Wunused-command-line-argument]
That seems weird because -c vs -E have different behaviors regarding
-Wunused-command-line-argument, and it seems like for `-x
assembler-with-cpp` that the -march= flag without -Wa, prefix *is*
expected to control the behavior of certain preprocessor defines like
`__thumb2__`.
Perhaps a more straightforward test case:
```asm
@ x.S
@ clang --target=arm-linux-gnueabi -mthumb -Wa,-mthumb -march=armv7-m \
@ -Wa,-march=armv7-m -Wunused-command-line-argument x.S -c
.syntax unified
.text
foo:
movs r0, #__thumb2__
```
$ clang --target=arm-linux-gnueabi -mthumb -Wa,-mthumb -march=armv7-m
-Wa,-march=armv7-m -Wunused-command-line-argument x.S -c
clang-15: warning: argument unused during compilation:
'-march=armv7-m' [-Wunused-command-line-argument]
$ llvm-objdump -dr x.o | tail -n 2
00000000 <foo>:
0: 01 20 movs r0, #1
Obviously that warning about `-Wunused-command-line-argument` is
incorrect; the value of `__thumb2__` comes from the preprocessor and
is controlled by `-march=armv7-m`. It can't be simultaneously "unused"
and used to define particular preprocessor directives.
Using the above command line invocation without `-march=armv7-m`
produces the assembler-time failure:
/tmp/x-03ab60.s:10:3: error: unsupported relocation on symbol
movs r0, #__thumb2__
^
because __thumb2__ is not defined.
(perhaps `#ifundef __thumb2__ #error "oops" #endif` would be simpler yet).
>
> --
> 0-DAY CI Kernel Test Service
> https://01.org/lkp
>
--
Thanks,
~Nick Desaulniers
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v3 4/4] ARM: pass -march= only to compiler
2022-05-18 22:38 ` Nick Desaulniers
@ 2022-05-19 9:38 ` Russell King (Oracle)
0 siblings, 0 replies; 13+ messages in thread
From: Russell King (Oracle) @ 2022-05-19 9:38 UTC (permalink / raw)
To: Nick Desaulniers
Cc: David Spickett, Ard Biesheuvel, Arnd Bergmann, llvm, kbuild-all,
Masahiro Yamada, Linus Walleij, linux-arm-kernel, linux-kernel,
kernel test robot
On Wed, May 18, 2022 at 03:38:18PM -0700, Nick Desaulniers wrote:
> (so it seems that the preprocessor definition of `__thumb2__` is
> dependent on `-march=`, not `-Wa,-march=`).
Yes, it will be. -Wa,... are only ever passed to the assembler and do
not affect the preprocessor nor the compiler with GCC.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2022-05-19 9:39 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-16 21:09 [PATCH v3 0/4] pass -march= only to compiler Nick Desaulniers
2022-05-16 21:09 ` [PATCH v3 1/4] ARM: remove lazy evaluation in Makefile Nick Desaulniers
2022-05-16 21:15 ` Nick Desaulniers
2022-05-16 21:09 ` [PATCH v3 2/4] ARM: use .arch directives instead of assembler command line flags Nick Desaulniers
2022-05-16 21:15 ` Nick Desaulniers
2022-05-16 21:09 ` [PATCH v3 3/4] ARM: only use -mtp=cp15 for the compiler Nick Desaulniers
2022-05-16 21:15 ` Nick Desaulniers
2022-05-16 21:09 ` [PATCH v3 4/4] ARM: pass -march= only to compiler Nick Desaulniers
2022-05-16 21:16 ` Nick Desaulniers
2022-05-18 1:25 ` kernel test robot
2022-05-18 22:38 ` Nick Desaulniers
2022-05-19 9:38 ` Russell King (Oracle)
2022-05-16 21:14 ` [PATCH v3 0/4] " Nick Desaulniers
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