[PATCH 0/3] KVM: x86/mmu: Cleanups for eager page splitting

[PATCH 0/3] KVM: x86/mmu: Cleanups for eager page splitting

[Sean Christopherson]

Eager page splitting cleanups for a few minor things that were noted in
code review but didn't make it into the committed code.

The last patch in particular is a bit more urgent than I first realized.
I had forgotten that pte_list_desc is now 128 bytes, and I also had a
brain fart and thought it was just allocating pointers, i.e. 8 bytes.
In other words, I was thinking the 513 object buffer was "only" wasting
~8kb per VM, whereas it actually costs ~64kb per VM.

Sean Christopherson (3):
  KVM: x86/mmu: Avoid subtle pointer arithmetic in kvm_mmu_child_role()
  KVM: x86/mmu: Use "unsigned int", not "u32", for SPTEs' @access info
  KVM: x86/mmu: Buffer nested MMU split_desc_cache only by default
    capacity

 arch/x86/kvm/mmu/mmu.c | 53 ++++++++++++++++++++++++++++--------------
 1 file changed, 35 insertions(+), 18 deletions(-)


base-commit: 4b88b1a518b337de1252b8180519ca4c00015c9e
-- 
2.37.0.rc0.161.g10f37bed90-goog

[PATCH 1/3] KVM: x86/mmu: Avoid subtle pointer arithmetic in kvm_mmu_child_role()

[Sean Christopherson]

When computing the quadrant (really the semicircle) for pages that shadow
4-byte guest Page Tables, grab the least significant bit of the PDE index
by using @sptep as if it were an index into an array, which it more or
less is.  Computing the PDE index using pointer arithmetic is subtle as
it relies on the pointer being a "u64 *", and is more expensive as the
compiler must perform the subtraction since the compiler doesn't know
that sptep and parent_sp->spt are tightly coupled.  Using only the value
of sptep allows the compiler to encode the computation as a SHR+AND.

Opportunstically update the comment to explicitly call out how and why
KVM uses role.quadrant to consume gPTE bits, and wrap an unnecessarily
long line.

No functional change intended.

Link: https://lore.kernel.org/all/YqvWvBv27fYzOFdE@google.com
Cc: David Matlack <dmatlack@google.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 arch/x86/kvm/mmu/mmu.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
index bd74a287b54a..07dfed427d5b 100644
--- a/arch/x86/kvm/mmu/mmu.c
+++ b/arch/x86/kvm/mmu/mmu.c
@@ -2168,7 +2168,8 @@ static struct kvm_mmu_page *kvm_mmu_get_shadow_page(struct kvm_vcpu *vcpu,
 	return __kvm_mmu_get_shadow_page(vcpu->kvm, vcpu, &caches, gfn, role);
 }
 
-static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct, unsigned int access)
+static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct,
+						  unsigned int access)
 {
 	struct kvm_mmu_page *parent_sp = sptep_to_sp(sptep);
 	union kvm_mmu_page_role role;
@@ -2195,13 +2196,19 @@ static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct, unsig
 	 * uses 2 PAE page tables, each mapping a 2MiB region. For these,
 	 * @role.quadrant encodes which half of the region they map.
 	 *
-	 * Note, the 4 PAE page directories are pre-allocated and the quadrant
-	 * assigned in mmu_alloc_root(). So only page tables need to be handled
-	 * here.
+	 * Concretely, a 4-byte PDE consumes bits 31:22, while an 8-byte PDE
+	 * consumes bits 29:21.  To consume bits 31:30, KVM's uses 4 shadow
+	 * PDPTEs; those 4 PAE page directories are pre-allocated and their
+	 * quadrant is assigned in mmu_alloc_root().   A 4-byte PTE consumes
+	 * bits 21:12, while an 8-byte PTE consumes bits 20:12.  To consume
+	 * bit 21 in the PTE (the child here), KVM propagates that bit to the
+	 * quadrant, i.e. sets quadrant to '0' or '1'.  The parent 8-byte PDE
+	 * covers bit 21 (see above), thus the quadrant is calculated from the
+	 * _least_ significant bit of the PDE index.
 	 */
 	if (role.has_4_byte_gpte) {
 		WARN_ON_ONCE(role.level != PG_LEVEL_4K);
-		role.quadrant = (sptep - parent_sp->spt) % 2;
+		role.quadrant = ((unsigned long)sptep / sizeof(*sptep)) & 1;
 	}
 
 	return role;
-- 
2.37.0.rc0.161.g10f37bed90-goog

[PATCH 2/3] KVM: x86/mmu: Use "unsigned int", not "u32", for SPTEs' @access info

[Sean Christopherson]

Use an "unsigned int" for @access parameters instead of a "u32", mostly
to be consistent throughout KVM, but also because "u32" is misleading.
@access can actually squeeze into a u8, i.e. doesn't need 32 bits, but is
as an "unsigned int" because sp->role.access is an unsigned int.

No functional change intended.

Link: https://lore.kernel.org/all/YqyZxEfxXLsHGoZ%2F@google.com
Cc: David Matlack <dmatlack@google.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 arch/x86/kvm/mmu/mmu.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
index 07dfed427d5b..e2213eeadebc 100644
--- a/arch/x86/kvm/mmu/mmu.c
+++ b/arch/x86/kvm/mmu/mmu.c
@@ -717,7 +717,8 @@ static u32 kvm_mmu_page_get_access(struct kvm_mmu_page *sp, int index)
 	return sp->role.access;
 }
 
-static void kvm_mmu_page_set_translation(struct kvm_mmu_page *sp, int index, gfn_t gfn, u32 access)
+static void kvm_mmu_page_set_translation(struct kvm_mmu_page *sp, int index,
+					 gfn_t gfn, unsigned int access)
 {
 	if (sp_has_gptes(sp)) {
 		sp->shadowed_translation[index] = (gfn << PAGE_SHIFT) | access;
@@ -735,7 +736,8 @@ static void kvm_mmu_page_set_translation(struct kvm_mmu_page *sp, int index, gfn
 	          sp->gfn, kvm_mmu_page_get_gfn(sp, index), gfn);
 }
 
-static void kvm_mmu_page_set_access(struct kvm_mmu_page *sp, int index, u32 access)
+static void kvm_mmu_page_set_access(struct kvm_mmu_page *sp, int index,
+				    unsigned int access)
 {
 	gfn_t gfn = kvm_mmu_page_get_gfn(sp, index);
 
@@ -1580,7 +1582,7 @@ static bool kvm_test_age_rmapp(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
 static void __rmap_add(struct kvm *kvm,
 		       struct kvm_mmu_memory_cache *cache,
 		       const struct kvm_memory_slot *slot,
-		       u64 *spte, gfn_t gfn, u32 access)
+		       u64 *spte, gfn_t gfn, unsigned int access)
 {
 	struct kvm_mmu_page *sp;
 	struct kvm_rmap_head *rmap_head;
@@ -1601,7 +1603,7 @@ static void __rmap_add(struct kvm *kvm,
 }
 
 static void rmap_add(struct kvm_vcpu *vcpu, const struct kvm_memory_slot *slot,
-		     u64 *spte, gfn_t gfn, u32 access)
+		     u64 *spte, gfn_t gfn, unsigned int access)
 {
 	struct kvm_mmu_memory_cache *cache = &vcpu->arch.mmu_pte_list_desc_cache;
 
-- 
2.37.0.rc0.161.g10f37bed90-goog

[PATCH 3/3] KVM: x86/mmu: Buffer nested MMU split_desc_cache only by default capacity

[Sean Christopherson]

Buffer split_desc_cache, the cache used to allcoate rmap list entries,
only by the default cache capacity (currently 40), not by doubling the
minimum (513).  Aliasing L2 GPAs to L1 GPAs is uncommon, thus eager page
splitting is unlikely to need 500+ entries.  And because each object is a
non-trivial 128 bytes (see struct pte_list_desc), those extra ~500
entries means KVM is in all likelihood wasting ~64kb of memory per VM.

Link: https://lore.kernel.org/all/YrTDcrsn0%2F+alpzf@google.com
Cc: David Matlack <dmatlack@google.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 arch/x86/kvm/mmu/mmu.c | 26 +++++++++++++++++---------
 1 file changed, 17 insertions(+), 9 deletions(-)

diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
index e2213eeadebc..069ddf874af1 100644
--- a/arch/x86/kvm/mmu/mmu.c
+++ b/arch/x86/kvm/mmu/mmu.c
@@ -6125,17 +6125,25 @@ static bool need_topup_split_caches_or_resched(struct kvm *kvm)
 
 static int topup_split_caches(struct kvm *kvm)
 {
-	int r;
-
-	lockdep_assert_held(&kvm->slots_lock);
-
 	/*
-	 * Setting capacity == min would cause KVM to drop mmu_lock even if
-	 * just one object was consumed from the cache, so make capacity
-	 * larger than min.
+	 * Allocating rmap list entries when splitting huge pages for nested
+	 * MMUs is uncommon as KVM needs to allocate if and only if there is
+	 * more than one rmap entry for a gfn, i.e. requires an L1 gfn to be
+	 * aliased by multiple L2 gfns.  Aliasing gfns when using TDP is very
+	 * atypical for VMMs; a few gfns are often aliased during boot, e.g.
+	 * when remapping firmware, but aliasing rarely occurs post-boot).  If
+	 * there is only one rmap entry, rmap->val points directly at that one
+	 * entry and doesn't need to allocate a list.  Buffer the cache by the
+	 * default capacity so that KVM doesn't have to topup the cache if it
+	 * encounters an aliased gfn or two.
 	 */
-	r = __kvm_mmu_topup_memory_cache(&kvm->arch.split_desc_cache,
-					 2 * SPLIT_DESC_CACHE_MIN_NR_OBJECTS,
+	const int capacity = SPLIT_DESC_CACHE_MIN_NR_OBJECTS +
+			     KVM_ARCH_NR_OBJS_PER_MEMORY_CACHE;
+	int r;
+
+	lockdep_assert_held(&kvm->slots_lock);
+
+	r = __kvm_mmu_topup_memory_cache(&kvm->arch.split_desc_cache, capacity,
 					 SPLIT_DESC_CACHE_MIN_NR_OBJECTS);
 	if (r)
 		return r;
-- 
2.37.0.rc0.161.g10f37bed90-goog

Re: [PATCH 1/3] KVM: x86/mmu: Avoid subtle pointer arithmetic in kvm_mmu_child_role()

[David Matlack]

On Fri, Jun 24, 2022 at 05:18:06PM +0000, Sean Christopherson wrote:
> --- a/arch/x86/kvm/mmu/mmu.c
> +++ b/arch/x86/kvm/mmu/mmu.c
> @@ -2168,7 +2168,8 @@ static struct kvm_mmu_page *kvm_mmu_get_shadow_page(struct kvm_vcpu *vcpu,
>  	return __kvm_mmu_get_shadow_page(vcpu->kvm, vcpu, &caches, gfn, role);
>  }
>  
> -static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct, unsigned int access)
> +static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct,
> +						  unsigned int access)
>  {
>  	struct kvm_mmu_page *parent_sp = sptep_to_sp(sptep);
>  	union kvm_mmu_page_role role;
> @@ -2195,13 +2196,19 @@ static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct, unsig
>  	 * uses 2 PAE page tables, each mapping a 2MiB region. For these,
>  	 * @role.quadrant encodes which half of the region they map.
>  	 *
> -	 * Note, the 4 PAE page directories are pre-allocated and the quadrant
> -	 * assigned in mmu_alloc_root(). So only page tables need to be handled
> -	 * here.
> +	 * Concretely, a 4-byte PDE consumes bits 31:22, while an 8-byte PDE
> +	 * consumes bits 29:21.  To consume bits 31:30, KVM's uses 4 shadow
> +	 * PDPTEs; those 4 PAE page directories are pre-allocated and their
> +	 * quadrant is assigned in mmu_alloc_root().   A 4-byte PTE consumes
> +	 * bits 21:12, while an 8-byte PTE consumes bits 20:12.  To consume
> +	 * bit 21 in the PTE (the child here), KVM propagates that bit to the
> +	 * quadrant, i.e. sets quadrant to '0' or '1'.  The parent 8-byte PDE
> +	 * covers bit 21 (see above), thus the quadrant is calculated from the
> +	 * _least_ significant bit of the PDE index.
>  	 */
>  	if (role.has_4_byte_gpte) {
>  		WARN_ON_ONCE(role.level != PG_LEVEL_4K);
> -		role.quadrant = (sptep - parent_sp->spt) % 2;
> +		role.quadrant = ((unsigned long)sptep / sizeof(*sptep)) & 1;
>  	}

I find both difficult to read TBH. And "sptep -> sp->spt" is repeated in
other places.

How about using this oppotunity to introduce a helper that turns an
sptep into an index to use here and clean up the other users?

e.g.

static inline int spte_index(u64 *sptep)
{
        return ((unsigned long)sptep / sizeof(*sptep)) & (SPTE_ENT_PER_PAGE - 1);
}

Then kvm_mmu_child_role() becomes:

        if (role.has_4_byte_gpte) {
        	WARN_ON_ONCE(role.level != PG_LEVEL_4K);
        	role.quadrant = spte_index(sptep) & 1;
        }

Re: [PATCH 2/3] KVM: x86/mmu: Use "unsigned int", not "u32", for SPTEs' @access info

[David Matlack]

On Fri, Jun 24, 2022 at 05:18:07PM +0000, Sean Christopherson wrote:
> Use an "unsigned int" for @access parameters instead of a "u32", mostly
> to be consistent throughout KVM, but also because "u32" is misleading.
> @access can actually squeeze into a u8, i.e. doesn't need 32 bits, but is
> as an "unsigned int" because sp->role.access is an unsigned int.
> 
> No functional change intended.
> 
> Link: https://lore.kernel.org/all/YqyZxEfxXLsHGoZ%2F@google.com
> Cc: David Matlack <dmatlack@google.com>
> Signed-off-by: Sean Christopherson <seanjc@google.com>

Reviewed-by: David Matlack <dmatlack@google.com>

Re: [PATCH 3/3] KVM: x86/mmu: Buffer nested MMU split_desc_cache only by default capacity

[David Matlack]

On Fri, Jun 24, 2022 at 05:18:08PM +0000, Sean Christopherson wrote:
> Buffer split_desc_cache, the cache used to allcoate rmap list entries,
> only by the default cache capacity (currently 40), not by doubling the
> minimum (513).  Aliasing L2 GPAs to L1 GPAs is uncommon, thus eager page
> splitting is unlikely to need 500+ entries.  And because each object is a
> non-trivial 128 bytes (see struct pte_list_desc), those extra ~500
> entries means KVM is in all likelihood wasting ~64kb of memory per VM.
> 
> Link: https://lore.kernel.org/all/YrTDcrsn0%2F+alpzf@google.com
> Cc: David Matlack <dmatlack@google.com>
> Signed-off-by: Sean Christopherson <seanjc@google.com>

Thanks for the cleanups!

Reviewed-by: David Matlack <dmatlack@google.com>

Re: [PATCH 1/3] KVM: x86/mmu: Avoid subtle pointer arithmetic in kvm_mmu_child_role()

[Sean Christopherson]

On Fri, Jun 24, 2022, David Matlack wrote:
> On Fri, Jun 24, 2022 at 05:18:06PM +0000, Sean Christopherson wrote:
> > --- a/arch/x86/kvm/mmu/mmu.c
> > +++ b/arch/x86/kvm/mmu/mmu.c
> > @@ -2168,7 +2168,8 @@ static struct kvm_mmu_page *kvm_mmu_get_shadow_page(struct kvm_vcpu *vcpu,
> >  	return __kvm_mmu_get_shadow_page(vcpu->kvm, vcpu, &caches, gfn, role);
> >  }
> >  
> > -static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct, unsigned int access)
> > +static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct,
> > +						  unsigned int access)
> >  {
> >  	struct kvm_mmu_page *parent_sp = sptep_to_sp(sptep);
> >  	union kvm_mmu_page_role role;
> > @@ -2195,13 +2196,19 @@ static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct, unsig
> >  	 * uses 2 PAE page tables, each mapping a 2MiB region. For these,
> >  	 * @role.quadrant encodes which half of the region they map.
> >  	 *
> > -	 * Note, the 4 PAE page directories are pre-allocated and the quadrant
> > -	 * assigned in mmu_alloc_root(). So only page tables need to be handled
> > -	 * here.
> > +	 * Concretely, a 4-byte PDE consumes bits 31:22, while an 8-byte PDE
> > +	 * consumes bits 29:21.  To consume bits 31:30, KVM's uses 4 shadow
> > +	 * PDPTEs; those 4 PAE page directories are pre-allocated and their
> > +	 * quadrant is assigned in mmu_alloc_root().   A 4-byte PTE consumes
> > +	 * bits 21:12, while an 8-byte PTE consumes bits 20:12.  To consume
> > +	 * bit 21 in the PTE (the child here), KVM propagates that bit to the
> > +	 * quadrant, i.e. sets quadrant to '0' or '1'.  The parent 8-byte PDE
> > +	 * covers bit 21 (see above), thus the quadrant is calculated from the
> > +	 * _least_ significant bit of the PDE index.
> >  	 */
> >  	if (role.has_4_byte_gpte) {
> >  		WARN_ON_ONCE(role.level != PG_LEVEL_4K);
> > -		role.quadrant = (sptep - parent_sp->spt) % 2;
> > +		role.quadrant = ((unsigned long)sptep / sizeof(*sptep)) & 1;
> >  	}
> 
> I find both difficult to read TBH.

No argument there.  My objection to the pointer arithmetic is that it's easy to
misread.

> And "sptep -> sp->spt" is repeated in other places.

> 
> How about using this oppotunity to introduce a helper that turns an
> sptep into an index to use here and clean up the other users?
> 
> e.g.
> 
> static inline int spte_index(u64 *sptep)
> {
>         return ((unsigned long)sptep / sizeof(*sptep)) & (SPTE_ENT_PER_PAGE - 1);
> }
> 
> Then kvm_mmu_child_role() becomes:
> 
>         if (role.has_4_byte_gpte) {
>         	WARN_ON_ONCE(role.level != PG_LEVEL_4K);
>         	role.quadrant = spte_index(sptep) & 1;
>         }

Nice!  I like this a lot.  Will do in v2.

Re: [PATCH 0/3] KVM: x86/mmu: Cleanups for eager page splitting

[Paolo Bonzini]

On 6/24/22 19:18, Sean Christopherson wrote:
> Eager page splitting cleanups for a few minor things that were noted in
> code review but didn't make it into the committed code.
> 
> The last patch in particular is a bit more urgent than I first realized.
> I had forgotten that pte_list_desc is now 128 bytes, and I also had a
> brain fart and thought it was just allocating pointers, i.e. 8 bytes.
> In other words, I was thinking the 513 object buffer was "only" wasting
> ~8kb per VM, whereas it actually costs ~64kb per VM.
> 
> Sean Christopherson (3):
>    KVM: x86/mmu: Avoid subtle pointer arithmetic in kvm_mmu_child_role()
>    KVM: x86/mmu: Use "unsigned int", not "u32", for SPTEs' @access info
>    KVM: x86/mmu: Buffer nested MMU split_desc_cache only by default
>      capacity
> 
>   arch/x86/kvm/mmu/mmu.c | 53 ++++++++++++++++++++++++++++--------------
>   1 file changed, 35 insertions(+), 18 deletions(-)
> 
> 
> base-commit: 4b88b1a518b337de1252b8180519ca4c00015c9e

Queued 2+3.

Paolo