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From: Vinod Koul <vkoul@kernel.org>
To: Roger Quadros <rogerq@kernel.org>
Cc: kishon@ti.com, vigneshr@ti.com, t-patil@ti.com,
	sjakhade@cadence.com, s-vadapalli@ti.com,
	linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH 0/7] phy: ti: phy-j721e-wiz: Add support for j7200-wiz-10g
Date: Tue, 30 Aug 2022 10:43:38 +0530	[thread overview]
Message-ID: <Yw2cgthIiLONb/+Y@matsya> (raw)
In-Reply-To: <20220628122255.24265-1-rogerq@kernel.org>

On 28-06-22, 15:22, Roger Quadros wrote:
> Hi,
> 
> The SERDES in J7200 SR2.0 supports 2 reference clocks.
> The second reference clock (core_ref1_clk) is hardwired to
> MAIN_PLL3_HSDIV4_CLKOUT (100/125/156.25 MHz).
> 
> Add a new compatible "j7200-wiz-10g" for this device.
> 
> The external clocks to SERDES PLL refclock mapping is now
> controlled by a special register in System Control Module
> (SCM) space. Add a property "ti,scm" to reference it and
> configure it in the driver.

Applied, thanks

-- 
~Vinod

      parent reply	other threads:[~2022-08-30  5:13 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-28 12:22 [PATCH 0/7] phy: ti: phy-j721e-wiz: Add support for j7200-wiz-10g Roger Quadros
2022-06-28 12:22 ` [PATCH 1/7] phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200 Roger Quadros
2022-06-28 12:22 ` [PATCH 2/7] dt-bindings: phy: Add PHY_TYPE_USXGMII definition Roger Quadros
2022-07-01 16:17   ` Rob Herring
2022-06-28 12:22 ` [PATCH 3/7] phy: ti: phy-j721e-wiz.c: Add usxgmii support in wiz driver Roger Quadros
2022-06-28 12:22 ` [PATCH 4/7] dt-bindings: phy: ti,phy-j721e-wiz: deprecate clock MUX nodes Roger Quadros
2022-07-01 16:18   ` Rob Herring
2022-06-28 12:22 ` [PATCH 5/7] dt-bindings: phy: ti,phy-j721e-wiz: Add support for ti,j7200-wiz-10g Roger Quadros
2022-07-01 16:19   ` Rob Herring
2022-06-28 12:22 ` [PATCH 6/7] phy: ti: phy-j721e-wiz: add support for j7200-wiz-10g Roger Quadros
2022-06-28 12:22 ` [PATCH 7/7] phy: ti: phy-j721e-wiz: set PMA_CMN_REFCLK_DIG_DIV based on reflk rate Roger Quadros
2022-08-30  5:13 ` Vinod Koul [this message]

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