* [PATCH 0/5] staging: r8188eu: power sequences cleanup
@ 2022-07-04 14:52 Martin Kaiser
2022-07-04 14:52 ` [PATCH 1/5] staging: r8188eu: move pwr seq defines to HalPwrSeqCmd.c Martin Kaiser
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Martin Kaiser @ 2022-07-04 14:52 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, Pavel Skripkin,
linux-staging, linux-kernel, Martin Kaiser
Simplify and clean up the power sequences. Remove some unused register
definitions.
Martin Kaiser (5):
staging: r8188eu: move pwr seq defines to HalPwrSeqCmd.c
staging: r8188eu: support only us in PWR_CMD_DELAY
staging: r8188eu: read pwr seq length, remove PWR_CMD_END
staging: r8188eu: remove sdio definitions
staging: r8188eu: mac addr len is unused
drivers/staging/r8188eu/hal/HalPwrSeqCmd.c | 60 +++++---
.../staging/r8188eu/include/HalPwrSeqCmd.h | 47 ------
.../staging/r8188eu/include/rtl8188e_spec.h | 137 ------------------
3 files changed, 42 insertions(+), 202 deletions(-)
--
2.30.2
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/5] staging: r8188eu: move pwr seq defines to HalPwrSeqCmd.c
2022-07-04 14:52 [PATCH 0/5] staging: r8188eu: power sequences cleanup Martin Kaiser
@ 2022-07-04 14:52 ` Martin Kaiser
2022-07-04 14:52 ` [PATCH 2/5] staging: r8188eu: support only us in PWR_CMD_DELAY Martin Kaiser
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Martin Kaiser @ 2022-07-04 14:52 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, Pavel Skripkin,
linux-staging, linux-kernel, Martin Kaiser
The power sequences are now defined and processed in the same file. We
can move the defines for power sequences and the related struct and
enum from HalPwrSeqCmd.h to HalPwrSeqCmd.c. They don't have to be visible
in other files any more.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/hal/HalPwrSeqCmd.c | 43 +++++++++++++++++
.../staging/r8188eu/include/HalPwrSeqCmd.h | 47 -------------------
2 files changed, 43 insertions(+), 47 deletions(-)
diff --git a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
index 5b0f66573d94..fb8eeaf51afa 100644
--- a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
+++ b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
@@ -3,6 +3,49 @@
#include "../include/HalPwrSeqCmd.h"
+#define PWR_CMD_WRITE 0x01
+ /* offset: the read register offset */
+ /* msk: the mask of the write bits */
+ /* value: write value */
+ /* note: driver shall implement this cmd by read & msk after write */
+
+#define PWR_CMD_POLLING 0x02
+ /* offset: the read register offset */
+ /* msk: the mask of the polled value */
+ /* value: the value to be polled, masked by the msd field. */
+ /* note: driver shall implement this cmd by */
+ /* do{ */
+ /* if ( (Read(offset) & msk) == (value & msk) ) */
+ /* break; */
+ /* } while (not timeout); */
+
+#define PWR_CMD_DELAY 0x03
+ /* offset: the value to delay */
+ /* msk: N/A */
+ /* value: the unit of delay, 0: us, 1: ms */
+
+#define PWR_CMD_END 0x04
+ /* offset: N/A */
+ /* msk: N/A */
+ /* value: N/A */
+
+enum pwrseq_cmd_delat_unit {
+ PWRSEQ_DELAY_US,
+ PWRSEQ_DELAY_MS,
+};
+
+struct wl_pwr_cfg {
+ u16 offset;
+ u8 cmd:4;
+ u8 msk;
+ u8 value;
+};
+
+#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
+#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
+#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
+#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
+
static struct wl_pwr_cfg rtl8188E_power_on_flow[] = {
{ 0x0006, PWR_CMD_POLLING, BIT(1), BIT(1) },
{ 0x0002, PWR_CMD_WRITE, BIT(0) | BIT(1), 0 }, /* reset BB */
diff --git a/drivers/staging/r8188eu/include/HalPwrSeqCmd.h b/drivers/staging/r8188eu/include/HalPwrSeqCmd.h
index 869f54d99e57..0886300d26bf 100644
--- a/drivers/staging/r8188eu/include/HalPwrSeqCmd.h
+++ b/drivers/staging/r8188eu/include/HalPwrSeqCmd.h
@@ -6,53 +6,6 @@
#include "drv_types.h"
-/*---------------------------------------------*/
-/* 3 The value of cmd: 4 bits */
-/*---------------------------------------------*/
-
-#define PWR_CMD_WRITE 0x01
- /* offset: the read register offset */
- /* msk: the mask of the write bits */
- /* value: write value */
- /* note: driver shall implement this cmd by read & msk after write */
-
-#define PWR_CMD_POLLING 0x02
- /* offset: the read register offset */
- /* msk: the mask of the polled value */
- /* value: the value to be polled, masked by the msd field. */
- /* note: driver shall implement this cmd by */
- /* do{ */
- /* if ( (Read(offset) & msk) == (value & msk) ) */
- /* break; */
- /* } while (not timeout); */
-
-#define PWR_CMD_DELAY 0x03
- /* offset: the value to delay */
- /* msk: N/A */
- /* value: the unit of delay, 0: us, 1: ms */
-
-#define PWR_CMD_END 0x04
- /* offset: N/A */
- /* msk: N/A */
- /* value: N/A */
-
-enum pwrseq_cmd_delat_unit {
- PWRSEQ_DELAY_US,
- PWRSEQ_DELAY_MS,
-};
-
-struct wl_pwr_cfg {
- u16 offset;
- u8 cmd:4;
- u8 msk;
- u8 value;
-};
-
-#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
-#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
-#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
-#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
-
enum r8188eu_pwr_seq {
PWR_ON_FLOW,
DISABLE_FLOW,
--
2.30.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/5] staging: r8188eu: support only us in PWR_CMD_DELAY
2022-07-04 14:52 [PATCH 0/5] staging: r8188eu: power sequences cleanup Martin Kaiser
2022-07-04 14:52 ` [PATCH 1/5] staging: r8188eu: move pwr seq defines to HalPwrSeqCmd.c Martin Kaiser
@ 2022-07-04 14:52 ` Martin Kaiser
2022-07-04 14:52 ` [PATCH 3/5] staging: r8188eu: read pwr seq length, remove PWR_CMD_END Martin Kaiser
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Martin Kaiser @ 2022-07-04 14:52 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, Pavel Skripkin,
linux-staging, linux-kernel, Martin Kaiser
PWR_CMD_DELAY has only a single remaining user, who needs a delay in us.
Remove the code and defines for delays in ms.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/hal/HalPwrSeqCmd.c | 16 ++++------------
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
index fb8eeaf51afa..273f134d0a40 100644
--- a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
+++ b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
@@ -20,20 +20,15 @@
/* } while (not timeout); */
#define PWR_CMD_DELAY 0x03
- /* offset: the value to delay */
+ /* offset: the value to delay (in us) */
/* msk: N/A */
- /* value: the unit of delay, 0: us, 1: ms */
+ /* value: N/A */
#define PWR_CMD_END 0x04
/* offset: N/A */
/* msk: N/A */
/* value: N/A */
-enum pwrseq_cmd_delat_unit {
- PWRSEQ_DELAY_US,
- PWRSEQ_DELAY_MS,
-};
-
struct wl_pwr_cfg {
u16 offset;
u8 cmd:4;
@@ -79,7 +74,7 @@ static struct wl_pwr_cfg rtl8188E_enter_lps_flow[] = {
{ 0x05FA, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
{ 0x05FB, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
{ 0x0002, PWR_CMD_WRITE, BIT(0), 0 }, /* CCK and OFDM are disabled, clocks are gated */
- { 0x0002, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US },
+ { 0x0002, PWR_CMD_DELAY, 0, 0 },
{ 0x0100, PWR_CMD_WRITE, 0xFF, 0x3F }, /* Reset MAC TRX */
{ 0x0101, PWR_CMD_WRITE, BIT(1), 0 }, /* check if removed later */
{ 0x0553, PWR_CMD_WRITE, BIT(5), BIT(5) }, /* Respond TxOK to scheduler */
@@ -149,10 +144,7 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq)
} while (!poll_bit);
break;
case PWR_CMD_DELAY:
- if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US)
- udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
- else
- udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd) * 1000);
+ udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
break;
case PWR_CMD_END:
/* When this command is parsed, end the process */
--
2.30.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/5] staging: r8188eu: read pwr seq length, remove PWR_CMD_END
2022-07-04 14:52 [PATCH 0/5] staging: r8188eu: power sequences cleanup Martin Kaiser
2022-07-04 14:52 ` [PATCH 1/5] staging: r8188eu: move pwr seq defines to HalPwrSeqCmd.c Martin Kaiser
2022-07-04 14:52 ` [PATCH 2/5] staging: r8188eu: support only us in PWR_CMD_DELAY Martin Kaiser
@ 2022-07-04 14:52 ` Martin Kaiser
2022-07-04 14:52 ` [PATCH 4/5] staging: r8188eu: remove sdio definitions Martin Kaiser
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Martin Kaiser @ 2022-07-04 14:52 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, Pavel Skripkin,
linux-staging, linux-kernel, Martin Kaiser
The definitions of the power sequences are in the same file as the function
which processes them. We can simply read the number of entries in a power
sequence. There's no need for a PWR_CMD_END command to indicate the end
of a sequence.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/hal/HalPwrSeqCmd.c | 25 ++++++----------------
1 file changed, 7 insertions(+), 18 deletions(-)
diff --git a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
index 273f134d0a40..6c0b1368383d 100644
--- a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
+++ b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c
@@ -24,11 +24,6 @@
/* msk: N/A */
/* value: N/A */
-#define PWR_CMD_END 0x04
- /* offset: N/A */
- /* msk: N/A */
- /* value: N/A */
-
struct wl_pwr_cfg {
u16 offset;
u8 cmd:4;
@@ -50,7 +45,6 @@ static struct wl_pwr_cfg rtl8188E_power_on_flow[] = {
{ 0x0005, PWR_CMD_WRITE, BIT(0), BIT(0) },
{ 0x0005, PWR_CMD_POLLING, BIT(0), 0 },
{ 0x0023, PWR_CMD_WRITE, BIT(4), 0 },
- { 0xFFFF, PWR_CMD_END, 0, 0 },
};
static struct wl_pwr_cfg rtl8188E_card_disable_flow[] = {
@@ -63,7 +57,6 @@ static struct wl_pwr_cfg rtl8188E_card_disable_flow[] = {
{ 0x0007, PWR_CMD_WRITE, 0xFF, 0 }, /* enable bandgap mbias in suspend */
{ 0x0041, PWR_CMD_WRITE, BIT(4), 0 }, /* Clear SIC_EN register */
{ 0xfe10, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* Set USB suspend enable local register */
- { 0xFFFF, PWR_CMD_END, 0, 0 },
};
/* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */
@@ -78,7 +71,6 @@ static struct wl_pwr_cfg rtl8188E_enter_lps_flow[] = {
{ 0x0100, PWR_CMD_WRITE, 0xFF, 0x3F }, /* Reset MAC TRX */
{ 0x0101, PWR_CMD_WRITE, BIT(1), 0 }, /* check if removed later */
{ 0x0553, PWR_CMD_WRITE, BIT(5), BIT(5) }, /* Respond TxOK to scheduler */
- { 0xFFFF, PWR_CMD_END, 0, 0 },
};
u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq)
@@ -86,7 +78,7 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq)
struct wl_pwr_cfg pwrcfgcmd = {0};
struct wl_pwr_cfg *pwrseqcmd;
u8 poll_bit = false;
- u32 aryidx = 0;
+ u8 idx, num_steps;
u8 value = 0;
u32 offset = 0;
u32 poll_count = 0; /* polling autoload done. */
@@ -96,19 +88,22 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq)
switch (seq) {
case PWR_ON_FLOW:
pwrseqcmd = rtl8188E_power_on_flow;
+ num_steps = ARRAY_SIZE(rtl8188E_power_on_flow);
break;
case DISABLE_FLOW:
pwrseqcmd = rtl8188E_card_disable_flow;
+ num_steps = ARRAY_SIZE(rtl8188E_card_disable_flow);
break;
case LPS_ENTER_FLOW:
pwrseqcmd = rtl8188E_enter_lps_flow;
+ num_steps = ARRAY_SIZE(rtl8188E_enter_lps_flow);
break;
default:
return false;
}
- do {
- pwrcfgcmd = pwrseqcmd[aryidx];
+ for (idx = 0; idx < num_steps; idx++) {
+ pwrcfgcmd = pwrseqcmd[idx];
switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
case PWR_CMD_WRITE:
@@ -146,15 +141,9 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq)
case PWR_CMD_DELAY:
udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
break;
- case PWR_CMD_END:
- /* When this command is parsed, end the process */
- return true;
- break;
default:
break;
}
-
- aryidx++;/* Add Array Index */
- } while (1);
+ }
return true;
}
--
2.30.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 4/5] staging: r8188eu: remove sdio definitions
2022-07-04 14:52 [PATCH 0/5] staging: r8188eu: power sequences cleanup Martin Kaiser
` (2 preceding siblings ...)
2022-07-04 14:52 ` [PATCH 3/5] staging: r8188eu: read pwr seq length, remove PWR_CMD_END Martin Kaiser
@ 2022-07-04 14:52 ` Martin Kaiser
2022-07-04 14:52 ` [PATCH 5/5] staging: r8188eu: mac addr len is unused Martin Kaiser
2022-07-04 18:58 ` [PATCH 0/5] staging: r8188eu: power sequences cleanup Philipp Hortmann
5 siblings, 0 replies; 7+ messages in thread
From: Martin Kaiser @ 2022-07-04 14:52 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, Pavel Skripkin,
linux-staging, linux-kernel, Martin Kaiser
The r8188eu chipset is connected via usb. We don't need the register
and bit field definitions for the sdio interface.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
.../staging/r8188eu/include/rtl8188e_spec.h | 136 ------------------
1 file changed, 136 deletions(-)
diff --git a/drivers/staging/r8188eu/include/rtl8188e_spec.h b/drivers/staging/r8188eu/include/rtl8188e_spec.h
index ef42c4b2f20c..d3651ec71dc4 100644
--- a/drivers/staging/r8188eu/include/rtl8188e_spec.h
+++ b/drivers/staging/r8188eu/include/rtl8188e_spec.h
@@ -1059,142 +1059,6 @@ Current IOREG MAP
#define SCR_TXBCUSEDK BIT(6) /* Force Tx Bcast pkt Use Default Key */
#define SCR_RXBCUSEDK BIT(7) /* Force Rx Bcast pkt Use Default Key */
-/* RTL8188E SDIO Configuration */
-
-/* I/O bus domain address mapping */
-#define SDIO_LOCAL_BASE 0x10250000
-#define WLAN_IOREG_BASE 0x10260000
-#define FIRMWARE_FIFO_BASE 0x10270000
-#define TX_HIQ_BASE 0x10310000
-#define TX_MIQ_BASE 0x10320000
-#define TX_LOQ_BASE 0x10330000
-#define RX_RX0FF_BASE 0x10340000
-
-/* SDIO host local register space mapping. */
-#define SDIO_LOCAL_MSK 0x0FFF
-#define WLAN_IOREG_MSK 0x7FFF
-#define WLAN_FIFO_MSK 0x1FFF /* Aggregation Length[12:0] */
-#define WLAN_RX0FF_MSK 0x0003
-
-/* Without ref to the SDIO Device ID */
-#define SDIO_WITHOUT_REF_DEVICE_ID 0
-#define SDIO_LOCAL_DEVICE_ID 0 /* 0b[16], 000b[15:13] */
-#define WLAN_TX_HIQ_DEVICE_ID 4 /* 0b[16], 100b[15:13] */
-#define WLAN_TX_MIQ_DEVICE_ID 5 /* 0b[16], 101b[15:13] */
-#define WLAN_TX_LOQ_DEVICE_ID 6 /* 0b[16], 110b[15:13] */
-#define WLAN_RX0FF_DEVICE_ID 7 /* 0b[16], 111b[15:13] */
-#define WLAN_IOREG_DEVICE_ID 8 /* 1b[16] */
-
-/* SDIO Tx Free Page Index */
-#define HI_QUEUE_IDX 0
-#define MID_QUEUE_IDX 1
-#define LOW_QUEUE_IDX 2
-#define PUBLIC_QUEUE_IDX 3
-
-#define SDIO_MAX_TX_QUEUE 3 /* HIQ, MIQ and LOQ */
-#define SDIO_MAX_RX_QUEUE 1
-
-/* SDIO Tx Control */
-#define SDIO_REG_TX_CTRL 0x0000
-/* SDIO Host Interrupt Mask */
-#define SDIO_REG_HIMR 0x0014
-/* SDIO Host Interrupt Service Routine */
-#define SDIO_REG_HISR 0x0018
-/* HCI Current Power Mode */
-#define SDIO_REG_HCPWM 0x0019
-/* RXDMA Request Length */
-#define SDIO_REG_RX0_REQ_LEN 0x001C
-/* Free Tx Buffer Page */
-#define SDIO_REG_FREE_TXPG 0x0020
-/* HCI Current Power Mode 1 */
-#define SDIO_REG_HCPWM1 0x0024
-/* HCI Current Power Mode 2 */
-#define SDIO_REG_HCPWM2 0x0026
-/* HTSF Informaion */
-#define SDIO_REG_HTSFR_INFO 0x0030
-/* HCI Request Power Mode 1 */
-#define SDIO_REG_HRPWM1 0x0080
-/* HCI Request Power Mode 2 */
-#define SDIO_REG_HRPWM2 0x0082
-/* HCI Power Save Clock */
-#define SDIO_REG_HPS_CLKR 0x0084
-/* SDIO HCI Suspend Control */
-#define SDIO_REG_HSUS_CTRL 0x0086
-/* SDIO Host Extension Interrupt Mask Always */
-#define SDIO_REG_HIMR_ON 0x0090
-/* SDIO Host Extension Interrupt Status Always */
-#define SDIO_REG_HISR_ON 0x0091
-
-#define SDIO_HIMR_DISABLED 0
-
-/* RTL8188E SDIO Host Interrupt Mask Register */
-#define SDIO_HIMR_RX_REQUEST_MSK BIT(0)
-#define SDIO_HIMR_AVAL_MSK BIT(1)
-#define SDIO_HIMR_TXERR_MSK BIT(2)
-#define SDIO_HIMR_RXERR_MSK BIT(3)
-#define SDIO_HIMR_TXFOVW_MSK BIT(4)
-#define SDIO_HIMR_RXFOVW_MSK BIT(5)
-#define SDIO_HIMR_TXBCNOK_MSK BIT(6)
-#define SDIO_HIMR_TXBCNERR_MSK BIT(7)
-#define SDIO_HIMR_BCNERLY_INT_MSK BIT(16)
-#define SDIO_HIMR_C2HCMD_MSK BIT(17)
-#define SDIO_HIMR_CPWM1_MSK BIT(18)
-#define SDIO_HIMR_CPWM2_MSK BIT(19)
-#define SDIO_HIMR_HSISR_IND_MSK BIT(20)
-#define SDIO_HIMR_GTINT3_IND_MSK BIT(21)
-#define SDIO_HIMR_GTINT4_IND_MSK BIT(22)
-#define SDIO_HIMR_PSTIMEOUT_MSK BIT(23)
-#define SDIO_HIMR_OCPINT_MSK BIT(24)
-#define SDIO_HIMR_ATIMEND_MSK BIT(25)
-#define SDIO_HIMR_ATIMEND_E_MSK BIT(26)
-#define SDIO_HIMR_CTWEND_MSK BIT(27)
-
-/* RTL8188E SDIO Specific */
-#define SDIO_HIMR_MCU_ERR_MSK BIT(28)
-#define SDIO_HIMR_TSF_BIT32_TOGGLE_MSK BIT(29)
-
-/* SDIO Host Interrupt Service Routine */
-#define SDIO_HISR_RX_REQUEST BIT(0)
-#define SDIO_HISR_AVAL BIT(1)
-#define SDIO_HISR_TXERR BIT(2)
-#define SDIO_HISR_RXERR BIT(3)
-#define SDIO_HISR_TXFOVW BIT(4)
-#define SDIO_HISR_RXFOVW BIT(5)
-#define SDIO_HISR_TXBCNOK BIT(6)
-#define SDIO_HISR_TXBCNERR BIT(7)
-#define SDIO_HISR_BCNERLY_INT BIT(16)
-#define SDIO_HISR_C2HCMD BIT(17)
-#define SDIO_HISR_CPWM1 BIT(18)
-#define SDIO_HISR_CPWM2 BIT(19)
-#define SDIO_HISR_HSISR_IND BIT(20)
-#define SDIO_HISR_GTINT3_IND BIT(21)
-#define SDIO_HISR_GTINT4_IND BIT(22)
-#define SDIO_HISR_PSTIME BIT(23)
-#define SDIO_HISR_OCPINT BIT(24)
-#define SDIO_HISR_ATIMEND BIT(25)
-#define SDIO_HISR_ATIMEND_E BIT(26)
-#define SDIO_HISR_CTWEND BIT(27)
-
-/* RTL8188E SDIO Specific */
-#define SDIO_HISR_MCU_ERR BIT(28)
-#define SDIO_HISR_TSF_BIT32_TOGGLE BIT(29)
-
-#define MASK_SDIO_HISR_CLEAR \
- (SDIO_HISR_TXERR | SDIO_HISR_RXERR | SDIO_HISR_TXFOVW |\
- SDIO_HISR_RXFOVW | SDIO_HISR_TXBCNOK | SDIO_HISR_TXBCNERR |\
- SDIO_HISR_C2HCMD | SDIO_HISR_CPWM1 | SDIO_HISR_CPWM2 |\
- SDIO_HISR_HSISR_IND | SDIO_HISR_GTINT3_IND | SDIO_HISR_GTINT4_IND |\
- SDIO_HISR_PSTIMEOUT | SDIO_HISR_OCPINT)
-
-/* SDIO HCI Suspend Control Register */
-#define HCI_RESUME_PWR_RDY BIT(1)
-#define HCI_SUS_CTRL BIT(0)
-
-/* SDIO Tx FIFO related */
-/* The number of Tx FIFO free page */
-#define SDIO_TX_FREE_PG_QUEUE 4
-#define SDIO_TX_FIFO_PAGE_SZ 128
-
/* 0xFE00h ~ 0xFE55h USB Configuration */
/* 2 USB Information (0xFE17) */
--
2.30.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 5/5] staging: r8188eu: mac addr len is unused
2022-07-04 14:52 [PATCH 0/5] staging: r8188eu: power sequences cleanup Martin Kaiser
` (3 preceding siblings ...)
2022-07-04 14:52 ` [PATCH 4/5] staging: r8188eu: remove sdio definitions Martin Kaiser
@ 2022-07-04 14:52 ` Martin Kaiser
2022-07-04 18:58 ` [PATCH 0/5] staging: r8188eu: power sequences cleanup Philipp Hortmann
5 siblings, 0 replies; 7+ messages in thread
From: Martin Kaiser @ 2022-07-04 14:52 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, Pavel Skripkin,
linux-staging, linux-kernel, Martin Kaiser
The MAC_ADDR_LEN define is not used. Remove it.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
---
drivers/staging/r8188eu/include/rtl8188e_spec.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/r8188eu/include/rtl8188e_spec.h b/drivers/staging/r8188eu/include/rtl8188e_spec.h
index d3651ec71dc4..ce5dd2e5b72a 100644
--- a/drivers/staging/r8188eu/include/rtl8188e_spec.h
+++ b/drivers/staging/r8188eu/include/rtl8188e_spec.h
@@ -9,7 +9,6 @@
#define HAL_PS_TIMER_INT_DELAY 50 /* 50 microseconds */
#define HAL_92C_NAV_UPPER_UNIT 128 /* micro-second */
-#define MAC_ADDR_LEN 6
/* 8188E PKT_BUFF_ACCESS_CTRL value */
#define TXPKT_BUF_SELECT 0x69
#define RXPKT_BUF_SELECT 0xA5
--
2.30.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 0/5] staging: r8188eu: power sequences cleanup
2022-07-04 14:52 [PATCH 0/5] staging: r8188eu: power sequences cleanup Martin Kaiser
` (4 preceding siblings ...)
2022-07-04 14:52 ` [PATCH 5/5] staging: r8188eu: mac addr len is unused Martin Kaiser
@ 2022-07-04 18:58 ` Philipp Hortmann
5 siblings, 0 replies; 7+ messages in thread
From: Philipp Hortmann @ 2022-07-04 18:58 UTC (permalink / raw)
To: Martin Kaiser, Greg Kroah-Hartman
Cc: Larry Finger, Phillip Potter, Michael Straube, Pavel Skripkin,
linux-staging, linux-kernel
On 7/4/22 16:52, Martin Kaiser wrote:
> Simplify and clean up the power sequences. Remove some unused register
> definitions.
>
> Martin Kaiser (5):
> staging: r8188eu: move pwr seq defines to HalPwrSeqCmd.c
> staging: r8188eu: support only us in PWR_CMD_DELAY
> staging: r8188eu: read pwr seq length, remove PWR_CMD_END
> staging: r8188eu: remove sdio definitions
> staging: r8188eu: mac addr len is unused
>
> drivers/staging/r8188eu/hal/HalPwrSeqCmd.c | 60 +++++---
> .../staging/r8188eu/include/HalPwrSeqCmd.h | 47 ------
> .../staging/r8188eu/include/rtl8188e_spec.h | 137 ------------------
> 3 files changed, 42 insertions(+), 202 deletions(-)
>
Tested-by: Philipp Hortmann <philipp.g.hortmann@gmail.com> # Edimax N150
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-07-04 18:58 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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2022-07-04 14:52 [PATCH 0/5] staging: r8188eu: power sequences cleanup Martin Kaiser
2022-07-04 14:52 ` [PATCH 1/5] staging: r8188eu: move pwr seq defines to HalPwrSeqCmd.c Martin Kaiser
2022-07-04 14:52 ` [PATCH 2/5] staging: r8188eu: support only us in PWR_CMD_DELAY Martin Kaiser
2022-07-04 14:52 ` [PATCH 3/5] staging: r8188eu: read pwr seq length, remove PWR_CMD_END Martin Kaiser
2022-07-04 14:52 ` [PATCH 4/5] staging: r8188eu: remove sdio definitions Martin Kaiser
2022-07-04 14:52 ` [PATCH 5/5] staging: r8188eu: mac addr len is unused Martin Kaiser
2022-07-04 18:58 ` [PATCH 0/5] staging: r8188eu: power sequences cleanup Philipp Hortmann
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