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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jingoo Han <jingoohan1@gmail.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Jesper Nilsson <jesper.nilsson@axis.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-arm-kernel@axis.com" <linux-arm-kernel@axis.com>
Subject: Re: [PATCH 18/24] PCI: dwc: Fix dw_pcie_ep_find_capability to return correct capability offset
Date: Tue, 29 Jan 2019 15:49:51 +0530	[thread overview]
Message-ID: <a3c7458b-f8e8-1f02-116b-3e9f4fbf00f3@ti.com> (raw)
In-Reply-To: <13501c15-8f3d-604b-c4fc-bde3fb208745@synopsys.com>

Hi Gustavo,

On 29/01/19 2:55 PM, Gustavo Pimentel wrote:
> Hi Kishon,
> 
> On 14/01/2019 13:24, Kishon Vijay Abraham I wrote:
>> commit beb4641a787df79a ("PCI: dwc: Add MSI-X callbacks handler") while
>> adding MSI-X callback handler, introduced dw_pcie_ep_find_capability and
>> __dw_pcie_ep_find_next_cap for finding the MSI and MSIX capability.
>>
>> However if MSI or MSIX capability is the last capability (i.e there are
>> no additional items in the capabilities list and the Next Capability
>> Pointer is set to '0'), __dw_pcie_ep_find_next_cap will return '0'
>> even though MSI or MSIX capability may be present. This is because of
>> incorrect ordering of "next_cap_ptr" check. Fix it here.
>>
>> Fixes: beb4641a787df79a142 ("PCI: dwc: Add MSI-X callbacks handler")
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>>  drivers/pci/controller/dwc/pcie-designware-ep.c | 10 +++++-----
>>  1 file changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
>> index d5144781005b..cd51b008858c 100644
>> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
>> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
>> @@ -46,16 +46,19 @@ static u8 __dw_pcie_ep_find_next_cap(struct dw_pcie *pci, u8 cap_ptr,
>>  	u8 cap_id, next_cap_ptr;
>>  	u16 reg;
>>  
>> +	if (!cap_ptr)
>> +		return 0;
>> +
> 
> Supposedly this was already verified by the function that calls this one.

Right, with with this fix cap_ptr is checked only once. This being a recursive
function, it makes sense to have the check only here instead of once in the
calling function and once here.
> 
>>  	reg = dw_pcie_readw_dbi(pci, cap_ptr);
>> -	next_cap_ptr = (reg & 0xff00) >> 8;
>>  	cap_id = (reg & 0x00ff);
>>  
>> -	if (!next_cap_ptr || cap_id > PCI_CAP_ID_MAX)
>> +	if (cap_id > PCI_CAP_ID_MAX)
>>  		return 0;
>>  
>>  	if (cap_id == cap)
>>  		return cap_ptr;
>>  
>> +	next_cap_ptr = (reg & 0xff00) >> 8;
> 
> This fix seems to be a bit overdone, especially when you only need to swap the
> if blocks order to achieve the desired goal.

No, cap_id > PCI_CAP_ID_MAX is a base error case and it should checked before
returning the offset IMO.
> 
>>  	return __dw_pcie_ep_find_next_cap(pci, next_cap_ptr, cap);
>>  }
>>  
>> @@ -67,9 +70,6 @@ static u8 dw_pcie_ep_find_capability(struct dw_pcie *pci, u8 cap)
>>  	reg = dw_pcie_readw_dbi(pci, PCI_CAPABILITY_LIST);
>>  	next_cap_ptr = (reg & 0x00ff);
>>  
>> -	if (!next_cap_ptr)
>> -		return 0;
>> -
> 
> Why remove it?
> If pointer is null, why to jump to another function to check is the the same
> pointer is null?

so that we check cap_ptr only once.

Thanks
Kishon

  reply	other threads:[~2019-01-29 10:20 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-14 13:24 [PATCH 00/24] Add support for PCIe RC and EP mode in TI's AM654 SoC Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 01/24] PCI: keystone: Add start_link/stop_link dw_pcie_ops Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 02/24] PCI: keystone: Cleanup error_irq configuration Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 03/24] dt-bindings: PCI: keystone: Add "reg-names" binding information Kishon Vijay Abraham I
2019-01-22  0:31   ` Rob Herring
2019-01-14 13:24 ` [PATCH 04/24] PCI: keystone: Perform host initialization in a single function Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 05/24] PCI: keystone: Use platform_get_resource_byname to get memory resources Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 06/24] PCI: keystone: Move initializations to appropriate places Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 07/24] dt-bindings: PCI: Add dt-binding to configure PCIe mode Kishon Vijay Abraham I
2019-01-22  0:32   ` Rob Herring
2019-01-14 13:24 ` [PATCH 08/24] PCI: keystone: Explicitly set the " Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 09/24] dt-bindings: PCI: Document "atu" reg-names Kishon Vijay Abraham I
2019-01-22  0:48   ` Rob Herring
2019-01-23 10:04     ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 10/24] PCI: dwc: Enable iATU unroll for endpoint too Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 11/24] PCI: dwc: Fix ATU identification for designware version >= 4.80 Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 12/24] PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64 Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 13/24] dt-bindings: PCI: Add PCI RC dt binding documentation for AM654 Kishon Vijay Abraham I
2019-01-22  0:48   ` Rob Herring
2019-01-14 13:24 ` [PATCH 14/24] PCI: keystone: Add support for PCIe RC in AM654x Platforms Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 15/24] PCI: keystone: Invoke phy_reset API before enabling PHY Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 16/24] PCI: endpoint: Add support to allocate aligned buffers to be mapped in BARs Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 17/24] PCI: dwc: Add const qualifier to struct dw_pcie_ep_ops Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 18/24] PCI: dwc: Fix dw_pcie_ep_find_capability to return correct capability offset Kishon Vijay Abraham I
2019-01-29  9:25   ` Gustavo Pimentel
2019-01-29 10:19     ` Kishon Vijay Abraham I [this message]
2019-01-14 13:24 ` [PATCH 19/24] PCI: dwc: Add callbacks for accessing dbi2 address space Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 20/24] PCI: keystone: Add support for PCIe EP in AM654x Platforms Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 21/24] PCI: designware-ep: Configure RESBAR to advertise the smallest size Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 22/24] PCI: designware-ep: Use aligned ATU window for raising MSI interrupts Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 23/24] misc: pci_endpoint_test: Add support to test PCI EP in AM654x Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 24/24] misc: pci_endpoint_test: Fix test_reg_bar to be updated in pci_endpoint_test Kishon Vijay Abraham I
2019-02-04 16:40 ` [PATCH 00/24] Add support for PCIe RC and EP mode in TI's AM654 SoC Lorenzo Pieralisi
2019-02-06 12:50   ` Kishon Vijay Abraham I

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