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From: David Daney <ddaney@caviumnetworks.com>
To: James Hogan <james.hogan@mips.com>, David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org,
	netdev@vger.kernel.org, "David S. Miller" <davem@davemloft.net>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	devel@driverdev.osuosl.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-kernel@vger.kernel.org,
	"Steven J. Hill" <steven.hill@cavium.com>,
	devicetree@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Carlos Munoz <cmunoz@cavium.com>
Subject: Re: [PATCH v4 3/8] MIPS: Octeon: Add a global resource manager.
Date: Thu, 30 Nov 2017 17:51:11 -0800	[thread overview]
Message-ID: <a5e99796-154a-8950-3a38-4788f64fafa2@caviumnetworks.com> (raw)
In-Reply-To: <20171130225333.GI27409@jhogan-linux.mipstec.com>

On 11/30/2017 02:53 PM, James Hogan wrote:
> On Tue, Nov 28, 2017 at 04:55:35PM -0800, David Daney wrote:
>> From: Carlos Munoz <cmunoz@cavium.com>
>>
>> Add a global resource manager to manage tagged pointers within
>> bootmem allocated memory. This is used by various functional
>> blocks in the Octeon core like the FPA, Ethernet nexus, etc.
>>
>> Signed-off-by: Carlos Munoz <cmunoz@cavium.com>
>> Signed-off-by: Steven J. Hill <Steven.Hill@cavium.com>
>> Signed-off-by: David Daney <david.daney@cavium.com>
>> ---
>>   arch/mips/cavium-octeon/Makefile       |   3 +-
>>   arch/mips/cavium-octeon/resource-mgr.c | 371 +++++++++++++++++++++++++++++++++
>>   arch/mips/include/asm/octeon/octeon.h  |  18 ++
>>   3 files changed, 391 insertions(+), 1 deletion(-)
>>   create mode 100644 arch/mips/cavium-octeon/resource-mgr.c
>>
>> diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
>> index 7c02e542959a..0a299ab8719f 100644
>> --- a/arch/mips/cavium-octeon/Makefile
>> +++ b/arch/mips/cavium-octeon/Makefile
>> @@ -9,7 +9,8 @@
>>   # Copyright (C) 2005-2009 Cavium Networks
>>   #
>>   
>> -obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o
>> +obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o \
>> +	 resource-mgr.o
> 
> Maybe put that on a separate line like below.

OK

> 
>>   obj-y += dma-octeon.o
>>   obj-y += octeon-memcpy.o
>>   obj-y += executive/
>> diff --git a/arch/mips/cavium-octeon/resource-mgr.c b/arch/mips/cavium-octeon/resource-mgr.c
>> new file mode 100644
>> index 000000000000..ca25fa953402
>> --- /dev/null
>> +++ b/arch/mips/cavium-octeon/resource-mgr.c
>> @@ -0,0 +1,371 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Resource manager for Octeon.
>> + *
>> + * This file is subject to the terms and conditions of the GNU General Public
>> + * License.  See the file "COPYING" in the main directory of this archive
>> + * for more details.
>> + *
>> + * Copyright (C) 2017 Cavium, Inc.
>> + */
>> +#include <linux/module.h>
>> +
>> +#include <asm/octeon/octeon.h>
>> +#include <asm/octeon/cvmx-bootmem.h>
>> +
>> +#define RESOURCE_MGR_BLOCK_NAME		"cvmx-global-resources"
>> +#define MAX_RESOURCES			128
>> +#define INST_AVAILABLE			-88
>> +#define OWNER				0xbadc0de
>> +
>> +struct global_resource_entry {
>> +	struct global_resource_tag tag;
>> +	u64 phys_addr;
>> +	u64 size;
>> +};
>> +
>> +struct global_resources {
>> +#ifdef __LITTLE_ENDIAN_BITFIELD
>> +	u32 rlock;
>> +	u32 pad;
>> +#else
>> +	u32 pad;
>> +	u32 rlock;
>> +#endif
>> +	u64 entry_cnt;
>> +	struct global_resource_entry resource_entry[];
>> +};
>> +
>> +static struct global_resources *res_mgr_info;
>> +
>> +
>> +/*
>> + * The resource manager interacts with software running outside of the
>> + * Linux kernel, which necessitates locking to maintain data structure
>> + * consistency.  These custom locking functions implement the locking
>> + * protocol, and cannot be replaced by kernel locking functions that
>> + * may use different in-memory structures.
>> + */
>> +
>> +static void res_mgr_lock(void)
>> +{
>> +	unsigned int tmp;
>> +	u64 lock = (u64)&res_mgr_info->rlock;
> 
> presumably this could be a u32 *, avoid the cast to u64, and still work
> just fine below.

I will rewrite to just use cmpxchg()


> 
>> +
>> +	__asm__ __volatile__(
>> +		".set noreorder\n"
>> +		"1: ll   %[tmp], 0(%[addr])\n"
>> +		"   bnez %[tmp], 1b\n"
>> +		"   li   %[tmp], 1\n"
> 
> I believe the convention for .S files is for instructions in branch
> delay slots to be indented an additional space for readability. Maybe
> that would be worthwhile here.
> 
>> +		"   sc   %[tmp], 0(%[addr])\n"
>> +		"   beqz %[tmp], 1b\n"
>> +		"   nop\n"
> 
> and here also.
> 
>> +		".set reorder\n" :
> 
> nit: strictly speaking there's no need for \n on the last line.
> 
>> +		[tmp] "=&r"(tmp) :
>> +		[addr] "r"(lock) :
>> +		"memory");
> 
> minor style thing: its far more common to have : at the beginning of the
> line rather than the end.
> 
>> +}
>> +
>> +static void res_mgr_unlock(void)
>> +{
>> +	u64 lock = (u64)&res_mgr_info->rlock;
> 
> same again
> 

Will rewrite to use WRITE_ONCE().

>> +
>> +	/* Wait until all resource operations finish before unlocking. */
>> +	mb();
>> +	__asm__ __volatile__(
>> +		"sw $0, 0(%[addr])\n" : :
>> +		[addr] "r"(lock) :
>> +		"memory");
>> +
>> +	/* Force a write buffer flush. */
>> +	mb();
>> +}
>> +
>> +static int res_mgr_find_resource(struct global_resource_tag tag)
>> +{
>> +	struct global_resource_entry *res_entry;
>> +	int i;
>> +
>> +	for (i = 0; i < res_mgr_info->entry_cnt; i++) {
>> +		res_entry = &res_mgr_info->resource_entry[i];
>> +		if (res_entry->tag.lo == tag.lo && res_entry->tag.hi == tag.hi)
>> +			return i;
>> +	}
>> +	return -1;
>> +}
>> +
>> +/**
>> + * res_mgr_create_resource - Create a resource.
>> + * @tag: Identifies the resource.
>> + * @inst_cnt: Number of resource instances to create.
>> + *
>> + * Returns 0 if the source was created successfully.
>> + * Returns <0 for error codes.
> 
> Only -1 seems to be returned. Is it worth returning some standard Linux
> error codes instead?

Yep.  I fixed this and everything below for the next version of the 
patch set.

Thanks,
David Daney

  reply	other threads:[~2017-12-01  1:51 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-29  0:55 [PATCH v4 0/8] Cavium OCTEON-III network driver David Daney
2017-11-29  0:55 ` [PATCH v4 1/8] dt-bindings: Add Cavium Octeon Common Ethernet Interface David Daney
2017-11-29  2:01   ` Andrew Lunn
2017-11-29  2:54     ` David Daney
2017-11-29  0:55 ` [PATCH v4 2/8] MIPS: Octeon: Enable LMTDMA/LMTST operations David Daney
2017-11-30 21:36   ` James Hogan
2017-11-30 21:49     ` David Daney
2017-11-30 22:56       ` James Hogan
2017-11-30 23:09         ` David Daney
2017-11-30 23:12           ` James Hogan
2017-11-29  0:55 ` [PATCH v4 3/8] MIPS: Octeon: Add a global resource manager David Daney
2017-11-30 22:53   ` James Hogan
2017-12-01  1:51     ` David Daney [this message]
2017-12-01  7:53     ` Philippe Ombredanne
2017-12-01 17:42       ` David Daney
2017-12-01 19:49         ` Philippe Ombredanne
2017-12-01 20:01           ` David Daney
2017-12-01 20:41             ` Philippe Ombredanne
2017-12-01 20:56               ` David Daney
2017-12-01 23:33                 ` Philippe Ombredanne
2017-11-29  0:55 ` [PATCH v4 4/8] MIPS: Octeon: Add Free Pointer Unit (FPA) support David Daney
2017-11-29  0:55 ` [PATCH v4 5/8] MIPS: Octeon: Automatically provision CVMSEG space David Daney
2017-11-29  0:55 ` [PATCH v4 6/8] staging: octeon: Remove USE_ASYNC_IOBDMA macro David Daney
2017-12-07 14:28   ` Greg Kroah-Hartman
2017-11-29  0:55 ` [PATCH v4 7/8] netdev: octeon-ethernet: Add Cavium Octeon III support David Daney
2017-11-29 10:30   ` Souptick Joarder
2017-11-29 13:47     ` Andrew Lunn
2017-11-29 16:07     ` Souptick Joarder
2017-11-29 19:11       ` Dan Carpenter
2017-11-29 22:16         ` Andrew Lunn
2017-11-29 19:20       ` David Daney
2017-11-30  7:12         ` Souptick Joarder
2017-11-29 22:56   ` Andrew Lunn
2017-11-29 23:04     ` David Daney
2017-11-29  0:55 ` [PATCH v4 8/8] MAINTAINERS: Add entry for drivers/net/ethernet/cavium/octeon/octeon3-* David Daney
2017-11-29 14:18 ` [PATCH v4 0/8] Cavium OCTEON-III network driver David Miller

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