* [PATCH v4 1/4] dt-bindings: crypto: Mention clocks for mxs-dcp
2018-10-17 12:37 [PATCH v4 0/4] Port mxs-dcp to imx6ull and imx6sll Leonard Crestez
@ 2018-10-17 12:37 ` Leonard Crestez
2018-10-18 18:25 ` Rob Herring
2018-10-17 12:37 ` [PATCH v4 2/4] crypto: mxs-dcp - Add support for dcp clk Leonard Crestez
` (2 subsequent siblings)
3 siblings, 1 reply; 12+ messages in thread
From: Leonard Crestez @ 2018-10-17 12:37 UTC (permalink / raw)
To: Shawn Guo, Fabio Estevam
Cc: Rob Herring, Marek Vasut, Herbert Xu, Horia Geanta,
Franck Lenormand, Aymen Sghaier, David S . Miller ,
Mark Rutland, devicetree, linux-crypto, linux-arm-kernel,
dl-linux-imx, kernel, linux-kernel
Explicit clock enabling is required on 6sll and 6ull so mention that
standard clock bindings are used.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---
Documentation/devicetree/bindings/crypto/fsl-dcp.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt
index 76a0b4e80e83..4e4d387e38a5 100644
--- a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt
+++ b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt
@@ -4,10 +4,12 @@ Required properties:
- compatible : Should be "fsl,<soc>-dcp"
- reg : Should contain MXS DCP registers location and length
- interrupts : Should contain MXS DCP interrupt numbers, VMI IRQ and DCP IRQ
must be supplied, optionally Secure IRQ can be present, but
is currently not implemented and not used.
+- clocks : Clock reference (only required on some SOCs: 6ull and 6sll).
+- clock-names : Must be "dcp".
Example:
dcp@80028000 {
compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
--
2.17.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v4 1/4] dt-bindings: crypto: Mention clocks for mxs-dcp
2018-10-17 12:37 ` [PATCH v4 1/4] dt-bindings: crypto: Mention clocks for mxs-dcp Leonard Crestez
@ 2018-10-18 18:25 ` Rob Herring
0 siblings, 0 replies; 12+ messages in thread
From: Rob Herring @ 2018-10-18 18:25 UTC (permalink / raw)
To: Leonard Crestez
Cc: Shawn Guo, Fabio Estevam, Marek Vasut, Herbert Xu, Horia Geanta,
Franck Lenormand, Aymen Sghaier, David S . Miller ,
Mark Rutland, devicetree, linux-crypto, linux-arm-kernel,
dl-linux-imx, kernel, linux-kernel
On Wed, 17 Oct 2018 12:37:51 +0000, Leonard Crestez wrote:
> Explicit clock enabling is required on 6sll and 6ull so mention that
> standard clock bindings are used.
>
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
> ---
> Documentation/devicetree/bindings/crypto/fsl-dcp.txt | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v4 2/4] crypto: mxs-dcp - Add support for dcp clk
2018-10-17 12:37 [PATCH v4 0/4] Port mxs-dcp to imx6ull and imx6sll Leonard Crestez
2018-10-17 12:37 ` [PATCH v4 1/4] dt-bindings: crypto: Mention clocks for mxs-dcp Leonard Crestez
@ 2018-10-17 12:37 ` Leonard Crestez
2018-10-17 12:48 ` Fabio Estevam
2018-10-17 12:37 ` [PATCH v4 3/4] ARM: dts: imx6ull: Add dcp node Leonard Crestez
2018-10-17 12:37 ` [PATCH v4 4/4] ARM: imx_v6_v7_defconfig: Enable CRYPTO_DEV_MXS_DCP Leonard Crestez
3 siblings, 1 reply; 12+ messages in thread
From: Leonard Crestez @ 2018-10-17 12:37 UTC (permalink / raw)
To: Shawn Guo, Fabio Estevam
Cc: Rob Herring, Marek Vasut, Herbert Xu, Horia Geanta,
Franck Lenormand, Aymen Sghaier, David S . Miller ,
Mark Rutland, devicetree, linux-crypto, linux-arm-kernel,
dl-linux-imx, kernel, linux-kernel
On 6ull and 6sll the DCP block has a clock which needs to be explicitly
enabled.
Add minimal handling for this at probe/remove time.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
drivers/crypto/mxs-dcp.c | 28 +++++++++++++++++++++++++---
1 file changed, 25 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/mxs-dcp.c b/drivers/crypto/mxs-dcp.c
index 4e6ff32f8a7e..a2105cf33abb 100644
--- a/drivers/crypto/mxs-dcp.c
+++ b/drivers/crypto/mxs-dcp.c
@@ -18,10 +18,11 @@
#include <linux/kthread.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/stmp_device.h>
+#include <linux/clk.h>
#include <crypto/aes.h>
#include <crypto/sha.h>
#include <crypto/internal/hash.h>
#include <crypto/internal/skcipher.h>
@@ -80,10 +81,11 @@ struct dcp {
struct completion completion[DCP_MAX_CHANS];
spinlock_t lock[DCP_MAX_CHANS];
struct task_struct *thread[DCP_MAX_CHANS];
struct crypto_queue queue[DCP_MAX_CHANS];
+ struct clk *dcp_clk;
};
enum dcp_chan {
DCP_CHAN_HASH_SHA = 0,
DCP_CHAN_CRYPTO = 2,
@@ -1051,15 +1053,28 @@ static int mxs_dcp_probe(struct platform_device *pdev)
return -ENOMEM;
/* Re-align the structure so it fits the DCP constraints. */
sdcp->coh = PTR_ALIGN(sdcp->coh, DCP_ALIGNMENT);
- /* Restart the DCP block. */
- ret = stmp_reset_block(sdcp->base);
+ /* DCP clock is optional, only used on some SOCs */
+ sdcp->dcp_clk = devm_clk_get(dev, "dcp");
+ if (IS_ERR(sdcp->dcp_clk)) {
+ if (sdcp->dcp_clk != ERR_PTR(-ENOENT))
+ return PTR_ERR(sdcp->dcp_clk);
+ sdcp->dcp_clk = NULL;
+ }
+ ret = clk_prepare_enable(sdcp->dcp_clk);
if (ret)
return ret;
+ /* Restart the DCP block. */
+ ret = stmp_reset_block(sdcp->base);
+ if (ret) {
+ dev_err(dev, "Failed reset\n");
+ goto err_disable_unprepare_clk;
+ }
+
/* Initialize control register. */
writel(MXS_DCP_CTRL_GATHER_RESIDUAL_WRITES |
MXS_DCP_CTRL_ENABLE_CONTEXT_CACHING | 0xf,
sdcp->base + MXS_DCP_CTRL);
@@ -1092,11 +1107,12 @@ static int mxs_dcp_probe(struct platform_device *pdev)
/* Create the SHA and AES handler threads. */
sdcp->thread[DCP_CHAN_HASH_SHA] = kthread_run(dcp_chan_thread_sha,
NULL, "mxs_dcp_chan/sha");
if (IS_ERR(sdcp->thread[DCP_CHAN_HASH_SHA])) {
dev_err(dev, "Error starting SHA thread!\n");
- return PTR_ERR(sdcp->thread[DCP_CHAN_HASH_SHA]);
+ ret = PTR_ERR(sdcp->thread[DCP_CHAN_HASH_SHA]);
+ goto err_disable_unprepare_clk;
}
sdcp->thread[DCP_CHAN_CRYPTO] = kthread_run(dcp_chan_thread_aes,
NULL, "mxs_dcp_chan/aes");
if (IS_ERR(sdcp->thread[DCP_CHAN_CRYPTO])) {
@@ -1149,10 +1165,14 @@ static int mxs_dcp_probe(struct platform_device *pdev)
err_destroy_aes_thread:
kthread_stop(sdcp->thread[DCP_CHAN_CRYPTO]);
err_destroy_sha_thread:
kthread_stop(sdcp->thread[DCP_CHAN_HASH_SHA]);
+
+err_disable_unprepare_clk:
+ clk_disable_unprepare(sdcp->dcp_clk);
+
return ret;
}
static int mxs_dcp_remove(struct platform_device *pdev)
{
@@ -1168,10 +1188,12 @@ static int mxs_dcp_remove(struct platform_device *pdev)
crypto_unregister_algs(dcp_aes_algs, ARRAY_SIZE(dcp_aes_algs));
kthread_stop(sdcp->thread[DCP_CHAN_HASH_SHA]);
kthread_stop(sdcp->thread[DCP_CHAN_CRYPTO]);
+ clk_disable_unprepare(sdcp->dcp_clk);
+
platform_set_drvdata(pdev, NULL);
global_sdcp = NULL;
return 0;
--
2.17.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v4 2/4] crypto: mxs-dcp - Add support for dcp clk
2018-10-17 12:37 ` [PATCH v4 2/4] crypto: mxs-dcp - Add support for dcp clk Leonard Crestez
@ 2018-10-17 12:48 ` Fabio Estevam
2018-10-17 12:59 ` Leonard Crestez
0 siblings, 1 reply; 12+ messages in thread
From: Fabio Estevam @ 2018-10-17 12:48 UTC (permalink / raw)
To: Leonard Crestez
Cc: Shawn Guo, Fabio Estevam, Rob Herring, Marek Vasut, Herbert Xu,
Horia Geanta Neag, Franck LENORMAND, Aymen Sghaier,
David S. Miller, Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:HARDWARE RANDOM NUMBER GENERATOR CORE,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
NXP Linux Team, Sascha Hauer, linux-kernel
Hi Leonard,
On Wed, Oct 17, 2018 at 9:38 AM Leonard Crestez <leonard.crestez@nxp.com> wrote:
>
> On 6ull and 6sll the DCP block has a clock which needs to be explicitly
> enabled.
>
> Add minimal handling for this at probe/remove time.
>
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> ---
Please always explain what changed from the previous patch version.
> + /* Restart the DCP block. */
> + ret = stmp_reset_block(sdcp->base);
> + if (ret) {
> + dev_err(dev, "Failed reset\n");
> + goto err_disable_unprepare_clk;
> + }
This seems like an unrelated change that should be in a separate patch.
Also, this was not present in v3, so it is better to explain that this
has been introduced in v4.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 2/4] crypto: mxs-dcp - Add support for dcp clk
2018-10-17 12:48 ` Fabio Estevam
@ 2018-10-17 12:59 ` Leonard Crestez
2018-10-17 13:02 ` Fabio Estevam
0 siblings, 1 reply; 12+ messages in thread
From: Leonard Crestez @ 2018-10-17 12:59 UTC (permalink / raw)
To: festevam
Cc: dl-linux-imx, linux-kernel, robh+dt, devicetree, Fabio Estevam,
Aymen Sghaier, Franck Lenormand, mark.rutland, shawnguo,
linux-arm-kernel, davem, Horia Geanta, kernel, herbert,
marek.vasut, linux-crypto
On Wed, 2018-10-17 at 09:48 -0300, Fabio Estevam wrote:
> On Wed, Oct 17, 2018 at 9:38 AM Leonard Crestez <leonard.crestez@nxp.com> wrote:
> >
> > On 6ull and 6sll the DCP block has a clock which needs to be explicitly
> > enabled.
> >
> > Add minimal handling for this at probe/remove time.
> >
> > Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
>
> Please always explain what changed from the previous patch version.
There is a changelog in the cover letter.
> > + /* Restart the DCP block. */
> > + ret = stmp_reset_block(sdcp->base);
> > + if (ret) {
> > + dev_err(dev, "Failed reset\n");
> > + goto err_disable_unprepare_clk;
> > + }
>
> This seems like an unrelated change that should be in a separate patch.
>
> Also, this was not present in v3, so it is better to explain that this
> has been introduced in v4.
This only looks slightly odd in git diff but it's not unrelated.
I placed clk get/prepare/enable just before stmp_reset_block and made
stmp_reset_block print a message and goto err_disable_unprepare_clk on
failure instead of just "if (ret) return ret;"
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 2/4] crypto: mxs-dcp - Add support for dcp clk
2018-10-17 12:59 ` Leonard Crestez
@ 2018-10-17 13:02 ` Fabio Estevam
2018-10-31 10:46 ` Leonard Crestez
0 siblings, 1 reply; 12+ messages in thread
From: Fabio Estevam @ 2018-10-17 13:02 UTC (permalink / raw)
To: Leonard Crestez
Cc: NXP Linux Team, linux-kernel, Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Fabio Estevam, Aymen Sghaier, Franck LENORMAND, Mark Rutland,
Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
David S. Miller, Horia Geanta Neag, Sascha Hauer, Herbert Xu,
Marek Vasut, open list:HARDWARE RANDOM NUMBER GENERATOR CORE
On Wed, Oct 17, 2018 at 9:59 AM Leonard Crestez <leonard.crestez@nxp.com> wrote:
> There is a changelog in the cover letter.
It did not show up:
https://lkml.org/lkml/2018/10/17/673
> This only looks slightly odd in git diff but it's not unrelated.
>
> I placed clk get/prepare/enable just before stmp_reset_block and made
> stmp_reset_block print a message and goto err_disable_unprepare_clk on
> failure instead of just "if (ret) return ret;"
Got it! Then it looks fine, thanks:
Reviewed-by: Fabio Estevam <festevam@gmail.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 2/4] crypto: mxs-dcp - Add support for dcp clk
2018-10-17 13:02 ` Fabio Estevam
@ 2018-10-31 10:46 ` Leonard Crestez
0 siblings, 0 replies; 12+ messages in thread
From: Leonard Crestez @ 2018-10-31 10:46 UTC (permalink / raw)
To: Fabio Estevam, David S. Miller, Herbert Xu
Cc: dl-linux-imx, linux-kernel, Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Fabio Estevam, Aymen Sghaier, Franck Lenormand, Mark Rutland,
Shawn Guo,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Horia Geanta, Sascha Hauer, Marek Vasut,
open list:HARDWARE RANDOM NUMBER GENERATOR CORE
On 10/17/2018 4:02 PM, Fabio Estevam wrote:
> On Wed, Oct 17, 2018 at 9:59 AM Leonard Crestez <leonard.crestez@nxp.com> wrote:
>
>> There is a changelog in the cover letter.
>
> It did not show up:
> https://lkml.org/lkml/2018/10/17/673
Sorry, I forgot to copy the changelog for v4. The only change is the one
we discussed earlier in this thread.
>> This only looks slightly odd in git diff but it's not unrelated.
>>
>> I placed clk get/prepare/enable just before stmp_reset_block and made
>> stmp_reset_block print a message and goto err_disable_unprepare_clk on
>> failure instead of just "if (ret) return ret;"
>
> Got it! Then it looks fine, thanks:
>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Thanks for looking at this series.
Shawn already applied patches 3/4, I guess parts 1/2 should go through
the crypto tree? I don't know how crypto treats patches in the merge
window, I can resend with all the ack/review tags after rc1 is out.
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v4 3/4] ARM: dts: imx6ull: Add dcp node
2018-10-17 12:37 [PATCH v4 0/4] Port mxs-dcp to imx6ull and imx6sll Leonard Crestez
2018-10-17 12:37 ` [PATCH v4 1/4] dt-bindings: crypto: Mention clocks for mxs-dcp Leonard Crestez
2018-10-17 12:37 ` [PATCH v4 2/4] crypto: mxs-dcp - Add support for dcp clk Leonard Crestez
@ 2018-10-17 12:37 ` Leonard Crestez
2018-10-31 7:26 ` Shawn Guo
2018-10-17 12:37 ` [PATCH v4 4/4] ARM: imx_v6_v7_defconfig: Enable CRYPTO_DEV_MXS_DCP Leonard Crestez
3 siblings, 1 reply; 12+ messages in thread
From: Leonard Crestez @ 2018-10-17 12:37 UTC (permalink / raw)
To: Shawn Guo, Fabio Estevam
Cc: Rob Herring, Marek Vasut, Herbert Xu, Horia Geanta,
Franck Lenormand, Aymen Sghaier, David S . Miller ,
Mark Rutland, devicetree, linux-crypto, linux-arm-kernel,
dl-linux-imx, kernel, linux-kernel
The DCP block on 6ull has no major differences other than requiring
explicit clock enabling.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---
arch/arm/boot/dts/imx6ull.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index 796ed35d4ac9..f3668fe69eac 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -37,10 +37,20 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0x02200000 0x100000>;
ranges;
+ dcp: crypto@2280000 {
+ compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp";
+ reg = <0x02280000 0x4000>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6ULL_CLK_DCP_CLK>;
+ clock-names = "dcp";
+ };
+
iomuxc_snvs: iomuxc-snvs@2290000 {
compatible = "fsl,imx6ull-iomuxc-snvs";
reg = <0x02290000 0x4000>;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v4 3/4] ARM: dts: imx6ull: Add dcp node
2018-10-17 12:37 ` [PATCH v4 3/4] ARM: dts: imx6ull: Add dcp node Leonard Crestez
@ 2018-10-31 7:26 ` Shawn Guo
0 siblings, 0 replies; 12+ messages in thread
From: Shawn Guo @ 2018-10-31 7:26 UTC (permalink / raw)
To: Leonard Crestez
Cc: Fabio Estevam, Mark Rutland, devicetree, Aymen Sghaier,
Herbert Xu, Horia Geanta, linux-kernel, Franck Lenormand,
Marek Vasut, Rob Herring, linux-crypto, kernel, David S . Miller ,
linux-arm-kernel, dl-linux-imx
On Wed, Oct 17, 2018 at 12:37:54PM +0000, Leonard Crestez wrote:
> The DCP block on 6ull has no major differences other than requiring
> explicit clock enabling.
>
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v4 4/4] ARM: imx_v6_v7_defconfig: Enable CRYPTO_DEV_MXS_DCP
2018-10-17 12:37 [PATCH v4 0/4] Port mxs-dcp to imx6ull and imx6sll Leonard Crestez
` (2 preceding siblings ...)
2018-10-17 12:37 ` [PATCH v4 3/4] ARM: dts: imx6ull: Add dcp node Leonard Crestez
@ 2018-10-17 12:37 ` Leonard Crestez
2018-10-31 7:27 ` Shawn Guo
3 siblings, 1 reply; 12+ messages in thread
From: Leonard Crestez @ 2018-10-17 12:37 UTC (permalink / raw)
To: Shawn Guo, Fabio Estevam
Cc: Rob Herring, Marek Vasut, Herbert Xu, Horia Geanta,
Franck Lenormand, Aymen Sghaier, David S . Miller ,
Mark Rutland, devicetree, linux-crypto, linux-arm-kernel,
dl-linux-imx, kernel, linux-kernel
This block is present in 6sl, 6sll and 6ull so it should be enabled in
the default imx kernel config.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---
arch/arm/configs/imx_v6_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 1ad5736c8fa6..57928dff9bce 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -428,10 +428,11 @@ CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_UTF8=y
CONFIG_SECURITYFS=y
CONFIG_CRYPTO_DEV_FSL_CAAM=y
CONFIG_CRYPTO_DEV_SAHARA=y
+CONFIG_CRYPTO_DEV_MXS_DCP=y
CONFIG_CRC_CCITT=m
CONFIG_CRC_T10DIF=y
CONFIG_CRC7=m
CONFIG_LIBCRC32C=m
CONFIG_FONTS=y
--
2.17.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v4 4/4] ARM: imx_v6_v7_defconfig: Enable CRYPTO_DEV_MXS_DCP
2018-10-17 12:37 ` [PATCH v4 4/4] ARM: imx_v6_v7_defconfig: Enable CRYPTO_DEV_MXS_DCP Leonard Crestez
@ 2018-10-31 7:27 ` Shawn Guo
0 siblings, 0 replies; 12+ messages in thread
From: Shawn Guo @ 2018-10-31 7:27 UTC (permalink / raw)
To: Leonard Crestez
Cc: Fabio Estevam, Mark Rutland, devicetree, Aymen Sghaier,
Herbert Xu, Horia Geanta, linux-kernel, Franck Lenormand,
Marek Vasut, Rob Herring, linux-crypto, kernel, David S . Miller ,
linux-arm-kernel, dl-linux-imx
On Wed, Oct 17, 2018 at 12:37:55PM +0000, Leonard Crestez wrote:
> This block is present in 6sl, 6sll and 6ull so it should be enabled in
> the default imx kernel config.
>
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 12+ messages in thread