* [PATCH 0/9] -tip/apic merging one more series
@ 2008-08-17 19:41 Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 1/9] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
2008-08-17 21:53 ` [PATCH 0/9] -tip/apic merging one more series Yinghai Lu
0 siblings, 2 replies; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-17 19:41 UTC (permalink / raw)
To: hpa, mingo, tglx, macro; +Cc: linux-kernel
Simple changes mostly. The only patch which should be considered
with more attention is
[PATCH 9/9] x86: apic - generic_processor_info
where I suspect the bug was - we had set phys_cpu_present_map
but it could happen we warn about processor number limit after
and exit havin this bit set.
Please review - any comments are welcome!
(new week are almost started so my patch flow will decrease
'cause of other duties)
- Cyrill -
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 1/9] x86: apic - rearrange maxcpu definition
2008-08-17 19:41 [PATCH 0/9] -tip/apic merging one more series Cyrill Gorcunov
@ 2008-08-17 19:41 ` Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 2/9] x86: apic - unify setup_boot_APIC_clock Cyrill Gorcunov
` (7 more replies)
2008-08-17 21:53 ` [PATCH 0/9] -tip/apic merging one more series Yinghai Lu
1 sibling, 8 replies; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-17 19:41 UTC (permalink / raw)
To: hpa, mingo, tglx, macro; +Cc: linux-kernel, Cyrill Gorcunov
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
arch/x86/kernel/apic_32.c | 4 ++--
arch/x86/kernel/apic_64.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 41134d4..8d1febf 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -114,6 +114,8 @@ static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
static int enabled_via_apicbase;
static unsigned long apic_phys;
+unsigned int __cpuinitdata maxcpus = NR_CPUS;
+
/*
* Get the LAPIC version
@@ -1459,8 +1461,6 @@ void disconnect_bsp_APIC(int virt_wire_setup)
}
}
-unsigned int __cpuinitdata maxcpus = NR_CPUS;
-
void __cpuinit generic_processor_info(int apicid, int version)
{
int cpu;
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 5e07381..6aa0f60 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -98,10 +98,10 @@ static struct clock_event_device lapic_clockevent = {
static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
static unsigned long apic_phys;
+unsigned int __cpuinitdata maxcpus = NR_CPUS;
unsigned long mp_lapic_addr;
-unsigned int __cpuinitdata maxcpus = NR_CPUS;
/*
* Get the LAPIC version
*/
--
1.6.0.rc1.34.g0fe8c
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/9] x86: apic - unify setup_boot_APIC_clock
2008-08-17 19:41 ` [PATCH 1/9] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
@ 2008-08-17 19:41 ` Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 3/9] x86: apic - unify disable_local_APIC Cyrill Gorcunov
` (6 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-17 19:41 UTC (permalink / raw)
To: hpa, mingo, tglx, macro; +Cc: linux-kernel, Cyrill Gorcunov
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
arch/x86/kernel/apic_32.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 8d1febf..80db3e0 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -612,6 +612,7 @@ void __init setup_boot_APIC_clock(void)
* broadcast mechanism is used. On UP systems simply ignore it.
*/
if (disable_apic_timer) {
+ printk(KERN_INFO "Disabling APIC timer\n");
/* No broadcast on UP ! */
if (num_possible_cpus() > 1) {
lapic_clockevent.mult = 1;
--
1.6.0.rc1.34.g0fe8c
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/9] x86: apic - unify disable_local_APIC
2008-08-17 19:41 ` [PATCH 1/9] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 2/9] x86: apic - unify setup_boot_APIC_clock Cyrill Gorcunov
@ 2008-08-17 19:41 ` Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 4/9] " Cyrill Gorcunov
` (5 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-17 19:41 UTC (permalink / raw)
To: hpa, mingo, tglx, macro; +Cc: linux-kernel, Cyrill Gorcunov
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
arch/x86/kernel/apic_32.c | 4 +++-
arch/x86/kernel/apic_64.c | 14 ++++++++++++++
2 files changed, 17 insertions(+), 1 deletions(-)
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 80db3e0..13c4b79 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -796,7 +796,7 @@ void clear_local_APIC(void)
*/
void disable_local_APIC(void)
{
- unsigned long value;
+ unsigned int value;
clear_local_APIC();
@@ -808,6 +808,7 @@ void disable_local_APIC(void)
value &= ~APIC_SPIV_APIC_ENABLED;
apic_write(APIC_SPIV, value);
+#ifdef CONFIG_X86_32
/*
* When LAPIC was disabled by the BIOS and enabled by the kernel,
* restore the disabled state.
@@ -819,6 +820,7 @@ void disable_local_APIC(void)
l &= ~MSR_IA32_APICBASE_ENABLE;
wrmsr(MSR_IA32_APICBASE, l, h);
}
+#endif
}
/*
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 6aa0f60..35e0e2e 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -691,6 +691,20 @@ void disable_local_APIC(void)
value = apic_read(APIC_SPIV);
value &= ~APIC_SPIV_APIC_ENABLED;
apic_write(APIC_SPIV, value);
+
+#ifdef CONFIG_X86_32
+ /*
+ * When LAPIC was disabled by the BIOS and enabled by the kernel,
+ * restore the disabled state.
+ */
+ if (enabled_via_apicbase) {
+ unsigned int l, h;
+
+ rdmsr(MSR_IA32_APICBASE, l, h);
+ l &= ~MSR_IA32_APICBASE_ENABLE;
+ wrmsr(MSR_IA32_APICBASE, l, h);
+ }
+#endif
}
void lapic_shutdown(void)
--
1.6.0.rc1.34.g0fe8c
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 4/9] x86: apic - unify disable_local_APIC
2008-08-17 19:41 ` [PATCH 1/9] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 2/9] x86: apic - unify setup_boot_APIC_clock Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 3/9] x86: apic - unify disable_local_APIC Cyrill Gorcunov
@ 2008-08-17 19:41 ` Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 5/9] x86: apic - unify connect_bsp_APIC Cyrill Gorcunov
` (4 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-17 19:41 UTC (permalink / raw)
To: hpa, mingo, tglx, macro; +Cc: linux-kernel, Cyrill Gorcunov
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
arch/x86/kernel/apic_32.c | 9 ++++++---
arch/x86/kernel/apic_64.c | 14 +++++++++++++-
2 files changed, 19 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 13c4b79..d4efe86 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -838,10 +838,13 @@ void lapic_shutdown(void)
local_irq_save(flags);
- if (enabled_via_apicbase)
- disable_local_APIC();
- else
+#ifdef CONFIG_X86_32
+ if (!enabled_via_apicbase)
clear_local_APIC();
+ else
+#endif
+ disable_local_APIC();
+
local_irq_restore(flags);
}
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 35e0e2e..cbca413 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -707,6 +707,12 @@ void disable_local_APIC(void)
#endif
}
+/*
+ * If Linux enabled the LAPIC against the BIOS default disable it down before
+ * re-entering the BIOS on shutdown. Otherwise the BIOS may get confused and
+ * not power-off. Additionally clear all LVT entries before disable_local_APIC
+ * for the case where Linux didn't enable the LAPIC.
+ */
void lapic_shutdown(void)
{
unsigned long flags;
@@ -716,7 +722,13 @@ void lapic_shutdown(void)
local_irq_save(flags);
- disable_local_APIC();
+#ifdef CONFIG_X86_32
+ if (!enabled_via_apicbase)
+ clear_local_APIC();
+ else
+#endif
+ disable_local_APIC();
+
local_irq_restore(flags);
}
--
1.6.0.rc1.34.g0fe8c
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 5/9] x86: apic - unify connect_bsp_APIC
2008-08-17 19:41 ` [PATCH 1/9] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
` (2 preceding siblings ...)
2008-08-17 19:41 ` [PATCH 4/9] " Cyrill Gorcunov
@ 2008-08-17 19:41 ` Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 6/9] x86: apic - unify lapic_setup_esr Cyrill Gorcunov
` (3 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-17 19:41 UTC (permalink / raw)
To: hpa, mingo, tglx, macro; +Cc: linux-kernel, Cyrill Gorcunov
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
arch/x86/kernel/apic_32.c | 2 ++
arch/x86/kernel/apic_64.c | 20 ++++++++++++++++++--
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index d4efe86..6d230e9 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -1387,6 +1387,7 @@ void smp_error_interrupt(struct pt_regs *regs)
*/
void __init connect_bsp_APIC(void)
{
+#ifdef CONFIG_X86_32
if (pic_mode) {
/*
* Do not trust the local APIC being empty at bootup.
@@ -1401,6 +1402,7 @@ void __init connect_bsp_APIC(void)
outb(0x70, 0x22);
outb(0x01, 0x23);
}
+#endif
enable_apic_mode();
}
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index cbca413..600ce2f 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -1285,10 +1285,26 @@ asmlinkage void smp_error_interrupt(void)
}
/**
- * * connect_bsp_APIC - attach the APIC to the interrupt system
- * */
+ * connect_bsp_APIC - attach the APIC to the interrupt system
+ */
void __init connect_bsp_APIC(void)
{
+#ifdef CONFIG_X86_32
+ if (pic_mode) {
+ /*
+ * Do not trust the local APIC being empty at bootup.
+ */
+ clear_local_APIC();
+ /*
+ * PIC mode, enable APIC mode in the IMCR, i.e. connect BSP's
+ * local APIC to INT and NMI lines.
+ */
+ apic_printk(APIC_VERBOSE, "leaving PIC mode, "
+ "enabling APIC mode.\n");
+ outb(0x70, 0x22);
+ outb(0x01, 0x23);
+ }
+#endif
enable_apic_mode();
}
--
1.6.0.rc1.34.g0fe8c
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 6/9] x86: apic - unify lapic_setup_esr
2008-08-17 19:41 ` [PATCH 1/9] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
` (3 preceding siblings ...)
2008-08-17 19:41 ` [PATCH 5/9] x86: apic - unify connect_bsp_APIC Cyrill Gorcunov
@ 2008-08-17 19:41 ` Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 7/9] x86: apic - unify __setup_APIC_LVTT Cyrill Gorcunov
` (2 subsequent siblings)
7 siblings, 0 replies; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-17 19:41 UTC (permalink / raw)
To: hpa, mingo, tglx, macro; +Cc: linux-kernel, Cyrill Gorcunov
We use 32bit code former for 64bit
mode since it's much better implementation
and easier to merge.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
arch/x86/kernel/apic_32.c | 21 +++++++++--------
arch/x86/kernel/apic_64.c | 51 ++++++++++++++++++++++++++++++++++----------
2 files changed, 50 insertions(+), 22 deletions(-)
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 6d230e9..3c1562a 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -983,6 +983,16 @@ static void __cpuinit lapic_setup_esr(void)
{
unsigned long oldvalue, value, maxlvt;
if (lapic_is_integrated() && !esr_disable) {
+ if (esr_disable) {
+ /*
+ * Something untraceable is creating bad interrupts on
+ * secondary quads ... for the moment, just leave the
+ * ESR disabled - we can't do anything useful with the
+ * errors anyway - mbligh
+ */
+ printk(KERN_INFO "Leaving ESR disabled.\n");
+ return;
+ }
/* !82489DX */
maxlvt = lapic_get_maxlvt();
if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
@@ -1003,16 +1013,7 @@ static void __cpuinit lapic_setup_esr(void)
"vector: 0x%08lx after: 0x%08lx\n",
oldvalue, value);
} else {
- if (esr_disable)
- /*
- * Something untraceable is creating bad interrupts on
- * secondary quads ... for the moment, just leave the
- * ESR disabled - we can't do anything useful with the
- * errors anyway - mbligh
- */
- printk(KERN_INFO "Leaving ESR disabled.\n");
- else
- printk(KERN_INFO "No ESR for 82489DX.\n");
+ printk(KERN_INFO "No ESR for 82489DX.\n");
}
}
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 600ce2f..e03a76d 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -863,6 +863,45 @@ void __init init_bsp_APIC(void)
apic_write(APIC_LVT1, value);
}
+static void __cpuinit lapic_setup_esr(void)
+{
+ unsigned long oldvalue, value, maxlvt;
+ if (lapic_is_integrated() && !esr_disable) {
+ if (esr_disable) {
+ /*
+ * Something untraceable is creating bad interrupts on
+ * secondary quads ... for the moment, just leave the
+ * ESR disabled - we can't do anything useful with the
+ * errors anyway - mbligh
+ */
+ printk(KERN_INFO "Leaving ESR disabled.\n");
+ return;
+ }
+ /* !82489DX */
+ maxlvt = lapic_get_maxlvt();
+ if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
+ apic_write(APIC_ESR, 0);
+ oldvalue = apic_read(APIC_ESR);
+
+ /* enables sending errors */
+ value = ERROR_APIC_VECTOR;
+ apic_write(APIC_LVTERR, value);
+ /*
+ * spec says clear errors after enabling vector.
+ */
+ if (maxlvt > 3)
+ apic_write(APIC_ESR, 0);
+ value = apic_read(APIC_ESR);
+ if (value != oldvalue)
+ apic_printk(APIC_VERBOSE, "ESR value before enabling "
+ "vector: 0x%08lx after: 0x%08lx\n",
+ oldvalue, value);
+ } else {
+ printk(KERN_INFO "No ESR for 82489DX.\n");
+ }
+}
+
+
/**
* setup_local_APIC - setup the local APIC
*/
@@ -968,18 +1007,6 @@ void __cpuinit setup_local_APIC(void)
preempt_enable();
}
-static void __cpuinit lapic_setup_esr(void)
-{
- unsigned maxlvt = lapic_get_maxlvt();
-
- apic_write(APIC_LVTERR, ERROR_APIC_VECTOR);
- /*
- * spec says clear errors after enabling vector.
- */
- if (maxlvt > 3)
- apic_write(APIC_ESR, 0);
-}
-
void __cpuinit end_local_APIC_setup(void)
{
lapic_setup_esr();
--
1.6.0.rc1.34.g0fe8c
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 7/9] x86: apic - unify __setup_APIC_LVTT
2008-08-17 19:41 ` [PATCH 1/9] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
` (4 preceding siblings ...)
2008-08-17 19:41 ` [PATCH 6/9] x86: apic - unify lapic_setup_esr Cyrill Gorcunov
@ 2008-08-17 19:41 ` Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 8/9] x86: apic - unify disconnect_bsp_APIC Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 9/9] x86: apic - generic_processor_info Cyrill Gorcunov
7 siblings, 0 replies; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-17 19:41 UTC (permalink / raw)
To: hpa, mingo, tglx, macro; +Cc: linux-kernel, Cyrill Gorcunov
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
arch/x86/kernel/apic_32.c | 10 +++++++---
arch/x86/kernel/apic_64.c | 12 ++++++++----
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 3c1562a..65419c7 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -248,8 +248,12 @@ int lapic_get_maxlvt(void)
* Local APIC timer
*/
-/* Clock divisor is set to 16 */
+/* Clock divisor */
+#ifdef CONFG_X86_64
+#define APIC_DIVISOR 1
+#else
#define APIC_DIVISOR 16
+#endif
/*
* This function sets up the local APIC timer, with a timeout of
@@ -281,8 +285,8 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
*/
tmp_value = apic_read(APIC_TDCR);
apic_write(APIC_TDCR,
- (tmp_value & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE)) |
- APIC_TDR_DIV_16);
+ (tmp_value & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE)) |
+ APIC_TDR_DIV_16);
if (!oneshot)
apic_write(APIC_TMICT, clocks / APIC_DIVISOR);
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index e03a76d..a814612 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -259,8 +259,12 @@ int lapic_get_maxlvt(void)
* Local APIC timer
*/
-/* Clock divisor is set to 1 */
+/* Clock divisor */
+#ifdef CONFG_X86_64
#define APIC_DIVISOR 1
+#else
+#define APIC_DIVISOR 16
+#endif
/*
* This function sets up the local APIC timer, with a timeout of
@@ -291,9 +295,9 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
* Divide PICLK by 16
*/
tmp_value = apic_read(APIC_TDCR);
- apic_write(APIC_TDCR, (tmp_value
- & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE))
- | APIC_TDR_DIV_16);
+ apic_write(APIC_TDCR,
+ (tmp_value & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE)) |
+ APIC_TDR_DIV_16);
if (!oneshot)
apic_write(APIC_TMICT, clocks / APIC_DIVISOR);
--
1.6.0.rc1.34.g0fe8c
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 8/9] x86: apic - unify disconnect_bsp_APIC
2008-08-17 19:41 ` [PATCH 1/9] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
` (5 preceding siblings ...)
2008-08-17 19:41 ` [PATCH 7/9] x86: apic - unify __setup_APIC_LVTT Cyrill Gorcunov
@ 2008-08-17 19:41 ` Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 9/9] x86: apic - generic_processor_info Cyrill Gorcunov
7 siblings, 0 replies; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-17 19:41 UTC (permalink / raw)
To: hpa, mingo, tglx, macro; +Cc: linux-kernel, Cyrill Gorcunov
- just #ifdef added
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
arch/x86/kernel/apic_32.c | 66 +++++++++++++++++++++++---------------------
arch/x86/kernel/apic_64.c | 23 ++++++++++++++-
2 files changed, 55 insertions(+), 34 deletions(-)
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 65419c7..3095bb7 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -1420,6 +1420,7 @@ void __init connect_bsp_APIC(void)
*/
void disconnect_bsp_APIC(int virt_wire_setup)
{
+#ifdef CONFIG_X86_32
if (pic_mode) {
/*
* Put the board back into PIC mode (has an effect only on
@@ -1431,47 +1432,48 @@ void disconnect_bsp_APIC(int virt_wire_setup)
"entering PIC mode.\n");
outb(0x70, 0x22);
outb(0x00, 0x23);
- } else {
- /* Go back to Virtual Wire compatibility mode */
- unsigned long value;
+ return;
+ }
+#endif
- /* For the spurious interrupt use vector F, and enable it */
- value = apic_read(APIC_SPIV);
- value &= ~APIC_VECTOR_MASK;
- value |= APIC_SPIV_APIC_ENABLED;
- value |= 0xf;
- apic_write(APIC_SPIV, value);
+ /* Go back to Virtual Wire compatibility mode */
+ unsigned int value;
- if (!virt_wire_setup) {
- /*
- * For LVT0 make it edge triggered, active high,
- * external and enabled
- */
- value = apic_read(APIC_LVT0);
- value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
- APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
- APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
- value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
- value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT);
- apic_write(APIC_LVT0, value);
- } else {
- /* Disable LVT0 */
- apic_write(APIC_LVT0, APIC_LVT_MASKED);
- }
+ /* For the spurious interrupt use vector F, and enable it */
+ value = apic_read(APIC_SPIV);
+ value &= ~APIC_VECTOR_MASK;
+ value |= APIC_SPIV_APIC_ENABLED;
+ value |= 0xf;
+ apic_write(APIC_SPIV, value);
+ if (!virt_wire_setup) {
/*
- * For LVT1 make it edge triggered, active high, nmi and
- * enabled
+ * For LVT0 make it edge triggered, active high,
+ * external and enabled
*/
- value = apic_read(APIC_LVT1);
- value &= ~(
- APIC_MODE_MASK | APIC_SEND_PENDING |
+ value = apic_read(APIC_LVT0);
+ value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
- value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_NMI);
- apic_write(APIC_LVT1, value);
+ value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT);
+ apic_write(APIC_LVT0, value);
+ } else {
+ /* Disable LVT0 */
+ apic_write(APIC_LVT0, APIC_LVT_MASKED);
}
+
+ /*
+ * For LVT1 make it edge triggered, active high,
+ * nmi and enabled
+ */
+ value = apic_read(APIC_LVT1);
+ value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
+ APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
+ APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED);
+ value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING;
+ value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_NMI);
+ apic_write(APIC_LVT1, value);
}
void __cpuinit generic_processor_info(int apicid, int version)
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index a814612..30b1097 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -1348,8 +1348,24 @@ void __init connect_bsp_APIC(void)
*/
void disconnect_bsp_APIC(int virt_wire_setup)
{
+#ifdef CONFIG_X86_32
+ if (pic_mode) {
+ /*
+ * Put the board back into PIC mode (has an effect only on
+ * certain older boards). Note that APIC interrupts, including
+ * IPIs, won't work beyond this point! The only exception are
+ * INIT IPIs.
+ */
+ apic_printk(APIC_VERBOSE, "disabling APIC mode, "
+ "entering PIC mode.\n");
+ outb(0x70, 0x22);
+ outb(0x00, 0x23);
+ return;
+ }
+#endif
+
/* Go back to Virtual Wire compatibility mode */
- unsigned long value;
+ unsigned int value;
/* For the spurious interrupt use vector F, and enable it */
value = apic_read(APIC_SPIV);
@@ -1375,7 +1391,10 @@ void disconnect_bsp_APIC(int virt_wire_setup)
apic_write(APIC_LVT0, APIC_LVT_MASKED);
}
- /* For LVT1 make it edge triggered, active high, nmi and enabled */
+ /*
+ * For LVT1 make it edge triggered, active high,
+ * nmi and enabled
+ */
value = apic_read(APIC_LVT1);
value &= ~(APIC_MODE_MASK | APIC_SEND_PENDING |
APIC_INPUT_POLARITY | APIC_LVT_REMOTE_IRR |
--
1.6.0.rc1.34.g0fe8c
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 9/9] x86: apic - generic_processor_info
2008-08-17 19:41 ` [PATCH 1/9] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
` (6 preceding siblings ...)
2008-08-17 19:41 ` [PATCH 8/9] x86: apic - unify disconnect_bsp_APIC Cyrill Gorcunov
@ 2008-08-17 19:41 ` Cyrill Gorcunov
7 siblings, 0 replies; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-17 19:41 UTC (permalink / raw)
To: hpa, mingo, tglx, macro; +Cc: linux-kernel, Cyrill Gorcunov
- use physid_set instead of phys_cpu and physids_or
- set phys_cpu_present_map bit AFTER check for allowed
number of processors
- add checking for APIC valid version in 64bit mode
(mostly not needed but added for merging purpose)
- add apic_version definition for 64bit mode which
is used now
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
arch/x86/kernel/apic_32.c | 15 ++++++++-------
arch/x86/kernel/apic_64.c | 41 +++++++++++++++++++++++++++++++++++++++--
2 files changed, 47 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 3095bb7..c3a252b 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -1480,7 +1480,6 @@ void __cpuinit generic_processor_info(int apicid, int version)
{
int cpu;
cpumask_t tmp_map;
- physid_mask_t phys_cpu;
/*
* Validate version
@@ -1493,9 +1492,6 @@ void __cpuinit generic_processor_info(int apicid, int version)
}
apic_version[apicid] = version;
- phys_cpu = apicid_to_cpu_present(apicid);
- physids_or(phys_cpu_present_map, phys_cpu_present_map, phys_cpu);
-
if (num_processors >= NR_CPUS) {
printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
" Processor ignored.\n", NR_CPUS);
@@ -1512,17 +1508,19 @@ void __cpuinit generic_processor_info(int apicid, int version)
cpus_complement(tmp_map, cpu_present_map);
cpu = first_cpu(tmp_map);
- if (apicid == boot_cpu_physical_apicid)
+ physid_set(apicid, phys_cpu_present_map);
+ if (apicid == boot_cpu_physical_apicid) {
/*
* x86_bios_cpu_apicid is required to have processors listed
* in same order as logical cpu numbers. Hence the first
* entry is BSP, and so on.
*/
cpu = 0;
-
+ }
if (apicid > max_physical_apicid)
max_physical_apicid = apicid;
+#ifdef CONFIG_X86_32
/*
* Would be preferable to switch to bigsmp when CONFIG_HOTPLUG_CPU=y
* but we need to work other dependencies like SMP_SUSPEND etc
@@ -1542,7 +1540,9 @@ void __cpuinit generic_processor_info(int apicid, int version)
def_to_bigsmp = 1;
}
}
-#ifdef CONFIG_SMP
+#endif
+
+#if defined(CONFIG_X86_SMP) || defined(CONFIG_X86_64)
/* are we being called early in kernel startup? */
if (early_per_cpu_ptr(x86_cpu_to_apicid)) {
u16 *cpu_to_apicid = early_per_cpu_ptr(x86_cpu_to_apicid);
@@ -1555,6 +1555,7 @@ void __cpuinit generic_processor_info(int apicid, int version)
per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
}
#endif
+
cpu_set(cpu, cpu_possible_map);
cpu_set(cpu, cpu_present_map);
}
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 30b1097..92026d9 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -1215,6 +1215,8 @@ void __init init_apic_mappings(void)
* This initializes the IO-APIC and APIC hardware if this is
* a UP kernel.
*/
+int apic_version[MAX_APICS];
+
int __init APIC_init_uniprocessor(void)
{
if (disable_apic) {
@@ -1409,15 +1411,26 @@ void __cpuinit generic_processor_info(int apicid, int version)
int cpu;
cpumask_t tmp_map;
+ /*
+ * Validate version
+ */
+ if (version == 0x0) {
+ printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! "
+ "fixing up to 0x10. (tell your hw vendor)\n",
+ version);
+ version = 0x10;
+ }
+ apic_version[apicid] = version;
+
if (num_processors >= NR_CPUS) {
printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached."
- " Processor ignored.\n", NR_CPUS);
+ " Processor ignored.\n", NR_CPUS);
return;
}
if (num_processors >= maxcpus) {
printk(KERN_WARNING "WARNING: maxcpus limit of %i reached."
- " Processor ignored.\n", maxcpus);
+ " Processor ignored.\n", maxcpus);
return;
}
@@ -1437,6 +1450,29 @@ void __cpuinit generic_processor_info(int apicid, int version)
if (apicid > max_physical_apicid)
max_physical_apicid = apicid;
+#ifdef CONFIG_X86_32
+ /*
+ * Would be preferable to switch to bigsmp when CONFIG_HOTPLUG_CPU=y
+ * but we need to work other dependencies like SMP_SUSPEND etc
+ * before this can be done without some confusion.
+ * if (CPU_HOTPLUG_ENABLED || num_processors > 8)
+ * - Ashok Raj <ashok.raj@intel.com>
+ */
+ if (max_physical_apicid >= 8) {
+ switch (boot_cpu_data.x86_vendor) {
+ case X86_VENDOR_INTEL:
+ if (!APIC_XAPIC(version)) {
+ def_to_bigsmp = 0;
+ break;
+ }
+ /* If P4 and above fall through */
+ case X86_VENDOR_AMD:
+ def_to_bigsmp = 1;
+ }
+ }
+#endif
+
+#if defined(CONFIG_X86_SMP) || defined(CONFIG_X86_64)
/* are we being called early in kernel startup? */
if (early_per_cpu_ptr(x86_cpu_to_apicid)) {
u16 *cpu_to_apicid = early_per_cpu_ptr(x86_cpu_to_apicid);
@@ -1448,6 +1484,7 @@ void __cpuinit generic_processor_info(int apicid, int version)
per_cpu(x86_cpu_to_apicid, cpu) = apicid;
per_cpu(x86_bios_cpu_apicid, cpu) = apicid;
}
+#endif
cpu_set(cpu, cpu_possible_map);
cpu_set(cpu, cpu_present_map);
--
1.6.0.rc1.34.g0fe8c
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 0/9] -tip/apic merging one more series
2008-08-17 19:41 [PATCH 0/9] -tip/apic merging one more series Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 1/9] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
@ 2008-08-17 21:53 ` Yinghai Lu
2008-08-18 4:22 ` Cyrill Gorcunov
1 sibling, 1 reply; 15+ messages in thread
From: Yinghai Lu @ 2008-08-17 21:53 UTC (permalink / raw)
To: Cyrill Gorcunov; +Cc: hpa, mingo, tglx, macro, linux-kernel
please check if you need { } otherwise you broke 64 bit
static int lapic_resume(struct sys_device *dev)
{
unsigned int l, h;
unsigned long flags;
int maxlvt;
if (!apic_pm_state.active)
return 0;
maxlvt = lapic_get_maxlvt();
local_irq_save(flags);
#ifdef CONFIG_X86_64
if (x2apic)
enable_x2apic();
else
#endif
/*
* Make sure the APICBASE points to the right address
*
* FIXME! This will be wrong if we ever support suspend on
* SMP! We'll need to do this as part of the CPU restore!
*/
rdmsr(MSR_IA32_APICBASE, l, h);
l &= ~MSR_IA32_APICBASE_BASE;
l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr;
wrmsr(MSR_IA32_APICBASE, l, h);
YH
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/9] -tip/apic merging one more series
2008-08-17 21:53 ` [PATCH 0/9] -tip/apic merging one more series Yinghai Lu
@ 2008-08-18 4:22 ` Cyrill Gorcunov
2008-08-18 7:18 ` Ingo Molnar
0 siblings, 1 reply; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-18 4:22 UTC (permalink / raw)
To: Yinghai Lu; +Cc: hpa, mingo, tglx, macro, linux-kernel
On Mon, Aug 18, 2008 at 1:53 AM, Yinghai Lu <yhlu.kernel@gmail.com> wrote:
> please check if you need { } otherwise you broke 64 bit
>
>
> static int lapic_resume(struct sys_device *dev)
> {
> unsigned int l, h;
> unsigned long flags;
> int maxlvt;
>
> if (!apic_pm_state.active)
> return 0;
>
> maxlvt = lapic_get_maxlvt();
>
> local_irq_save(flags);
>
> #ifdef CONFIG_X86_64
> if (x2apic)
> enable_x2apic();
> else
> #endif
> /*
> * Make sure the APICBASE points to the right address
> *
> * FIXME! This will be wrong if we ever support suspend on
> * SMP! We'll need to do this as part of the CPU restore!
> */
> rdmsr(MSR_IA32_APICBASE, l, h);
> l &= ~MSR_IA32_APICBASE_BASE;
> l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr;
> wrmsr(MSR_IA32_APICBASE, l, h);
>
>
> YH
>
Oh...indeed. Thanks Yinghai! - will fix it today evening.
Ingo drop this patch please (if it was applied).
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/9] -tip/apic merging one more series
2008-08-18 4:22 ` Cyrill Gorcunov
@ 2008-08-18 7:18 ` Ingo Molnar
2008-08-18 7:24 ` Ingo Molnar
0 siblings, 1 reply; 15+ messages in thread
From: Ingo Molnar @ 2008-08-18 7:18 UTC (permalink / raw)
To: Cyrill Gorcunov; +Cc: Yinghai Lu, hpa, tglx, macro, linux-kernel
* Cyrill Gorcunov <gorcunov@gmail.com> wrote:
> On Mon, Aug 18, 2008 at 1:53 AM, Yinghai Lu <yhlu.kernel@gmail.com> wrote:
> > please check if you need { } otherwise you broke 64 bit
> >
> >
> > static int lapic_resume(struct sys_device *dev)
> > {
> > unsigned int l, h;
> > unsigned long flags;
> > int maxlvt;
> >
> > if (!apic_pm_state.active)
> > return 0;
> >
> > maxlvt = lapic_get_maxlvt();
> >
> > local_irq_save(flags);
> >
> > #ifdef CONFIG_X86_64
> > if (x2apic)
> > enable_x2apic();
> > else
> > #endif
> > /*
> > * Make sure the APICBASE points to the right address
> > *
> > * FIXME! This will be wrong if we ever support suspend on
> > * SMP! We'll need to do this as part of the CPU restore!
> > */
> > rdmsr(MSR_IA32_APICBASE, l, h);
> > l &= ~MSR_IA32_APICBASE_BASE;
> > l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr;
> > wrmsr(MSR_IA32_APICBASE, l, h);
> >
> >
> > YH
> >
>
> Oh...indeed. Thanks Yinghai! - will fix it today evening.
> Ingo drop this patch please (if it was applied).
hm, none of these patches has lapic_resume mentioned and current
tip/master's version doesnt seem broken so there's nothing to drop.
plus 1/9 doesnt apply to tip/master. (nor tip/x86/apic, nor -git)
I'll wait for this to be sorted out.
Ingo
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/9] -tip/apic merging one more series
2008-08-18 7:18 ` Ingo Molnar
@ 2008-08-18 7:24 ` Ingo Molnar
2008-08-18 7:41 ` Cyrill Gorcunov
0 siblings, 1 reply; 15+ messages in thread
From: Ingo Molnar @ 2008-08-18 7:24 UTC (permalink / raw)
To: Cyrill Gorcunov; +Cc: Yinghai Lu, hpa, tglx, macro, linux-kernel
* Ingo Molnar <mingo@elte.hu> wrote:
> > Oh...indeed. Thanks Yinghai! - will fix it today evening.
> > Ingo drop this patch please (if it was applied).
>
> hm, none of these patches has lapic_resume mentioned and current
> tip/master's version doesnt seem broken so there's nothing to drop.
ah, i see Yinghai's fix. I'll apply that to tip/x86/apic.
Ingo
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/9] -tip/apic merging one more series
2008-08-18 7:24 ` Ingo Molnar
@ 2008-08-18 7:41 ` Cyrill Gorcunov
0 siblings, 0 replies; 15+ messages in thread
From: Cyrill Gorcunov @ 2008-08-18 7:41 UTC (permalink / raw)
To: Ingo Molnar; +Cc: Yinghai Lu, hpa, tglx, macro, linux-kernel
On Mon, Aug 18, 2008 at 11:24 AM, Ingo Molnar <mingo@elte.hu> wrote:
>
> * Ingo Molnar <mingo@elte.hu> wrote:
>
>> > Oh...indeed. Thanks Yinghai! - will fix it today evening.
>> > Ingo drop this patch please (if it was applied).
>>
>> hm, none of these patches has lapic_resume mentioned and current
>> tip/master's version doesnt seem broken so there's nothing to drop.
>
> ah, i see Yinghai's fix. I'll apply that to tip/x86/apic.
>
> Ingo
>
Thanks Ingo, I'll fetch tip/apic after my workaday complete then
check what is applied what is not and rearrange pathes if needed
and then resend. Ugh... :-)
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2008-08-18 7:41 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2008-08-17 19:41 [PATCH 0/9] -tip/apic merging one more series Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 1/9] x86: apic - rearrange maxcpu definition Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 2/9] x86: apic - unify setup_boot_APIC_clock Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 3/9] x86: apic - unify disable_local_APIC Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 4/9] " Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 5/9] x86: apic - unify connect_bsp_APIC Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 6/9] x86: apic - unify lapic_setup_esr Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 7/9] x86: apic - unify __setup_APIC_LVTT Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 8/9] x86: apic - unify disconnect_bsp_APIC Cyrill Gorcunov
2008-08-17 19:41 ` [PATCH 9/9] x86: apic - generic_processor_info Cyrill Gorcunov
2008-08-17 21:53 ` [PATCH 0/9] -tip/apic merging one more series Yinghai Lu
2008-08-18 4:22 ` Cyrill Gorcunov
2008-08-18 7:18 ` Ingo Molnar
2008-08-18 7:24 ` Ingo Molnar
2008-08-18 7:41 ` Cyrill Gorcunov
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