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From: Thomas Gleixner <tglx@linutronix.de>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Luwei Kang <luwei.kang@intel.com>,
	kvm@vger.kernel.org, x86@kernel.org, mingo@redhat.com,
	bp@alien8.de, hpa@zytor.com, rkrcmar@redhat.com, joro@8bytes.org,
	songliubraving@fb.com, peterz@infradead.org,
	kstewart@linuxfoundation.org, gregkh@linuxfoundation.org,
	thomas.lendacky@amd.com, konrad.wilk@oracle.com,
	mattst88@gmail.com, Janakarajan.Natarajan@amd.com,
	dwmw@amazon.co.uk, jpoimboe@redhat.com, marcorr@google.com,
	ubizjak@gmail.com, sean.j.christopherson@intel.com,
	jmattson@google.com, linux-kernel@vger.kernel.org,
	Chao Peng <chao.p.peng@linux.intel.com>
Subject: Re: [PATCH v13 08/12] KVM: x86: Add Intel PT context switch for each vcpu
Date: Tue, 30 Oct 2018 11:00:31 +0100 (CET)	[thread overview]
Message-ID: <alpine.DEB.2.21.1810301058060.5984@nanos.tec.linutronix.de> (raw)
In-Reply-To: <bc192976-2c56-3cfc-a697-cf941a92ad0a@redhat.com>

On Mon, 29 Oct 2018, Paolo Bonzini wrote:
> On 24/10/2018 12:13, Alexander Shishkin wrote:
> > Luwei Kang <luwei.kang@intel.com> writes:
> >> +	/*
> >> +	 * Set guest state of MSR_IA32_RTIT_CTL MSR (PT will be disabled
> >> +	 * on VM entry when it has been disabled in guest before).
> >> +	 */
> >> +	vmcs_write64(GUEST_IA32_RTIT_CTL, vmx->pt_desc.guest.ctl);
> >> +
> >> +	if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) {
> >> +		wrmsrl(MSR_IA32_RTIT_CTL, 0);
> >> +		pt_save_msr(&vmx->pt_desc.host, vmx->pt_desc.addr_range);
> >> +		pt_load_msr(&vmx->pt_desc.guest, vmx->pt_desc.addr_range);
> >> +	}
> >> +}
> > 
> > From my side this is still a NAK, because [1].
> > 
> > [1] https://marc.info/?l=kvm&m=153847567226248&w=2
> 
> Then you should have replied to
> https://marc.info/?l=kvm&m=153865386015249&w=2 instead of having Luwei
> do the work for nothing.
> 
> Quoting from there:
> 
> >> One shouldn't have to enable or disable anything in KVM to stop it from
> >> breaking one's existing workflow. That makes no sense.
> > 
> > If you "have to enable or disable anything" it means you have to
> > override the default.  But the default in this patches is "no change
> > compared to before the patches", leaving tracing of both host and guest
> > entirely to the host, so I don't understand your remark.  What workflow
> > is broken?
> > 
> >> There already are controls in perf that enable/disable guest tracing.
> > 
> > You are confusing "tracing guest from the host" and "the guest can trace
> > itself".  This patchset is adding support for the latter, and that
> > affects directly whether the tracing CPUID leaf can be added to the
> > guest.  Therefore it's not perf that can decide whether to turn it on;
> > KVM must know it when /dev/kvm is opened, which is why it is a module
> > parameter.
> 
> I'd be happier if we found an agreement, but without discussion that
> just won't happen.

So at least we need a way for perf on the host to programmatically detect,
that 'guest traces itself' is enabled, so it can inject that information
into the host data and post processing can tell that. W/o something like
that it's going to be a FAQ.

Thanks,

	tglx



  reply	other threads:[~2018-10-30 10:01 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-24  8:05 [PATCH v13 00/12] Intel Processor Trace virtualization enabling Luwei Kang
2018-10-24  8:05 ` [PATCH v13 01/12] perf/x86/intel/pt: Move Intel PT MSRs bit defines to global header Luwei Kang
2018-10-24  8:05 ` [PATCH v13 02/12] perf/x86/intel/pt: Export pt_cap_get() Luwei Kang
2018-10-24  8:05 ` [PATCH v13 03/12] perf/x86/intel/pt: Introduce intel_pt_validate_cap() Luwei Kang
2018-10-24  8:05 ` [PATCH v13 04/12] perf/x86/intel/pt: Add new bit definitions for PT MSRs Luwei Kang
2018-10-24  8:05 ` [PATCH v13 05/12] perf/x86/intel/pt: add new capability for Intel PT Luwei Kang
2018-10-30  9:57   ` Thomas Gleixner
2018-10-24  8:05 ` [PATCH v13 06/12] KVM: x86: Add Intel PT virtualization work mode Luwei Kang
2018-10-24 16:18   ` Jim Mattson
2018-10-25  0:35     ` Kang, Luwei
2018-10-30  9:30       ` Thomas Gleixner
2018-10-30  9:49         ` Paolo Bonzini
2018-10-30 10:13           ` Kang, Luwei
2018-10-30 10:23             ` Thomas Gleixner
2018-10-31  0:36               ` Kang, Luwei
2018-10-24  8:05 ` [PATCH v13 07/12] KVM: x86: Add Intel Processor Trace cpuid emulation Luwei Kang
2018-10-24  8:05 ` [PATCH v13 08/12] KVM: x86: Add Intel PT context switch for each vcpu Luwei Kang
2018-10-24 10:13   ` Alexander Shishkin
2018-10-25  0:06     ` Kang, Luwei
2018-10-29 17:48     ` Paolo Bonzini
2018-10-30 10:00       ` Thomas Gleixner [this message]
2018-10-31 10:43         ` Paolo Bonzini
2018-10-31 11:46           ` Alexander Shishkin
2018-10-30 11:26       ` Alexander Shishkin
2018-10-31 10:49         ` Paolo Bonzini
2018-10-31 11:38           ` Alexander Shishkin
2018-10-31 12:07             ` Paolo Bonzini
2018-10-31 14:21               ` Alexander Shishkin
2018-10-31 14:43                 ` Paolo Bonzini
2018-10-24  8:05 ` [PATCH v13 09/12] KVM: x86: Introduce a function to initialize the PT configuration Luwei Kang
2018-10-24  8:05 ` [PATCH v13 10/12] KVM: x86: Implement Intel PT MSRs read/write emulation Luwei Kang
2018-10-24  8:05 ` [PATCH v13 11/12] KVM: x86: Set intercept for Intel PT MSRs read/write Luwei Kang
2018-10-24  8:05 ` [PATCH v13 12/12] KVM: x86: Disable Intel PT when VMXON in L1 guest Luwei Kang

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