Re: [PATCH 07/10] x86/resctrl: Add arch_needs_linear to explain AMD/Intel MBA difference

[Reinette Chatre <reinette.chatre@intel.com>]

Hi James,

On 2/14/2020 10:23 AM, James Morse wrote:
> The configuration values user-space provides to the resctrl filesystem
> are ABI. To make this work on another architecture we want to move all
> the ABI bits out of /arch/x86 and under /fs.
> 
> To do this, the differences between AMD and Intel CPUs needs to be
> explained to resctrl via resource properties, instead of function
> pointers that let the arch code accept subtly different values on
> different platforms/architectures.
> 
> For MBA, Intel CPUs reject configuration attempts for non-linear
> resources, whereas AMD ignore this field as its MBA resource is never
> linear. To merge the parse/validate functions we need to explain
> this difference.
> 
> Add arch_needs_linear to indicate the arch code needs the linear
> property to be true to configure this resource. AMD can set this
> and delay_linear to false. Intel can set arch_needs_linear
> to true to keep the existing "No support for non-linear MB domains"
> error message for affected platforms.
> 
> Signed-off-by: James Morse <james.morse@arm.com>
> ---
>  arch/x86/kernel/cpu/resctrl/core.c        | 3 +++
>  arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 8 +++++++-
>  arch/x86/kernel/cpu/resctrl/internal.h    | 2 ++
>  3 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
> index 7d295ae620bb..f022dc823c53 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -260,6 +260,7 @@ static bool __get_mem_config_intel(struct rdt_resource *r)
>  	r->num_closid = edx.split.cos_max + 1;
>  	max_delay = eax.split.max_delay + 1;
>  	r->default_ctrl = MAX_MBA_BW;
> +	r->membw.arch_needs_linear = true;
>  	if (ecx & MBA_IS_LINEAR) {
>  		r->membw.delay_linear = true;
>  		r->membw.min_bw = MAX_MBA_BW - max_delay;
> @@ -267,6 +268,7 @@ static bool __get_mem_config_intel(struct rdt_resource *r)
>  	} else {
>  		if (!rdt_get_mb_table(r))
>  			return false;
> +		r->membw.arch_needs_linear = false;
>  	}
>  	r->data_width = 3;
>  
> @@ -288,6 +290,7 @@ static bool __rdt_get_mem_config_amd(struct rdt_resource *r)
>  
>  	/* AMD does not use delay */
>  	r->membw.delay_linear = false;
> +	r->membw.arch_needs_linear = false;
>  
>  	r->membw.min_bw = 0;
>  	r->membw.bw_gran = 1;
> diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> index 055c8613b531..db8e6c0cadb1 100644
> --- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> +++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
> @@ -33,6 +33,12 @@ static bool bw_validate_amd(char *buf, unsigned long *data,
>  	unsigned long bw;
>  	int ret;
>  
> +	/* temporary: always false on AMD */
> +	if (!r->membw.delay_linear && r->membw.arch_needs_linear) {
> +		rdt_last_cmd_puts("No support for non-linear MB domains\n");
> +		return false;
> +	}
> +
>  	ret = kstrtoul(buf, 10, &bw);
>  	if (ret) {
>  		rdt_last_cmd_printf("Non-decimal digit in MB value %s\n", buf);
> @@ -82,7 +88,7 @@ static bool bw_validate(char *buf, unsigned long *data, struct rdt_resource *r)
>  	/*
>  	 * Only linear delay values is supported for current Intel SKUs.
>  	 */
> -	if (!r->membw.delay_linear) {
> +	if (!r->membw.delay_linear && r->membw.arch_needs_linear) {
>  		rdt_last_cmd_puts("No support for non-linear MB domains\n");
>  		return false;
>  	}
> diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h
> index 3e3ba85843c4..1fa692c54e15 100644
> --- a/arch/x86/kernel/cpu/resctrl/internal.h
> +++ b/arch/x86/kernel/cpu/resctrl/internal.h
> @@ -363,6 +363,7 @@ struct rdt_cache {
>   * struct rdt_membw - Memory bandwidth allocation related data
>   * @min_bw:		Minimum memory bandwidth percentage user can request
>   * @bw_gran:		Granularity at which the memory bandwidth is allocated
> + * @arch_needs_linear:  True if we can't configure non-linear resources
>   * @delay_linear:	True if memory B/W delay is in linear scale
>   * @mba_sc:		True if MBA software controller(mba_sc) is enabled
>   * @mb_map:		Mapping of memory B/W percentage to memory B/W delay

This area uses tab for spacing.

> @@ -371,6 +372,7 @@ struct rdt_membw {
>  	u32		min_bw;
>  	u32		bw_gran;
>  	u32		delay_linear;
> +	bool		arch_needs_linear;
>  	bool		mba_sc;
>  	u32		*mb_map;
>  };
> 

Babu may want to take a look.

Just the one small comment from my side, apart from that it looks good
to me.

Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>

Thank you

Reinette