* [PATCH 1/1] perf: hisi: Make irq shared
@ 2022-05-16 13:05 Chen Jun
2022-05-16 14:30 ` Robin Murphy
0 siblings, 1 reply; 2+ messages in thread
From: Chen Jun @ 2022-05-16 13:05 UTC (permalink / raw)
To: linux-kernel, linux-arm-kernel, zhangshaokun, will, mark.rutland
Cc: xuqiang36
On some platforms, there are some error:
genirq: Flags mismatch irq 23. 00010804 (xxx) vs. 00010804 (xxx)
The reason is that there are more than one pmu nodes using the same
irq number.
Add IROF_SHARED when devm_request_irq.
Signed-off-by: Chen Jun <chenjun102@huawei.com>
---
drivers/perf/hisilicon/hisi_uncore_pmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisilicon/hisi_uncore_pmu.c
index 358e4e284a62..bcbd3b467f34 100644
--- a/drivers/perf/hisilicon/hisi_uncore_pmu.c
+++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c
@@ -168,7 +168,7 @@ int hisi_uncore_pmu_init_irq(struct hisi_pmu *hisi_pmu,
return irq;
ret = devm_request_irq(&pdev->dev, irq, hisi_uncore_pmu_isr,
- IRQF_NOBALANCING | IRQF_NO_THREAD,
+ IRQF_NOBALANCING | IRQF_NO_THREAD | IRQF_SHARED,
dev_name(&pdev->dev), hisi_pmu);
if (ret < 0) {
dev_err(&pdev->dev,
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 1/1] perf: hisi: Make irq shared
2022-05-16 13:05 [PATCH 1/1] perf: hisi: Make irq shared Chen Jun
@ 2022-05-16 14:30 ` Robin Murphy
0 siblings, 0 replies; 2+ messages in thread
From: Robin Murphy @ 2022-05-16 14:30 UTC (permalink / raw)
To: Chen Jun, linux-kernel, linux-arm-kernel, zhangshaokun, will,
mark.rutland
Cc: xuqiang36
On 2022-05-16 14:05, Chen Jun wrote:
> On some platforms, there are some error:
> genirq: Flags mismatch irq 23. 00010804 (xxx) vs. 00010804 (xxx)
>
> The reason is that there are more than one pmu nodes using the same
> irq number.
>
> Add IROF_SHARED when devm_request_irq.
You really need more than this to share an interrupt between multiple
PMUs correctly. Perf relies on IRQs being handled on event->cpu to
provide mutual exclusion - if another PMU comes along and moves the
interrupt affinity to a different CPU, the interrupt handler may update
the event state from that CPU simultaneously with a regular API call on
event->cpu also updating it, with potential corruption as a result.
For general solutions, one option is to add a layer of explicit
interrupt management like arm_dmc620_pmu (FWIW the original idea there
was to factor that out into common helpers anyway). It's possible that
IRQ affinity notifiers might work as an alternative approach too, but I
never got round to looking into that in detail.
Thanks,
Robin.
> Signed-off-by: Chen Jun <chenjun102@huawei.com>
> ---
> drivers/perf/hisilicon/hisi_uncore_pmu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisilicon/hisi_uncore_pmu.c
> index 358e4e284a62..bcbd3b467f34 100644
> --- a/drivers/perf/hisilicon/hisi_uncore_pmu.c
> +++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c
> @@ -168,7 +168,7 @@ int hisi_uncore_pmu_init_irq(struct hisi_pmu *hisi_pmu,
> return irq;
>
> ret = devm_request_irq(&pdev->dev, irq, hisi_uncore_pmu_isr,
> - IRQF_NOBALANCING | IRQF_NO_THREAD,
> + IRQF_NOBALANCING | IRQF_NO_THREAD | IRQF_SHARED,
> dev_name(&pdev->dev), hisi_pmu);
> if (ret < 0) {
> dev_err(&pdev->dev,
^ permalink raw reply [flat|nested] 2+ messages in thread
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