* [PATCH] ARM: dts: socfpga: align SPI NOR node name with dtschema
@ 2022-04-07 14:30 Krzysztof Kozlowski
2022-04-07 19:08 ` Dinh Nguyen
0 siblings, 1 reply; 2+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-07 14:30 UTC (permalink / raw)
To: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, devicetree, linux-kernel
Cc: Krzysztof Kozlowski
The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts | 2 +-
arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 2 +-
arch/arm/boot/dts/socfpga_cyclone5_sodia.dts | 2 +-
arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts | 4 ++--
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
index 2a745522404d..11ccdc6c2dc6 100644
--- a/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
@@ -9,7 +9,7 @@
&qspi {
status = "okay";
- flash0: n25q00@0 {
+ flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
index 253ef139181d..b2241205c7a9 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
@@ -121,7 +121,7 @@ &mmc0 {
&qspi {
status = "okay";
- flash0: n25q00@0 {
+ flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
index b0003f350e65..2564671fc1c6 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
@@ -113,7 +113,7 @@ &usb1 {
&qspi {
status = "okay";
- flash0: n25q512a@0 {
+ flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q512a", "jedec,spi-nor";
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
index 25874e1b9c82..f24f17c2f5ee 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
@@ -221,7 +221,7 @@ at24@50 {
&qspi {
status = "okay";
- n25q128@0 {
+ flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q128", "jedec,spi-nor";
@@ -238,7 +238,7 @@ n25q128@0 {
cdns,tslch-ns = <4>;
};
- n25q00@1 {
+ flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,mt25qu02g", "jedec,spi-nor";
--
2.32.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] ARM: dts: socfpga: align SPI NOR node name with dtschema
2022-04-07 14:30 [PATCH] ARM: dts: socfpga: align SPI NOR node name with dtschema Krzysztof Kozlowski
@ 2022-04-07 19:08 ` Dinh Nguyen
0 siblings, 0 replies; 2+ messages in thread
From: Dinh Nguyen @ 2022-04-07 19:08 UTC (permalink / raw)
To: Krzysztof Kozlowski, Rob Herring, Krzysztof Kozlowski,
devicetree, linux-kernel
On 4/7/22 09:30, Krzysztof Kozlowski wrote:
> The node names should be generic and SPI NOR dtschema expects "flash".
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts | 2 +-
> arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 2 +-
> arch/arm/boot/dts/socfpga_cyclone5_sodia.dts | 2 +-
> arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts | 4 ++--
> 4 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
> index 2a745522404d..11ccdc6c2dc6 100644
> --- a/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
> +++ b/arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
> @@ -9,7 +9,7 @@
> &qspi {
> status = "okay";
>
> - flash0: n25q00@0 {
> + flash0: flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "micron,mt25qu02g", "jedec,spi-nor";
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> index 253ef139181d..b2241205c7a9 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> +++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
> @@ -121,7 +121,7 @@ &mmc0 {
> &qspi {
> status = "okay";
>
> - flash0: n25q00@0 {
> + flash0: flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "micron,mt25qu02g", "jedec,spi-nor";
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
> index b0003f350e65..2564671fc1c6 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
> +++ b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
> @@ -113,7 +113,7 @@ &usb1 {
> &qspi {
> status = "okay";
>
> - flash0: n25q512a@0 {
> + flash0: flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "micron,n25q512a", "jedec,spi-nor";
> diff --git a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
> index 25874e1b9c82..f24f17c2f5ee 100644
> --- a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
> +++ b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
> @@ -221,7 +221,7 @@ at24@50 {
> &qspi {
> status = "okay";
>
> - n25q128@0 {
> + flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "micron,n25q128", "jedec,spi-nor";
> @@ -238,7 +238,7 @@ n25q128@0 {
> cdns,tslch-ns = <4>;
> };
>
> - n25q00@1 {
> + flash@1 {
> #address-cells = <1>;
> #size-cells = <1>;
> compatible = "micron,mt25qu02g", "jedec,spi-nor";
Applied!
Thanks,
Dinh
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2022-04-07 14:30 [PATCH] ARM: dts: socfpga: align SPI NOR node name with dtschema Krzysztof Kozlowski
2022-04-07 19:08 ` Dinh Nguyen
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