* [PATCH v2 1/3] dt-bindings: soc: qcom: aoss: Add SC8180X and generic compatible
2021-07-09 17:41 [PATCH v2 0/3] dt-bindings: soc: qcom: aoss: Support sc8180x and convert to YAML Bjorn Andersson
@ 2021-07-09 17:41 ` Bjorn Andersson
2021-07-15 16:13 ` Rob Herring
2021-07-15 16:13 ` Rob Herring
2021-07-09 17:41 ` [PATCH v2 2/3] dt-bindings: soc: qcom: aoss: Convert to YAML Bjorn Andersson
2021-07-09 17:41 ` [PATCH v2 3/3] soc: qcom: aoss: Add generic compatible Bjorn Andersson
2 siblings, 2 replies; 7+ messages in thread
From: Bjorn Andersson @ 2021-07-09 17:41 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Sibi S
Cc: Rob Herring, linux-arm-msm, devicetree, linux-kernel
Add a generic compatible for all versions of the AOSS QMP to the
binding, in order to allow a single implementation for them and then add
a specific compatible for the Qualcomm SC8180x platform.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v1:
- Mention the generic compatible in $subject and message.
Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
index 783dc81b0f26..3747032311a4 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
@@ -18,10 +18,13 @@ power-domains.
Definition: must be one of:
"qcom,sc7180-aoss-qmp"
"qcom,sc7280-aoss-qmp"
+ "qcom,sc8180x-aoss-qmp"
"qcom,sdm845-aoss-qmp"
"qcom,sm8150-aoss-qmp"
"qcom,sm8250-aoss-qmp"
"qcom,sm8350-aoss-qmp"
+ and:
+ "qcom,aoss-qmp"
- reg:
Usage: required
@@ -70,7 +73,7 @@ The following example represents the AOSS side-channel message RAM and the
mechanism exposing the power-domains, as found in SDM845.
aoss_qmp: qmp@c300000 {
- compatible = "qcom,sdm845-aoss-qmp";
+ compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
reg = <0x0c300000 0x100000>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
mboxes = <&apss_shared 0>;
--
2.29.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 2/3] dt-bindings: soc: qcom: aoss: Convert to YAML
2021-07-09 17:41 [PATCH v2 0/3] dt-bindings: soc: qcom: aoss: Support sc8180x and convert to YAML Bjorn Andersson
2021-07-09 17:41 ` [PATCH v2 1/3] dt-bindings: soc: qcom: aoss: Add SC8180X and generic compatible Bjorn Andersson
@ 2021-07-09 17:41 ` Bjorn Andersson
2021-07-09 17:41 ` [PATCH v2 3/3] soc: qcom: aoss: Add generic compatible Bjorn Andersson
2 siblings, 0 replies; 7+ messages in thread
From: Bjorn Andersson @ 2021-07-09 17:41 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Sibi S
Cc: Rob Herring, linux-arm-msm, devicetree, linux-kernel, Rob Herring
Convert to YAML in order to allow validation.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v1:
- Dropped qoutes around compatible strings
- Fixed indentation of the compatible enum members
- Picked up Rob's R-b
.../bindings/soc/qcom/qcom,aoss-qmp.txt | 90 --------------
.../bindings/soc/qcom/qcom,aoss-qmp.yaml | 114 ++++++++++++++++++
2 files changed, 114 insertions(+), 90 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
deleted file mode 100644
index 3747032311a4..000000000000
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
+++ /dev/null
@@ -1,90 +0,0 @@
-Qualcomm Always-On Subsystem side channel binding
-
-This binding describes the hardware component responsible for side channel
-requests to the always-on subsystem (AOSS), used for certain power management
-requests that is not handled by the standard RPMh interface. Each client in the
-SoC has it's own block of message RAM and IRQ for communication with the AOSS.
-The protocol used to communicate in the message RAM is known as Qualcomm
-Messaging Protocol (QMP)
-
-The AOSS side channel exposes control over a set of resources, used to control
-a set of debug related clocks and to affect the low power state of resources
-related to the secondary subsystems. These resources are exposed as a set of
-power-domains.
-
-- compatible:
- Usage: required
- Value type: <string>
- Definition: must be one of:
- "qcom,sc7180-aoss-qmp"
- "qcom,sc7280-aoss-qmp"
- "qcom,sc8180x-aoss-qmp"
- "qcom,sdm845-aoss-qmp"
- "qcom,sm8150-aoss-qmp"
- "qcom,sm8250-aoss-qmp"
- "qcom,sm8350-aoss-qmp"
- and:
- "qcom,aoss-qmp"
-
-- reg:
- Usage: required
- Value type: <prop-encoded-array>
- Definition: the base address and size of the message RAM for this
- client's communication with the AOSS
-
-- interrupts:
- Usage: required
- Value type: <prop-encoded-array>
- Definition: should specify the AOSS message IRQ for this client
-
-- mboxes:
- Usage: required
- Value type: <prop-encoded-array>
- Definition: reference to the mailbox representing the outgoing doorbell
- in APCS for this client, as described in mailbox/mailbox.txt
-
-- #clock-cells:
- Usage: optional
- Value type: <u32>
- Definition: must be 0
- The single clock represents the QDSS clock.
-
-- #power-domain-cells:
- Usage: optional
- Value type: <u32>
- Definition: must be 1
- The provided power-domains are:
- CDSP state (0), LPASS state (1), modem state (2), SLPI
- state (3), SPSS state (4) and Venus state (5).
-
-= SUBNODES
-The AOSS side channel also provides the controls for three cooling devices,
-these are expressed as subnodes of the QMP node. The name of the node is used
-to identify the resource and must therefor be "cx", "mx" or "ebi".
-
-- #cooling-cells:
- Usage: optional
- Value type: <u32>
- Definition: must be 2
-
-= EXAMPLE
-
-The following example represents the AOSS side-channel message RAM and the
-mechanism exposing the power-domains, as found in SDM845.
-
- aoss_qmp: qmp@c300000 {
- compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
- reg = <0x0c300000 0x100000>;
- interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
- mboxes = <&apss_shared 0>;
-
- #power-domain-cells = <1>;
-
- cx_cdev: cx {
- #cooling-cells = <2>;
- };
-
- mx_cdev: mx {
- #cooling-cells = <2>;
- };
- };
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
new file mode 100644
index 000000000000..93e4b737ee1b
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
@@ -0,0 +1,114 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Always-On Subsystem side channel binding
+
+maintainers:
+ - Bjorn Andersson <bjorn.andersson@linaro.org>
+
+description:
+ This binding describes the hardware component responsible for side channel
+ requests to the always-on subsystem (AOSS), used for certain power management
+ requests that is not handled by the standard RPMh interface. Each client in the
+ SoC has it's own block of message RAM and IRQ for communication with the AOSS.
+ The protocol used to communicate in the message RAM is known as Qualcomm
+ Messaging Protocol (QMP)
+
+ The AOSS side channel exposes control over a set of resources, used to control
+ a set of debug related clocks and to affect the low power state of resources
+ related to the secondary subsystems. These resources are exposed as a set of
+ power-domains.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - qcom,sc7180-aoss-qmp
+ - qcom,sc7280-aoss-qmp
+ - qcom,sc8180x-aoss-qmp
+ - qcom,sdm845-aoss-qmp
+ - qcom,sm8150-aoss-qmp
+ - qcom,sm8250-aoss-qmp
+ - qcom,sm8350-aoss-qmp
+ - const: qcom,aoss-qmp
+
+ reg:
+ maxItems: 1
+ description:
+ The base address and size of the message RAM for this client's
+ communication with the AOSS
+
+ interrupts:
+ maxItems: 1
+ description:
+ Should specify the AOSS message IRQ for this client
+
+ mboxes:
+ maxItems: 1
+ description:
+ Reference to the mailbox representing the outgoing doorbell in APCS for
+ this client, as described in mailbox/mailbox.txt
+
+ "#clock-cells":
+ const: 0
+ description:
+ The single clock represents the QDSS clock.
+
+ "#power-domain-cells":
+ const: 1
+ description: |
+ The provided power-domains are:
+ CDSP state (0), LPASS state (1), modem state (2), SLPI
+ state (3), SPSS state (4) and Venus state (5).
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - mboxes
+ - "#clock-cells"
+
+additionalProperties: false
+
+patternProperties:
+ "^(cx|mx|ebi)$":
+ type: object
+ description:
+ The AOSS side channel also provides the controls for three cooling devices,
+ these are expressed as subnodes of the QMP node. The name of the node is
+ used to identify the resource and must therefor be "cx", "mx" or "ebi".
+
+ properties:
+ "#cooling-cells":
+ const: 2
+
+ required:
+ - "#cooling-cells"
+
+ additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ aoss_qmp: qmp@c300000 {
+ compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
+ reg = <0x0c300000 0x100000>;
+ interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&apss_shared 0>;
+
+ #clock-cells = <0>;
+ #power-domain-cells = <1>;
+
+ cx_cdev: cx {
+ #cooling-cells = <2>;
+ };
+
+ mx_cdev: mx {
+ #cooling-cells = <2>;
+ };
+ };
+...
--
2.29.2
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 3/3] soc: qcom: aoss: Add generic compatible
2021-07-09 17:41 [PATCH v2 0/3] dt-bindings: soc: qcom: aoss: Support sc8180x and convert to YAML Bjorn Andersson
2021-07-09 17:41 ` [PATCH v2 1/3] dt-bindings: soc: qcom: aoss: Add SC8180X and generic compatible Bjorn Andersson
2021-07-09 17:41 ` [PATCH v2 2/3] dt-bindings: soc: qcom: aoss: Convert to YAML Bjorn Andersson
@ 2021-07-09 17:41 ` Bjorn Andersson
2021-07-16 17:01 ` Sibi Sankar
2 siblings, 1 reply; 7+ messages in thread
From: Bjorn Andersson @ 2021-07-09 17:41 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Sibi S
Cc: Rob Herring, linux-arm-msm, devicetree, linux-kernel
It seems we don't need platform specific implementation for the AOSS
QMP, so let's introduce a generic compatible to avoid having to update
the driver for each platform.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v1:
- None
drivers/soc/qcom/qcom_aoss.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/qcom_aoss.c b/drivers/soc/qcom/qcom_aoss.c
index 934fcc4d2b05..92a1af70a649 100644
--- a/drivers/soc/qcom/qcom_aoss.c
+++ b/drivers/soc/qcom/qcom_aoss.c
@@ -602,6 +602,7 @@ static const struct of_device_id qmp_dt_match[] = {
{ .compatible = "qcom,sm8150-aoss-qmp", },
{ .compatible = "qcom,sm8250-aoss-qmp", },
{ .compatible = "qcom,sm8350-aoss-qmp", },
+ { .compatible = "qcom,aoss-qmp", },
{}
};
MODULE_DEVICE_TABLE(of, qmp_dt_match);
--
2.29.2
^ permalink raw reply related [flat|nested] 7+ messages in thread