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From: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
To: Manivannan Sadhasivam <mani@kernel.org>, Rob Herring <robh@kernel.org>
Cc: linuxarm@huawei.com, mauro.chehab@huawei.com,
	"Mauro Carvalho Chehab" <mchehab+huawei@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Binghui Wang" <wangbinghui@hisilicon.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Xiaowei Song" <songxiaowei@hisilicon.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-phy@lists.infradead.org
Subject: [PATCH v3 0/9] Add support for Hikey 970 PCIe
Date: Fri,  9 Jul 2021 12:41:36 +0200	[thread overview]
Message-ID: <cover.1625826353.git.mchehab+huawei@kernel.org> (raw)

As requested by Rob Herring, this series split the PHY part into a separate driver.
Then, it adds support for Kirin 970 on a single patch.

With this change, the PHY-specific device tree bindings for Kirin 960 moved
to its own PHY properties.

Manivannan,

Please notice that the last two patches are marked as co-developed:

	phy: hisilicon: add driver for Kirin 970 PCIe PHY
	arm64: dts: hisilicon: Add support for HiKey 970 PCIe controller hardware

The first one contains the code you submitted in the past adding
support for Kirin 970 at the pcie-kirin driver, modified by me and
moved to a separate driver.

The second one is the DTS file, also modified by me in order to split the PHY
properties from the PCIe ones.

Please send your SoB to confirm that both changes are OK for you.

Tested on Hikey970:

  $ lspci
  00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3670 (rev 01)
  01:00.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  02:01.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  02:04.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  02:05.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  02:07.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  02:09.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba)
  06:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 07)

  $ ethtool enp6s0
  Settings for enp6s0:
	Supported ports: [ TP	 MII ]
	Supported link modes:   10baseT/Half 10baseT/Full
	                        100baseT/Half 100baseT/Full
	                        1000baseT/Half 1000baseT/Full
	Supported pause frame use: Symmetric Receive-only
	Supports auto-negotiation: Yes
	Supported FEC modes: Not reported
	Advertised link modes:  10baseT/Half 10baseT/Full
	                        100baseT/Half 100baseT/Full
	                        1000baseT/Half 1000baseT/Full
	Advertised pause frame use: Symmetric Receive-only
	Advertised auto-negotiation: Yes
	Advertised FEC modes: Not reported
	Link partner advertised link modes:  10baseT/Half 10baseT/Full
	                                     100baseT/Half 100baseT/Full
	Link partner advertised pause frame use: Symmetric Receive-only
	Link partner advertised auto-negotiation: Yes
	Link partner advertised FEC modes: Not reported
	Speed: 100Mb/s
	Duplex: Full
	Auto-negotiation: on
	master-slave cfg: preferred slave
	master-slave status: slave
	Port: Twisted Pair
	PHYAD: 0
	Transceiver: external
	MDI-X: Unknown
  netlink error: Operation not permitted
	Link detected: yes

Partially tested on Hikey 960[1]:

  $ lspci
  00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3660 (rev 01)

[1] The Hikey 960 doesn't come with any internal PCIe device.
    Its hardware supports just an external device via a M.2 slot that
    doesn't support SATA. I ordered a NVMe device to test, but the vendor
    is currently out of supply. It should take 4-5 weeks to arrive here. I'll
    run an extra test on it once it arrives.

Manivannan Sadhasivam (1):
  arm64: dts: hisilicon: Add support for HiKey 970 PCIe controller
    hardware

Mauro Carvalho Chehab (8):
  dt-bindings: phy: add bindings for Hikey 960 PCIe PHY
  dt-bindings: phy: add bindings for Hikey 970 PCIe PHY
  dt-bindings: PCI: kirin: fix compatible string
  dt-bindings: PCI: kirin: drop PHY properties
  phy: hisilicon: add a PHY driver for Kirin 960
  PCI: kirin: drop the PHY logic from the driver
  PCI: kirin: use regmap for APB registers
  phy: hisilicon: add driver for Kirin 970 PCIe PHY

 .../devicetree/bindings/pci/kirin-pcie.txt    |  21 +-
 .../phy/hisilicon,phy-hi3660-pcie.yaml        |  82 ++
 .../phy/hisilicon,phy-hi3670-pcie.yaml        | 101 ++
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi     |  29 +-
 arch/arm64/boot/dts/hisilicon/hi3670.dtsi     |  72 ++
 .../boot/dts/hisilicon/hikey970-pmic.dtsi     |   1 -
 drivers/pci/controller/dwc/pcie-kirin.c       | 298 ++----
 drivers/phy/hisilicon/Kconfig                 |  20 +
 drivers/phy/hisilicon/Makefile                |   2 +
 drivers/phy/hisilicon/phy-hi3660-pcie.c       | 325 +++++++
 drivers/phy/hisilicon/phy-hi3670-pcie.c       | 892 ++++++++++++++++++
 11 files changed, 1572 insertions(+), 271 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,phy-hi3660-pcie.yaml
 create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,phy-hi3670-pcie.yaml
 create mode 100644 drivers/phy/hisilicon/phy-hi3660-pcie.c
 create mode 100644 drivers/phy/hisilicon/phy-hi3670-pcie.c

-- 
2.31.1



             reply	other threads:[~2021-07-09 10:42 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-09 10:41 Mauro Carvalho Chehab [this message]
2021-07-09 10:41 ` [PATCH v3 1/9] dt-bindings: phy: add bindings for Hikey 960 PCIe PHY Mauro Carvalho Chehab
2021-07-09 10:41 ` [PATCH v3 2/9] dt-bindings: phy: add bindings for Hikey 970 " Mauro Carvalho Chehab
2021-07-09 10:41 ` [PATCH v3 3/9] dt-bindings: PCI: kirin: fix compatible string Mauro Carvalho Chehab
2021-07-09 10:41 ` [PATCH v3 4/9] dt-bindings: PCI: kirin: drop PHY properties Mauro Carvalho Chehab
2021-07-09 10:41 ` [PATCH v3 5/9] phy: hisilicon: add a PHY driver for Kirin 960 Mauro Carvalho Chehab
2021-07-09 10:41 ` [PATCH v3 6/9] PCI: kirin: drop the PHY logic from the driver Mauro Carvalho Chehab
2021-07-09 10:41 ` [PATCH v3 7/9] PCI: kirin: use regmap for APB registers Mauro Carvalho Chehab
2021-07-09 10:41 ` [PATCH v3 8/9] phy: hisilicon: add driver for Kirin 970 PCIe PHY Mauro Carvalho Chehab
2021-07-12  8:16   ` Manivannan Sadhasivam
2021-07-09 10:41 ` [PATCH v3 9/9] arm64: dts: hisilicon: Add support for HiKey 970 PCIe controller hardware Mauro Carvalho Chehab
2021-07-12  8:19 ` [PATCH v3 0/9] Add support for Hikey 970 PCIe Manivannan Sadhasivam
2021-07-12 21:49   ` Mauro Carvalho Chehab
2021-07-12 16:52 ` Bjorn Helgaas
2021-07-12 21:11   ` Mauro Carvalho Chehab

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