* [PATCH 0/4] staging: vt6655: Remove unused 5GHz support
@ 2022-03-05 21:31 Philipp Hortmann
2022-03-05 21:32 ` [PATCH 1/4] staging: vt6655: Remove unused byRFType in channel.c Philipp Hortmann
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Philipp Hortmann @ 2022-03-05 21:31 UTC (permalink / raw)
To: Forest Bond, Greg Kroah-Hartman, linux-staging, linux-kernel
Hardware of vt6655 (PCI) and vt6656 (USB) do only support 2.4GHz band and not 5GHz band.
Both drivers do allow only one vendor id and device id.
So no other devices are covered by those drivers.
Because of this the following priv->byRFType cannot occure:
RF_AIROHA7230
RF_UW2452
Tested with vt6655 on mini PCI Module
Module used for testing is using byRFType: RF_AIROHA (2.4GHz only)
In order to combine vt665x infrastructure it is important
that vt6656 is also not using this code.
vt6656 on mini PCIe card (connected over USB)
is using byRFType: RF_VT3226D0 (2.4GHz only)
vt6656 as USB Plugin Module
is using byRFType: RF_AL2230S (2.4GHz only)
Transferred this patches over vt6655 on mini PCI Module
Checkpatch errors occured because indention was changed. (3x times CamelCase)
I did not fix that in this patch series as it would make the patch more complicated.
Philipp Hortmann (4):
staging: vt6655: Remove unused byRFType in channel.c
staging: vt6655: Remove unused byRFType in baseband.c
staging: vt6655: Remove unused byRFType in rf.c
staging: vt6655: Remove unused byRFType in card.c
drivers/staging/vt6655/baseband.c | 80 ------
drivers/staging/vt6655/card.c | 56 +----
drivers/staging/vt6655/channel.c | 85 +------
drivers/staging/vt6655/rf.c | 404 +-----------------------------
4 files changed, 3 insertions(+), 622 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/4] staging: vt6655: Remove unused byRFType in channel.c
2022-03-05 21:31 [PATCH 0/4] staging: vt6655: Remove unused 5GHz support Philipp Hortmann
@ 2022-03-05 21:32 ` Philipp Hortmann
2022-03-05 21:32 ` [PATCH 2/4] staging: vt6655: Remove unused byRFType in baseband.c Philipp Hortmann
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Philipp Hortmann @ 2022-03-05 21:32 UTC (permalink / raw)
To: Forest Bond, Greg Kroah-Hartman, linux-staging, linux-kernel
Remove byRFType that support 5GHz band.
Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
---
drivers/staging/vt6655/channel.c | 85 +-------------------------------
1 file changed, 1 insertion(+), 84 deletions(-)
diff --git a/drivers/staging/vt6655/channel.c b/drivers/staging/vt6655/channel.c
index e37c8e35a45b..abe867814dc8 100644
--- a/drivers/staging/vt6655/channel.c
+++ b/drivers/staging/vt6655/channel.c
@@ -25,17 +25,6 @@ static struct ieee80211_rate vnt_rates_bg[] = {
{ .bitrate = 540, .hw_value = RATE_54M },
};
-static struct ieee80211_rate vnt_rates_a[] = {
- { .bitrate = 60, .hw_value = RATE_6M },
- { .bitrate = 90, .hw_value = RATE_9M },
- { .bitrate = 120, .hw_value = RATE_12M },
- { .bitrate = 180, .hw_value = RATE_18M },
- { .bitrate = 240, .hw_value = RATE_24M },
- { .bitrate = 360, .hw_value = RATE_36M },
- { .bitrate = 480, .hw_value = RATE_48M },
- { .bitrate = 540, .hw_value = RATE_54M },
-};
-
static struct ieee80211_channel vnt_channels_2ghz[] = {
{ .center_freq = 2412, .hw_value = 1 },
{ .center_freq = 2417, .hw_value = 2 },
@@ -53,51 +42,6 @@ static struct ieee80211_channel vnt_channels_2ghz[] = {
{ .center_freq = 2484, .hw_value = 14 }
};
-static struct ieee80211_channel vnt_channels_5ghz[] = {
- { .center_freq = 4915, .hw_value = 15 },
- { .center_freq = 4920, .hw_value = 16 },
- { .center_freq = 4925, .hw_value = 17 },
- { .center_freq = 4935, .hw_value = 18 },
- { .center_freq = 4940, .hw_value = 19 },
- { .center_freq = 4945, .hw_value = 20 },
- { .center_freq = 4960, .hw_value = 21 },
- { .center_freq = 4980, .hw_value = 22 },
- { .center_freq = 5035, .hw_value = 23 },
- { .center_freq = 5040, .hw_value = 24 },
- { .center_freq = 5045, .hw_value = 25 },
- { .center_freq = 5055, .hw_value = 26 },
- { .center_freq = 5060, .hw_value = 27 },
- { .center_freq = 5080, .hw_value = 28 },
- { .center_freq = 5170, .hw_value = 29 },
- { .center_freq = 5180, .hw_value = 30 },
- { .center_freq = 5190, .hw_value = 31 },
- { .center_freq = 5200, .hw_value = 32 },
- { .center_freq = 5210, .hw_value = 33 },
- { .center_freq = 5220, .hw_value = 34 },
- { .center_freq = 5230, .hw_value = 35 },
- { .center_freq = 5240, .hw_value = 36 },
- { .center_freq = 5260, .hw_value = 37 },
- { .center_freq = 5280, .hw_value = 38 },
- { .center_freq = 5300, .hw_value = 39 },
- { .center_freq = 5320, .hw_value = 40 },
- { .center_freq = 5500, .hw_value = 41 },
- { .center_freq = 5520, .hw_value = 42 },
- { .center_freq = 5540, .hw_value = 43 },
- { .center_freq = 5560, .hw_value = 44 },
- { .center_freq = 5580, .hw_value = 45 },
- { .center_freq = 5600, .hw_value = 46 },
- { .center_freq = 5620, .hw_value = 47 },
- { .center_freq = 5640, .hw_value = 48 },
- { .center_freq = 5660, .hw_value = 49 },
- { .center_freq = 5680, .hw_value = 50 },
- { .center_freq = 5700, .hw_value = 51 },
- { .center_freq = 5745, .hw_value = 52 },
- { .center_freq = 5765, .hw_value = 53 },
- { .center_freq = 5785, .hw_value = 54 },
- { .center_freq = 5805, .hw_value = 55 },
- { .center_freq = 5825, .hw_value = 56 }
-};
-
static struct ieee80211_supported_band vnt_supported_2ghz_band = {
.channels = vnt_channels_2ghz,
.n_channels = ARRAY_SIZE(vnt_channels_2ghz),
@@ -105,13 +49,6 @@ static struct ieee80211_supported_band vnt_supported_2ghz_band = {
.n_bitrates = ARRAY_SIZE(vnt_rates_bg),
};
-static struct ieee80211_supported_band vnt_supported_5ghz_band = {
- .channels = vnt_channels_5ghz,
- .n_channels = ARRAY_SIZE(vnt_channels_5ghz),
- .bitrates = vnt_rates_a,
- .n_bitrates = ARRAY_SIZE(vnt_rates_a),
-};
-
static void vnt_init_band(struct vnt_private *priv,
struct ieee80211_supported_band *supported_band,
enum nl80211_band band)
@@ -129,23 +66,7 @@ static void vnt_init_band(struct vnt_private *priv,
void vnt_init_bands(struct vnt_private *priv)
{
- switch (priv->byRFType) {
- case RF_AIROHA7230:
- case RF_UW2452:
- case RF_NOTHING:
- default:
- vnt_init_band(priv, &vnt_supported_5ghz_band,
- NL80211_BAND_5GHZ);
- fallthrough;
- case RF_RFMD2959:
- case RF_AIROHA:
- case RF_AL2230S:
- case RF_UW2451:
- case RF_VT3226:
- vnt_init_band(priv, &vnt_supported_2ghz_band,
- NL80211_BAND_2GHZ);
- break;
- }
+ vnt_init_band(priv, &vnt_supported_2ghz_band, NL80211_BAND_2GHZ);
}
/**
@@ -179,10 +100,6 @@ bool set_channel(struct vnt_private *priv, struct ieee80211_channel *ch)
* it is for better TX throughput
*/
- if (priv->byRFType == RF_AIROHA7230)
- RFbAL7230SelectChannelPostProcess(priv, priv->byCurrentCh,
- ch->hw_value);
-
priv->byCurrentCh = ch->hw_value;
ret &= RFbSelectChannel(priv, priv->byRFType,
ch->hw_value);
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/4] staging: vt6655: Remove unused byRFType in baseband.c
2022-03-05 21:31 [PATCH 0/4] staging: vt6655: Remove unused 5GHz support Philipp Hortmann
2022-03-05 21:32 ` [PATCH 1/4] staging: vt6655: Remove unused byRFType in channel.c Philipp Hortmann
@ 2022-03-05 21:32 ` Philipp Hortmann
2022-03-05 21:32 ` [PATCH 3/4] staging: vt6655: Remove unused byRFType in rf.c Philipp Hortmann
2022-03-05 21:32 ` [PATCH 4/4] staging: vt6655: Remove unused byRFType in card.c Philipp Hortmann
3 siblings, 0 replies; 5+ messages in thread
From: Philipp Hortmann @ 2022-03-05 21:32 UTC (permalink / raw)
To: Forest Bond, Greg Kroah-Hartman, linux-staging, linux-kernel
Remove byRFType that support 5GHz band.
Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
---
drivers/staging/vt6655/baseband.c | 80 -------------------------------
1 file changed, 80 deletions(-)
diff --git a/drivers/staging/vt6655/baseband.c b/drivers/staging/vt6655/baseband.c
index 84fa6ea3e2e6..dfdb0ebf43b5 100644
--- a/drivers/staging/vt6655/baseband.c
+++ b/drivers/staging/vt6655/baseband.c
@@ -2065,54 +2065,6 @@ bool bb_vt3253_init(struct vnt_private *priv)
priv->dbm_threshold[1] = -50;
priv->dbm_threshold[2] = 0;
priv->dbm_threshold[3] = 0;
- } else if (by_rf_type == RF_UW2452) {
- for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
- result &= bb_write_embedded(priv,
- byVT3253B0_UW2451[ii][0],
- byVT3253B0_UW2451[ii][1]);
-
- /* Init ANT B select,
- * TX Config CR09 = 0x61->0x45,
- * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
- */
-
- /*bResult &= bb_write_embedded(iobase,0x09,0x41);*/
-
- /* Init ANT B select,
- * RX Config CR10 = 0x28->0x2A,
- * 0x2A->0x28(VC1/VC2 define,
- * make the ANT_A, ANT_B inverted)
- */
-
- /*bResult &= bb_write_embedded(iobase,0x0a,0x28);*/
- /* Select VC1/VC2, CR215 = 0x02->0x06 */
- result &= bb_write_embedded(priv, 0xd7, 0x06);
-
- /* {{RobertYu:20050125, request by Jack */
- result &= bb_write_embedded(priv, 0x90, 0x20);
- result &= bb_write_embedded(priv, 0x97, 0xeb);
- /* }} */
-
- /* {{RobertYu:20050221, request by Jack */
- result &= bb_write_embedded(priv, 0xa6, 0x00);
- result &= bb_write_embedded(priv, 0xa8, 0x30);
- /* }} */
- result &= bb_write_embedded(priv, 0xb0, 0x58);
-
- for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- result &= bb_write_embedded(priv,
- byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
-
- priv->abyBBVGA[0] = 0x14;
- priv->abyBBVGA[1] = 0x0A;
- priv->abyBBVGA[2] = 0x0;
- priv->abyBBVGA[3] = 0x0;
- priv->dbm_threshold[0] = -60;
- priv->dbm_threshold[1] = -50;
- priv->dbm_threshold[2] = 0;
- priv->dbm_threshold[3] = 0;
- /* }} RobertYu */
-
} else if (by_rf_type == RF_VT3226) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
result &= bb_write_embedded(priv,
@@ -2134,38 +2086,6 @@ bool bb_vt3253_init(struct vnt_private *priv)
/* Fix VT3226 DFC system timing issue */
MACvSetRFLE_LatchBase(iobase);
/* {{ RobertYu: 20050104 */
- } else if (by_rf_type == RF_AIROHA7230) {
- for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
- result &= bb_write_embedded(priv,
- byVT3253B0_AIROHA2230[ii][0],
- byVT3253B0_AIROHA2230[ii][1]);
-
- /* {{ RobertYu:20050223, request by JerryChung */
- /* Init ANT B select,TX Config CR09 = 0x61->0x45,
- * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
- */
- /* bResult &= bb_write_embedded(iobase,0x09,0x41);*/
- /* Init ANT B select,RX Config CR10 = 0x28->0x2A,
- * 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
- */
- /* bResult &= BBbWriteEmbedded(iobase,0x0a,0x28);*/
- /* Select VC1/VC2, CR215 = 0x02->0x06 */
- result &= bb_write_embedded(priv, 0xd7, 0x06);
- /* }} */
-
- for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- result &= bb_write_embedded(priv,
- byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
-
- priv->abyBBVGA[0] = 0x1C;
- priv->abyBBVGA[1] = 0x10;
- priv->abyBBVGA[2] = 0x0;
- priv->abyBBVGA[3] = 0x0;
- priv->dbm_threshold[0] = -70;
- priv->dbm_threshold[1] = -48;
- priv->dbm_threshold[2] = 0;
- priv->dbm_threshold[3] = 0;
- /* }} RobertYu */
} else {
/* No VGA Table now */
priv->bUpdateBBVGA = false;
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/4] staging: vt6655: Remove unused byRFType in rf.c
2022-03-05 21:31 [PATCH 0/4] staging: vt6655: Remove unused 5GHz support Philipp Hortmann
2022-03-05 21:32 ` [PATCH 1/4] staging: vt6655: Remove unused byRFType in channel.c Philipp Hortmann
2022-03-05 21:32 ` [PATCH 2/4] staging: vt6655: Remove unused byRFType in baseband.c Philipp Hortmann
@ 2022-03-05 21:32 ` Philipp Hortmann
2022-03-05 21:32 ` [PATCH 4/4] staging: vt6655: Remove unused byRFType in card.c Philipp Hortmann
3 siblings, 0 replies; 5+ messages in thread
From: Philipp Hortmann @ 2022-03-05 21:32 UTC (permalink / raw)
To: Forest Bond, Greg Kroah-Hartman, linux-staging, linux-kernel
Remove byRFType that support 5GHz band.
Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
---
drivers/staging/vt6655/rf.c | 404 +-----------------------------------
1 file changed, 1 insertion(+), 403 deletions(-)
diff --git a/drivers/staging/vt6655/rf.c b/drivers/staging/vt6655/rf.c
index ba7056f5a5da..4498c9d400f2 100644
--- a/drivers/staging/vt6655/rf.c
+++ b/drivers/staging/vt6655/rf.c
@@ -152,333 +152,6 @@ static unsigned long al2230_power_table[AL2230_PWR_IDX_LEN] = {
0x0407F900 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW
};
-/* 40MHz reference frequency
- * Need to Pull PLLON(PE3) low when writing channel registers through 3-wire.
- */
-static const unsigned long al7230_init_table[CB_AL7230_INIT_SEQ] = {
- 0x00379000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Channel1 // Need modify for 11a */
- 0x13333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Channel1 // Need modify for 11a */
- 0x841FF200 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11a: 451FE2 */
- 0x3FDFA300 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11a: 5FDFA3 */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* 11b/g // Need modify for 11a */
- /* RoberYu:20050113, Rev0.47 Register Setting Guide */
- 0x802B5500 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11a: 8D1B55 */
- 0x56AF3600 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW,
- 0xCE020700 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11a: 860207 */
- 0x6EBC0800 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW,
- 0x221BB900 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW,
- 0xE0000A00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11a: E0600A */
- 0x08031B00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* init 0x080B1B00 => 0x080F1B00 for 3 wire control TxGain(D10) */
- /* RoberYu:20050113, Rev0.47 Register Setting Guide */
- 0x000A3C00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11a: 00143C */
- 0xFFFFFD00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW,
- 0x00000E00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW,
- 0x1ABA8F00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW /* Need modify for 11a: 12BACF */
-};
-
-static const unsigned long al7230_init_table_a_mode[CB_AL7230_INIT_SEQ] = {
- 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Channel184 // Need modify for 11b/g */
- 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Channel184 // Need modify for 11b/g */
- 0x451FE200 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11b/g */
- 0x5FDFA300 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11b/g */
- 0x67F78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* 11a // Need modify for 11b/g */
- 0x853F5500 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11b/g, RoberYu:20050113 */
- 0x56AF3600 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW,
- 0xCE020700 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11b/g */
- 0x6EBC0800 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW,
- 0x221BB900 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW,
- 0xE0600A00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11b/g */
- 0x08031B00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* init 0x080B1B00 => 0x080F1B00 for 3 wire control TxGain(D10) */
- 0x00147C00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for 11b/g */
- 0xFFFFFD00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW,
- 0x00000E00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW,
- 0x12BACF00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW /* Need modify for 11b/g */
-};
-
-static const unsigned long al7230_channel_table0[CB_MAX_CHANNEL] = {
- 0x00379000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 1, Tf = 2412MHz */
- 0x00379000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 2, Tf = 2417MHz */
- 0x00379000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 3, Tf = 2422MHz */
- 0x00379000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 4, Tf = 2427MHz */
- 0x0037A000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 5, Tf = 2432MHz */
- 0x0037A000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 6, Tf = 2437MHz */
- 0x0037A000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 2442MHz */
- 0x0037A000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 2447MHz //RobertYu: 20050218, update for APNode 0.49 */
- 0x0037B000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 2452MHz //RobertYu: 20050218, update for APNode 0.49 */
- 0x0037B000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 10, Tf = 2457MHz //RobertYu: 20050218, update for APNode 0.49 */
- 0x0037B000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 11, Tf = 2462MHz //RobertYu: 20050218, update for APNode 0.49 */
- 0x0037B000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 12, Tf = 2467MHz //RobertYu: 20050218, update for APNode 0.49 */
- 0x0037C000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 13, Tf = 2472MHz //RobertYu: 20050218, update for APNode 0.49 */
- 0x0037C000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 14, Tf = 2484MHz */
-
- /* 4.9G => Ch 183, 184, 185, 187, 188, 189, 192, 196 (Value:15 ~ 22) */
- 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 183, Tf = 4915MHz (15) */
- 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 184, Tf = 4920MHz (16) */
- 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 185, Tf = 4925MHz (17) */
- 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 187, Tf = 4935MHz (18) */
- 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 188, Tf = 4940MHz (19) */
- 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 189, Tf = 4945MHz (20) */
- 0x0FF53000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 192, Tf = 4960MHz (21) */
- 0x0FF53000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 196, Tf = 4980MHz (22) */
-
- /* 5G => Ch 7, 8, 9, 11, 12, 16, 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64,
- * 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165 (Value 23 ~ 56)
- */
-
- 0x0FF54000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 5035MHz (23) */
- 0x0FF54000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 5040MHz (24) */
- 0x0FF54000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 5045MHz (25) */
- 0x0FF54000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 11, Tf = 5055MHz (26) */
- 0x0FF54000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 12, Tf = 5060MHz (27) */
- 0x0FF55000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 16, Tf = 5080MHz (28) */
- 0x0FF56000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 34, Tf = 5170MHz (29) */
- 0x0FF56000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 36, Tf = 5180MHz (30) */
- 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 38, Tf = 5190MHz (31) //RobertYu: 20050218, update for APNode 0.49 */
- 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 40, Tf = 5200MHz (32) */
- 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 42, Tf = 5210MHz (33) */
- 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 44, Tf = 5220MHz (34) */
- 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 46, Tf = 5230MHz (35) */
- 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 48, Tf = 5240MHz (36) */
- 0x0FF58000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 52, Tf = 5260MHz (37) */
- 0x0FF58000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 56, Tf = 5280MHz (38) */
- 0x0FF58000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 60, Tf = 5300MHz (39) */
- 0x0FF59000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 64, Tf = 5320MHz (40) */
-
- 0x0FF5C000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 100, Tf = 5500MHz (41) */
- 0x0FF5C000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 104, Tf = 5520MHz (42) */
- 0x0FF5C000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 108, Tf = 5540MHz (43) */
- 0x0FF5D000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 112, Tf = 5560MHz (44) */
- 0x0FF5D000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 116, Tf = 5580MHz (45) */
- 0x0FF5D000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 120, Tf = 5600MHz (46) */
- 0x0FF5E000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 124, Tf = 5620MHz (47) */
- 0x0FF5E000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 128, Tf = 5640MHz (48) */
- 0x0FF5E000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 132, Tf = 5660MHz (49) */
- 0x0FF5F000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 136, Tf = 5680MHz (50) */
- 0x0FF5F000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 140, Tf = 5700MHz (51) */
- 0x0FF60000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 149, Tf = 5745MHz (52) */
- 0x0FF60000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 153, Tf = 5765MHz (53) */
- 0x0FF60000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 157, Tf = 5785MHz (54) */
- 0x0FF61000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 161, Tf = 5805MHz (55) */
- 0x0FF61000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW /* channel = 165, Tf = 5825MHz (56) */
-};
-
-static const unsigned long al7230_channel_table1[CB_MAX_CHANNEL] = {
- 0x13333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 1, Tf = 2412MHz */
- 0x1B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 2, Tf = 2417MHz */
- 0x03333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 3, Tf = 2422MHz */
- 0x0B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 4, Tf = 2427MHz */
- 0x13333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 5, Tf = 2432MHz */
- 0x1B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 6, Tf = 2437MHz */
- 0x03333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 2442MHz */
- 0x0B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 2447MHz */
- 0x13333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 2452MHz */
- 0x1B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 10, Tf = 2457MHz */
- 0x03333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 11, Tf = 2462MHz */
- 0x0B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 12, Tf = 2467MHz */
- 0x13333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 13, Tf = 2472MHz */
- 0x06666100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 14, Tf = 2484MHz */
-
- /* 4.9G => Ch 183, 184, 185, 187, 188, 189, 192, 196 (Value:15 ~ 22) */
- 0x1D555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 183, Tf = 4915MHz (15) */
- 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 184, Tf = 4920MHz (16) */
- 0x02AAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 185, Tf = 4925MHz (17) */
- 0x08000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 187, Tf = 4935MHz (18) */
- 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 188, Tf = 4940MHz (19) */
- 0x0D555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 189, Tf = 4945MHz (20) */
- 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 192, Tf = 4960MHz (21) */
- 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 196, Tf = 4980MHz (22) */
-
- /* 5G => Ch 7, 8, 9, 11, 12, 16, 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64,
- * 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165 (Value 23 ~ 56)
- */
- 0x1D555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 5035MHz (23) */
- 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 5040MHz (24) */
- 0x02AAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 5045MHz (25) */
- 0x08000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 11, Tf = 5055MHz (26) */
- 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 12, Tf = 5060MHz (27) */
- 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 16, Tf = 5080MHz (28) */
- 0x05555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 34, Tf = 5170MHz (29) */
- 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 36, Tf = 5180MHz (30) */
- 0x10000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 38, Tf = 5190MHz (31) */
- 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 40, Tf = 5200MHz (32) */
- 0x1AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 42, Tf = 5210MHz (33) */
- 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 44, Tf = 5220MHz (34) */
- 0x05555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 46, Tf = 5230MHz (35) */
- 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 48, Tf = 5240MHz (36) */
- 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 52, Tf = 5260MHz (37) */
- 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 56, Tf = 5280MHz (38) */
- 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 60, Tf = 5300MHz (39) */
- 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 64, Tf = 5320MHz (40) */
- 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 100, Tf = 5500MHz (41) */
- 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 104, Tf = 5520MHz (42) */
- 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 108, Tf = 5540MHz (43) */
- 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 112, Tf = 5560MHz (44) */
- 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 116, Tf = 5580MHz (45) */
- 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 120, Tf = 5600MHz (46) */
- 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 124, Tf = 5620MHz (47) */
- 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 128, Tf = 5640MHz (48) */
- 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 132, Tf = 5660MHz (49) */
- 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 136, Tf = 5680MHz (50) */
- 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 140, Tf = 5700MHz (51) */
- 0x18000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 149, Tf = 5745MHz (52) */
- 0x02AAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 153, Tf = 5765MHz (53) */
- 0x0D555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 157, Tf = 5785MHz (54) */
- 0x18000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 161, Tf = 5805MHz (55) */
- 0x02AAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW /* channel = 165, Tf = 5825MHz (56) */
-};
-
-static const unsigned long al7230_channel_table2[CB_MAX_CHANNEL] = {
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 1, Tf = 2412MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 2, Tf = 2417MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 3, Tf = 2422MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 4, Tf = 2427MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 5, Tf = 2432MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 6, Tf = 2437MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 2442MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 2447MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 2452MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 10, Tf = 2457MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 11, Tf = 2462MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 12, Tf = 2467MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 13, Tf = 2472MHz */
- 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 14, Tf = 2484MHz */
-
- /* 4.9G => Ch 183, 184, 185, 187, 188, 189, 192, 196 (Value:15 ~ 22) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 183, Tf = 4915MHz (15) */
- 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 184, Tf = 4920MHz (16) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 185, Tf = 4925MHz (17) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 187, Tf = 4935MHz (18) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 188, Tf = 4940MHz (19) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 189, Tf = 4945MHz (20) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 192, Tf = 4960MHz (21) */
- 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 196, Tf = 4980MHz (22) */
-
- /* 5G => Ch 7, 8, 9, 11, 12, 16, 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64,
- * 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165 (Value 23 ~ 56)
- */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 5035MHz (23) */
- 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 5040MHz (24) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 5045MHz (25) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 11, Tf = 5055MHz (26) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 12, Tf = 5060MHz (27) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 16, Tf = 5080MHz (28) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 34, Tf = 5170MHz (29) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 36, Tf = 5180MHz (30) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 38, Tf = 5190MHz (31) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 40, Tf = 5200MHz (32) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 42, Tf = 5210MHz (33) */
- 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 44, Tf = 5220MHz (34) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 46, Tf = 5230MHz (35) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 48, Tf = 5240MHz (36) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 52, Tf = 5260MHz (37) */
- 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 56, Tf = 5280MHz (38) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 60, Tf = 5300MHz (39) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 64, Tf = 5320MHz (40) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 100, Tf = 5500MHz (41) */
- 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 104, Tf = 5520MHz (42) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 108, Tf = 5540MHz (43) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 112, Tf = 5560MHz (44) */
- 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 116, Tf = 5580MHz (45) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 120, Tf = 5600MHz (46) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 124, Tf = 5620MHz (47) */
- 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 128, Tf = 5640MHz (48) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 132, Tf = 5660MHz (49) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 136, Tf = 5680MHz (50) */
- 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 140, Tf = 5700MHz (51) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 149, Tf = 5745MHz (52) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 153, Tf = 5765MHz (53) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 157, Tf = 5785MHz (54) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 161, Tf = 5805MHz (55) */
- 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW /* channel = 165, Tf = 5825MHz (56) */
-};
-
-/*
- * Description: AIROHA IFRF chip init function
- *
- * Parameters:
- * In:
- * iobase - I/O base address
- * Out:
- * none
- *
- * Return Value: true if succeeded; false if failed.
- *
- */
-static bool s_bAL7230Init(struct vnt_private *priv)
-{
- void __iomem *iobase = priv->port_offset;
- int ii;
- bool ret;
-
- ret = true;
-
- /* 3-wire control for normal mode */
- VNSvOutPortB(iobase + MAC_REG_SOFTPWRCTL, 0);
-
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPECTI |
- SOFTPWRCTL_TXPEINV));
- bb_power_save_mode_off(priv); /* RobertYu:20050106, have DC value for Calibration */
-
- for (ii = 0; ii < CB_AL7230_INIT_SEQ; ii++)
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table[ii]);
-
- /* PLL On */
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
-
- /* Calibration */
- MACvTimer0MicroSDelay(priv, 150);/* 150us */
- /* TXDCOC:active, RCK:disable */
- ret &= IFRFbWriteEmbedded(priv, (0x9ABA8F00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW));
- MACvTimer0MicroSDelay(priv, 30);/* 30us */
- /* TXDCOC:disable, RCK:active */
- ret &= IFRFbWriteEmbedded(priv, (0x3ABA8F00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW));
- MACvTimer0MicroSDelay(priv, 30);/* 30us */
- /* TXDCOC:disable, RCK:disable */
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table[CB_AL7230_INIT_SEQ - 1]);
-
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 |
- SOFTPWRCTL_SWPE2 |
- SOFTPWRCTL_SWPECTI |
- SOFTPWRCTL_TXPEINV));
-
- bb_power_save_mode_on(priv); /* RobertYu:20050106 */
-
- /* PE1: TX_ON, PE2: RX_ON, PE3: PLLON */
- /* 3-wire control for power saving mode */
- VNSvOutPortB(iobase + MAC_REG_PSPWRSIG, (PSSIG_WPE3 | PSSIG_WPE2)); /* 1100 0000 */
-
- return ret;
-}
-
-/* Need to Pull PLLON low when writing channel registers through
- * 3-wire interface
- */
-static bool s_bAL7230SelectChannel(struct vnt_private *priv, unsigned char byChannel)
-{
- void __iomem *iobase = priv->port_offset;
- bool ret;
-
- ret = true;
-
- /* PLLON Off */
- MACvWordRegBitsOff(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
-
- ret &= IFRFbWriteEmbedded(priv, al7230_channel_table0[byChannel - 1]);
- ret &= IFRFbWriteEmbedded(priv, al7230_channel_table1[byChannel - 1]);
- ret &= IFRFbWriteEmbedded(priv, al7230_channel_table2[byChannel - 1]);
-
- /* PLLOn On */
- MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
-
- /* Set Channel[7] = 0 to tell H/W channel is changing now. */
- VNSvOutPortB(iobase + MAC_REG_CHANNEL, (byChannel & 0x7F));
- MACvTimer0MicroSDelay(priv, SWITCH_CHANNEL_DELAY_AL7230);
- /* Set Channel[7] = 1 to tell H/W channel change is done. */
- VNSvOutPortB(iobase + MAC_REG_CHANNEL, (byChannel | 0x80));
-
- return ret;
-}
-
/*
* Description: Write to IF/RF, by embedded programming
*
@@ -612,10 +285,6 @@ bool RFbInit(struct vnt_private *priv)
priv->max_pwr_level = AL2230_PWR_IDX_LEN;
ret = RFbAL2230Init(priv);
break;
- case RF_AIROHA7230:
- priv->max_pwr_level = AL7230_PWR_IDX_LEN;
- ret = s_bAL7230Init(priv);
- break;
case RF_NOTHING:
ret = true;
break;
@@ -650,10 +319,6 @@ bool RFbSelectChannel(struct vnt_private *priv, unsigned char byRFType,
ret = RFbAL2230SelectChannel(priv, byChannel);
break;
/*{{ RobertYu: 20050104 */
- case RF_AIROHA7230:
- ret = s_bAL7230SelectChannel(priv, byChannel);
- break;
- /*}} RobertYu */
case RF_NOTHING:
ret = true;
break;
@@ -684,7 +349,6 @@ bool rf_write_wake_prog_syn(struct vnt_private *priv, unsigned char rf_type,
unsigned char init_count = 0;
unsigned char sleep_count = 0;
unsigned short idx = MISCFIFO_SYNDATA_IDX;
- const unsigned long *init_table;
VNSvOutPortW(iobase + MAC_REG_MISCFFNDEX, 0);
switch (rf_type) {
@@ -706,20 +370,6 @@ bool rf_write_wake_prog_syn(struct vnt_private *priv, unsigned char rf_type,
break;
/* Need to check, PLLON need to be low for channel setting */
- case RF_AIROHA7230:
- /* Init Reg + Channel Reg (3) */
- init_count = CB_AL7230_INIT_SEQ + 3;
- sleep_count = 0;
-
- init_table = (channel <= CB_MAX_CHANNEL_24G) ?
- al7230_init_table : al7230_init_table_a_mode;
- for (i = 0; i < CB_AL7230_INIT_SEQ; i++)
- MACvSetMISCFifo(priv, idx++, init_table[i]);
-
- MACvSetMISCFifo(priv, idx++, al7230_channel_table0[channel - 1]);
- MACvSetMISCFifo(priv, idx++, al7230_channel_table1[channel - 1]);
- MACvSetMISCFifo(priv, idx++, al7230_channel_table2[channel - 1]);
- break;
case RF_NOTHING:
return true;
@@ -773,10 +423,7 @@ bool RFbSetPower(struct vnt_private *priv, unsigned int rate, u16 uCH)
case RATE_12M:
case RATE_18M:
byPwr = priv->abyOFDMPwrTbl[uCH];
- if (priv->byRFType == RF_UW2452)
- byDec = byPwr + 14;
- else
- byDec = byPwr + 10;
+ byDec = byPwr + 10;
if (byDec >= priv->max_pwr_level)
byDec = priv->max_pwr_level - 1;
@@ -819,7 +466,6 @@ bool RFbRawSetPower(struct vnt_private *priv, unsigned char byPwr,
unsigned int rate)
{
bool ret = true;
- unsigned long dwMax7230Pwr = 0;
if (byPwr >= priv->max_pwr_level)
return false;
@@ -846,16 +492,6 @@ bool RFbRawSetPower(struct vnt_private *priv, unsigned char byPwr,
break;
- case RF_AIROHA7230:
- /* 0x080F1B00 for 3 wire control TxGain(D10)
- * and 0x31 as TX Gain value
- */
- dwMax7230Pwr = 0x080C0B00 | ((byPwr) << 12) |
- (BY_AL7230_REG_LEN << 3) | IFREGCTL_REGW;
-
- ret &= IFRFbWriteEmbedded(priv, dwMax7230Pwr);
- break;
-
default:
break;
}
@@ -888,7 +524,6 @@ RFvRSSITodBm(struct vnt_private *priv, unsigned char byCurrRSSI, long *pldBm)
switch (priv->byRFType) {
case RF_AIROHA:
case RF_AL2230S:
- case RF_AIROHA7230:
a = abyAIROHARF[byIdx];
break;
default:
@@ -898,40 +533,3 @@ RFvRSSITodBm(struct vnt_private *priv, unsigned char byCurrRSSI, long *pldBm)
*pldBm = -1 * (a + b * 2);
}
-/* Post processing for the 11b/g and 11a.
- * for save time on changing Reg2,3,5,7,10,12,15
- */
-bool RFbAL7230SelectChannelPostProcess(struct vnt_private *priv,
- u16 byOldChannel,
- u16 byNewChannel)
-{
- bool ret;
-
- ret = true;
-
- /* if change between 11 b/g and 11a need to update the following
- * register
- * Channel Index 1~14
- */
- if ((byOldChannel <= CB_MAX_CHANNEL_24G) && (byNewChannel > CB_MAX_CHANNEL_24G)) {
- /* Change from 2.4G to 5G [Reg] */
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[2]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[3]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[5]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[7]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[10]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[12]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[15]);
- } else if ((byOldChannel > CB_MAX_CHANNEL_24G) && (byNewChannel <= CB_MAX_CHANNEL_24G)) {
- /* Change from 5G to 2.4G [Reg] */
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table[2]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table[3]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table[5]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table[7]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table[10]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table[12]);
- ret &= IFRFbWriteEmbedded(priv, al7230_init_table[15]);
- }
-
- return ret;
-}
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 4/4] staging: vt6655: Remove unused byRFType in card.c
2022-03-05 21:31 [PATCH 0/4] staging: vt6655: Remove unused 5GHz support Philipp Hortmann
` (2 preceding siblings ...)
2022-03-05 21:32 ` [PATCH 3/4] staging: vt6655: Remove unused byRFType in rf.c Philipp Hortmann
@ 2022-03-05 21:32 ` Philipp Hortmann
3 siblings, 0 replies; 5+ messages in thread
From: Philipp Hortmann @ 2022-03-05 21:32 UTC (permalink / raw)
To: Forest Bond, Greg Kroah-Hartman, linux-staging, linux-kernel
Remove byRFType that support 5GHz band.
Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
---
drivers/staging/vt6655/card.c | 56 +----------------------------------
1 file changed, 1 insertion(+), 55 deletions(-)
diff --git a/drivers/staging/vt6655/card.c b/drivers/staging/vt6655/card.c
index ee2d145778ed..1110366fc415 100644
--- a/drivers/staging/vt6655/card.c
+++ b/drivers/staging/vt6655/card.c
@@ -183,32 +183,11 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type)
unsigned char bySlot = 0;
unsigned char bySIFS = 0;
unsigned char byDIFS = 0;
- unsigned char data;
int i;
/* Set SIFS, DIFS, EIFS, SlotTime, CwMin */
if (bb_type == BB_TYPE_11A) {
- if (priv->byRFType == RF_AIROHA7230) {
- /* AL7230 use single PAPE and connect to PAPE_2.4G */
- MACvSetBBType(priv->port_offset, BB_TYPE_11G);
- priv->abyBBVGA[0] = 0x20;
- priv->abyBBVGA[2] = 0x10;
- priv->abyBBVGA[3] = 0x10;
- bb_read_embedded(priv, 0xE7, &data);
- if (data == 0x1C)
- bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
-
- } else if (priv->byRFType == RF_UW2452) {
- MACvSetBBType(priv->port_offset, BB_TYPE_11A);
- priv->abyBBVGA[0] = 0x18;
- bb_read_embedded(priv, 0xE7, &data);
- if (data == 0x14) {
- bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
- bb_write_embedded(priv, 0xE1, 0x57);
- }
- } else {
- MACvSetBBType(priv->port_offset, BB_TYPE_11A);
- }
+ MACvSetBBType(priv->port_offset, BB_TYPE_11A);
bb_write_embedded(priv, 0x88, 0x03);
bySlot = C_SLOT_SHORT;
bySIFS = C_SIFS_A;
@@ -216,22 +195,6 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type)
byCWMaxMin = 0xA4;
} else if (bb_type == BB_TYPE_11B) {
MACvSetBBType(priv->port_offset, BB_TYPE_11B);
- if (priv->byRFType == RF_AIROHA7230) {
- priv->abyBBVGA[0] = 0x1C;
- priv->abyBBVGA[2] = 0x00;
- priv->abyBBVGA[3] = 0x00;
- bb_read_embedded(priv, 0xE7, &data);
- if (data == 0x20)
- bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
-
- } else if (priv->byRFType == RF_UW2452) {
- priv->abyBBVGA[0] = 0x14;
- bb_read_embedded(priv, 0xE7, &data);
- if (data == 0x18) {
- bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
- bb_write_embedded(priv, 0xE1, 0xD3);
- }
- }
bb_write_embedded(priv, 0x88, 0x02);
bySlot = C_SLOT_LONG;
bySIFS = C_SIFS_BG;
@@ -239,22 +202,6 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type)
byCWMaxMin = 0xA5;
} else { /* PK_TYPE_11GA & PK_TYPE_11GB */
MACvSetBBType(priv->port_offset, BB_TYPE_11G);
- if (priv->byRFType == RF_AIROHA7230) {
- priv->abyBBVGA[0] = 0x1C;
- priv->abyBBVGA[2] = 0x00;
- priv->abyBBVGA[3] = 0x00;
- bb_read_embedded(priv, 0xE7, &data);
- if (data == 0x20)
- bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
-
- } else if (priv->byRFType == RF_UW2452) {
- priv->abyBBVGA[0] = 0x14;
- bb_read_embedded(priv, 0xE7, &data);
- if (data == 0x18) {
- bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]);
- bb_write_embedded(priv, 0xE1, 0xD3);
- }
- }
bb_write_embedded(priv, 0x88, 0x08);
bySIFS = C_SIFS_BG;
@@ -417,7 +364,6 @@ void CARDbRadioPowerOff(struct vnt_private *priv)
case RF_AIROHA:
case RF_AL2230S:
- case RF_AIROHA7230:
MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL,
SOFTPWRCTL_SWPE2);
MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL,
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-03-05 21:32 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-05 21:31 [PATCH 0/4] staging: vt6655: Remove unused 5GHz support Philipp Hortmann
2022-03-05 21:32 ` [PATCH 1/4] staging: vt6655: Remove unused byRFType in channel.c Philipp Hortmann
2022-03-05 21:32 ` [PATCH 2/4] staging: vt6655: Remove unused byRFType in baseband.c Philipp Hortmann
2022-03-05 21:32 ` [PATCH 3/4] staging: vt6655: Remove unused byRFType in rf.c Philipp Hortmann
2022-03-05 21:32 ` [PATCH 4/4] staging: vt6655: Remove unused byRFType in card.c Philipp Hortmann
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).