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From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: Sakari Ailus <sakari.ailus@iki.fi>
Cc: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<frankc@nvidia.com>, <hverkuil@xs4all.nl>, <robh+dt@kernel.org>,
	<helen.koike@collabora.com>, <digetx@gmail.com>,
	<sboyd@kernel.org>, <gregkh@linuxfoundation.org>,
	<linux-media@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-i2c@vger.kernel.org>
Subject: Re: [RFC PATCH v1 10/18] dt-bindings: tegra: Document VI and CSI port nodes
Date: Wed, 10 Jun 2020 14:11:50 -0700	[thread overview]
Message-ID: <d0c7a45a-2d84-7f6c-b1dd-496098f91c49@nvidia.com> (raw)
In-Reply-To: <075d9d2e-eaa8-1895-8759-64c682fee1c4@nvidia.com>


On 6/10/20 8:15 AM, Sowjanya Komatineni wrote:
>
> On 6/10/20 4:23 AM, Sakari Ailus wrote:
>> Hi Sowjanya,
>>
>> Thanks for the patchset.
>>
>> On Tue, Jun 09, 2020 at 11:02:32PM -0700, Sowjanya Komatineni wrote:
>>> This patch documents Tegra VI and CSI port and endpoint nodes along
>>> with the other required properties.
>>>
>>> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
>>> ---
>>>   .../display/tegra/nvidia,tegra20-host1x.txt        | 87 
>>> ++++++++++++++++++++++
>>>   1 file changed, 87 insertions(+)
>>>
>>> diff --git 
>>> a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt 
>>> b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt 
>>>
>>> index 4731921..f70a838 100644
>>> --- 
>>> a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
>>> +++ 
>>> b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
>>> @@ -65,6 +65,48 @@ of the following host1x client modules:
>>>         - power-domains: Must include sor powergate node as csicil 
>>> is in
>>>           SOR partition.
>>>   +      Optional properties for csi node:
>> What hardware does the csi node represent? A CSI-2 receiver? Something
>> else?
>>
>> If you have two connections, you need two ports. The example isn't quite
>> clear on this; it would appear to represent a single physical interface.
>
> CS-2 receiver with 2 connections. one for sink with sensor to csi and 
> other as source with csi to Tegra vi.
>
> Was using separate port for sink and source and then I misunderstood 
> device graph document and changed to have multiple endpoints in same 
> port.
>
> Will update this in v2 to have separate port for each sink and source 
> endpoint in csi in dt and also in driver implementation.
>
>>> +
>>> +      - channel nodes: Max upto 6 channels/streams are supported 
>>> with each CSI
>>> +    brick can as either x4 or x2 based on hw connectivity to sensor.
>>> +
>>> +    Required properties:
>>> +    - reg: channel/stream index
>>> +    - nvidia,mipi-calibrate: Should contain a phandle and a specifier
>>> +      specifying which pads are used by this CSI port and need to be
>>> +      calibrated. See also ../display/tegra/nvidia,tegra114-mipi.txt.
>>> +
>>> +    - port: CSI port node and its endpoint nodes as per device graph
>>> +          bindings defined in 
>>> Documentation/devicetree/bindings/graph.txt.
>>> +      Required properties:
>> You have both properties and nodes here. Same for the above (port is a
>> node).
> Will update document to separate out port node from properties
>>
>>> +      - reg: csi port index based on hw csi lanes connectivity to the
>>> +        sensor.
>>> +      - bus-width: number of lanes used by this port. Supported lanes
>>> +        are 1/2/4.
>> bus-width belongs to the endpoint. Note that this is for parallel busses
>> only. If you need the number of lanes, the property is called 
>> data-lanes.
> Will update in v2 for having separate ports for sink and source 
> endpoints will move bus-width to endpoint.
Thanks Sakari. Will switch to use data-lanes property in csi ports end 
points in v2.
>>
>>> +      - endpoint@0: sink node
>>> +        Required properties:
>>> +        - reg: endpoint id. This is used to retrieve pad for creating
>>> +          media link
>>> +        - remote-endpoint: phandle to sensor endpoint
>>> +      - endpoint@1: source node
>>> +        - reg: endpoint id. This is used to retrieve pad for creating
>>> +          media link
>>> +        - remote-endpoint: phandle to vi port endpoint
>>> +
>>> +  Optional properties for vi node:
>>> +  - ports: Video port nodes and endpoint nodes as per device graph 
>>> bindings
>>> +    defined in Documentation/devicetree/bindings/graph.txt
>>> +    Max 6 ports are supported and each port should have one 
>>> endpoint node.
>>> +
>>> +    Required properties:
>>> +    - port: VI port node and its sink endpoint node
>>> +      Required properties:
>>> +    - reg: should match port index
>>> +    - endpoint@0: sink node
>>> +      Required properties:
>>> +      - reg: endpoint id must be 0
>>> +      - remote-endpoint: phandle to CSI endpoint node.
>>> +
>>>   - epp: encoder pre-processor
>>>       Required properties:
>>> @@ -340,6 +382,22 @@ Example:
>>>                 ranges = <0x0 0x0 0x54080000 0x2000>;
>>>   +            ports {
>>> +                #address-cells = <1>;
>>> +                #size-cells = <0>;
>>> +
>>> +                port@0 {
>>> +                    reg = <0>;
>>> +                    #address-cells = <1>;
>>> +                    #size-cells = <0>;
>>> +
>>> +                    imx219_vi_in0: endpoint@0 {
>>> +                        reg = <0>;
>>> +                        remote-endpoint = <&imx219_csi_out0>;
>>> +                    };
>>> +                };
>>> +            };
>>> +
>>>               csi@838 {
>>>                   compatible = "nvidia,tegra210-csi";
>>>                   reg = <0x838 0x1300>;
>>> @@ -362,6 +420,35 @@ Example:
>>>                        <&tegra_car TEGRA210_CLK_CSI_TPG>;
>>>                   clock-names = "csi", "cilab", "cilcd", "cile", 
>>> "csi_tpg";
>>>                   power-domains = <&pd_sor>;
>>> +
>>> +                #address-cells = <1>;
>>> +                #size-cells = <0>;
>>> +
>>> +                channel@0 {
>>> +                    reg = <0>;
>>> +                    nvidia,mipi-calibrate = <&mipi 0x001>;
>>> +
>>> +                    #address-cells = <1>;
>>> +                    #size-cells = <0>;
>>> +
>>> +                    port@0 {
>>> +                        reg = <0>;
>>> +                        bus-width = <2>;
>>> +
>>> +                        #address-cells = <1>;
>>> +                        #size-cells = <0>;
>>> +
>>> +                        imx219_csi_in0: endpoint@0 {
>>> +                            reg = <0>;
>>> +                            remote-endpoint = <&imx219_out0>;
>>> +                        };
>>> +
>>> +                        imx219_csi_out0: endpoint@1 {
>>> +                            reg = <1>;
>>> +                            remote-endpoint = <&imx219_vi_in0>;
>>> +                        };
>>> +                    };
>>> +                };
>>>               };
>>>           };

  reply	other threads:[~2020-06-10 21:11 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-10  6:02 [RFC PATCH v1 00/18] Support for Tegra video capture from external sensor Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 01/18] dt-bindings: i2c: tegra: Document Tegra210 VI I2C clocks and power-domains Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 02/18] arm64: tegra: Add missing clocks and power-domains to Tegra210 VI I2C Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 03/18] i2c: tegra: Don't mark VI I2C as IRQ safe runtime PM Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 04/18] i2c: tegra: Fix the error path in tegra_i2c_runtime_resume Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 05/18] i2c: tegra: Fix runtime resume to re-init VI I2C Sowjanya Komatineni
2020-06-10 13:14   ` Dmitry Osipenko
2020-06-10 16:58     ` Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 06/18] i2c: tegra: Avoid tegra_i2c_init_dma() for Tegra210 vi i2c Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 07/18] media: tegra-video: Fix channel format alignment Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 08/18] media: tegra-video: Enable TPG based on kernel config Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 09/18] media: tegra-video: Update format lookup to offset based Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 10/18] dt-bindings: tegra: Document VI and CSI port nodes Sowjanya Komatineni
2020-06-10 11:23   ` Sakari Ailus
2020-06-10 15:15     ` Sowjanya Komatineni
2020-06-10 21:11       ` Sowjanya Komatineni [this message]
2020-06-17 22:14   ` Rob Herring
2020-06-18 10:50     ` Thierry Reding
2020-06-10  6:02 ` [RFC PATCH v1 11/18] media: tegra-video: Add support for external sensor capture Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 12/18] media: tegra-video: Add support for selection ioctl ops Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 13/18] gpu: host1x: mipi: Add of_tegra_mipi_request() API Sowjanya Komatineni
2020-06-10 13:33   ` Dmitry Osipenko
2020-06-10 17:00     ` Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 14/18] gpu: host1x: mipi: Split tegra_mipi_calibrate and tegra_mipi_wait Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 15/18] media: tegra-video: Add CSI MIPI pads calibration Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 16/18] media: tegra-video: Compute settle times based on the clock rate Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 17/18] arm64: tegra: jetson-tx1: Add camera supplies Sowjanya Komatineni
2020-06-10  6:02 ` [RFC PATCH v1 18/18] arm64: tegra: Enable Tegra VI CSI support for Jetson Nano Sowjanya Komatineni

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