linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [RESEND PATCH 0/3] Add pwm-cells on STM32 LPTimer
@ 2018-02-23 13:36 Fabrice Gasnier
  2018-02-23 13:36 ` [RESEND PATCH 1/3] dt-bindings: pwm-stm32-lp: add #pwm-cells Fabrice Gasnier
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Fabrice Gasnier @ 2018-02-23 13:36 UTC (permalink / raw)
  To: thierry.reding, alexandre.torgue
  Cc: robh+dt, mark.rutland, linux, mcoquelin.stm32, fabrice.gasnier,
	devicetree, linux-arm-kernel, linux-kernel, linux-pwm,
	benjamin.gaignard

Add missing generic #pwm-cells on STM32 LPTimer to allow initialization
of channel, period and polarity.

Fabrice Gasnier (1):
  ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743

Gerald Baeza (2):
  dt-bindings: pwm-stm32-lp: add #pwm-cells
  pwm: stm32: LPTimer: use 3 cells xlate

 Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt | 3 +++
 arch/arm/boot/dts/stm32h743.dtsi                       | 5 +++++
 drivers/pwm/pwm-stm32-lp.c                             | 2 ++
 3 files changed, 10 insertions(+)

-- 
1.9.1

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [RESEND PATCH 1/3] dt-bindings: pwm-stm32-lp: add #pwm-cells
  2018-02-23 13:36 [RESEND PATCH 0/3] Add pwm-cells on STM32 LPTimer Fabrice Gasnier
@ 2018-02-23 13:36 ` Fabrice Gasnier
  2018-02-23 13:36 ` [RESEND PATCH 2/3] pwm: stm32: LPTimer: use 3 cells xlate Fabrice Gasnier
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 7+ messages in thread
From: Fabrice Gasnier @ 2018-02-23 13:36 UTC (permalink / raw)
  To: thierry.reding, alexandre.torgue
  Cc: robh+dt, mark.rutland, linux, mcoquelin.stm32, fabrice.gasnier,
	devicetree, linux-arm-kernel, linux-kernel, linux-pwm,
	benjamin.gaignard

From: Gerald Baeza <gerald.baeza@st.com>

STM32 Low-Power Timer supports generic 3 cells pwm to encode
PWM number, period and polarity.

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt
index f8338d1..bd23302 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt
@@ -7,6 +7,8 @@ See ../mfd/stm32-lptimer.txt for details about the parent node.
 
 Required parameters:
 - compatible:		Must be "st,stm32-pwm-lp".
+- #pwm-cells:		Should be set to 3. This PWM chip uses the default 3 cells
+			bindings defined in pwm.txt.
 
 Optional properties:
 - pinctrl-names: 	Set to "default".
@@ -18,6 +20,7 @@ Example:
 		...
 		pwm {
 			compatible = "st,stm32-pwm-lp";
+			#pwm-cells = <3>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&lppwm1_pins>;
 		};
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [RESEND PATCH 2/3] pwm: stm32: LPTimer: use 3 cells xlate
  2018-02-23 13:36 [RESEND PATCH 0/3] Add pwm-cells on STM32 LPTimer Fabrice Gasnier
  2018-02-23 13:36 ` [RESEND PATCH 1/3] dt-bindings: pwm-stm32-lp: add #pwm-cells Fabrice Gasnier
@ 2018-02-23 13:36 ` Fabrice Gasnier
  2018-03-23 15:22   ` Fabrice Gasnier
  2018-02-23 13:36 ` [RESEND PATCH 3/3] ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743 Fabrice Gasnier
  2018-03-27 22:57 ` [RESEND PATCH 0/3] Add pwm-cells on STM32 LPTimer Thierry Reding
  3 siblings, 1 reply; 7+ messages in thread
From: Fabrice Gasnier @ 2018-02-23 13:36 UTC (permalink / raw)
  To: thierry.reding, alexandre.torgue
  Cc: robh+dt, mark.rutland, linux, mcoquelin.stm32, fabrice.gasnier,
	devicetree, linux-arm-kernel, linux-kernel, linux-pwm,
	benjamin.gaignard

From: Gerald Baeza <gerald.baeza@st.com>

STM32 Low-Power Timer supports generic 3 cells pwm to encode
PWM number, period and polarity.

Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
 drivers/pwm/pwm-stm32-lp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
index 1ac9e43..346b7bd 100644
--- a/drivers/pwm/pwm-stm32-lp.c
+++ b/drivers/pwm/pwm-stm32-lp.c
@@ -203,6 +203,8 @@ static int stm32_pwm_lp_probe(struct platform_device *pdev)
 	priv->chip.dev = &pdev->dev;
 	priv->chip.ops = &stm32_pwm_lp_ops;
 	priv->chip.npwm = 1;
+	priv->chip.of_xlate = of_pwm_xlate_with_flags;
+	priv->chip.of_pwm_n_cells = 3;
 
 	ret = pwmchip_add(&priv->chip);
 	if (ret < 0)
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [RESEND PATCH 3/3] ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743
  2018-02-23 13:36 [RESEND PATCH 0/3] Add pwm-cells on STM32 LPTimer Fabrice Gasnier
  2018-02-23 13:36 ` [RESEND PATCH 1/3] dt-bindings: pwm-stm32-lp: add #pwm-cells Fabrice Gasnier
  2018-02-23 13:36 ` [RESEND PATCH 2/3] pwm: stm32: LPTimer: use 3 cells xlate Fabrice Gasnier
@ 2018-02-23 13:36 ` Fabrice Gasnier
  2018-05-03 15:38   ` Alexandre Torgue
  2018-03-27 22:57 ` [RESEND PATCH 0/3] Add pwm-cells on STM32 LPTimer Thierry Reding
  3 siblings, 1 reply; 7+ messages in thread
From: Fabrice Gasnier @ 2018-02-23 13:36 UTC (permalink / raw)
  To: thierry.reding, alexandre.torgue
  Cc: robh+dt, mark.rutland, linux, mcoquelin.stm32, fabrice.gasnier,
	devicetree, linux-arm-kernel, linux-kernel, linux-pwm,
	benjamin.gaignard

LPTimer pwm cells should be updated to 3, to allow initialization of
channel, period and polarity.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
 arch/arm/boot/dts/stm32h743.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index bbfcbac..40d7d76 100644
--- a/arch/arm/boot/dts/stm32h743.dtsi
+++ b/arch/arm/boot/dts/stm32h743.dtsi
@@ -85,6 +85,7 @@
 
 			pwm {
 				compatible = "st,stm32-pwm-lp";
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 
@@ -238,6 +239,7 @@
 
 			pwm {
 				compatible = "st,stm32-pwm-lp";
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 
@@ -264,6 +266,7 @@
 
 			pwm {
 				compatible = "st,stm32-pwm-lp";
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 
@@ -285,6 +288,7 @@
 
 			pwm {
 				compatible = "st,stm32-pwm-lp";
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 		};
@@ -300,6 +304,7 @@
 
 			pwm {
 				compatible = "st,stm32-pwm-lp";
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 		};
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [RESEND PATCH 2/3] pwm: stm32: LPTimer: use 3 cells xlate
  2018-02-23 13:36 ` [RESEND PATCH 2/3] pwm: stm32: LPTimer: use 3 cells xlate Fabrice Gasnier
@ 2018-03-23 15:22   ` Fabrice Gasnier
  0 siblings, 0 replies; 7+ messages in thread
From: Fabrice Gasnier @ 2018-03-23 15:22 UTC (permalink / raw)
  To: thierry.reding, alexandre.torgue
  Cc: robh+dt, mark.rutland, linux, mcoquelin.stm32, devicetree,
	linux-arm-kernel, linux-kernel, linux-pwm, benjamin.gaignard

On 02/23/2018 02:36 PM, Fabrice Gasnier wrote:
> From: Gerald Baeza <gerald.baeza@st.com>
> 
> STM32 Low-Power Timer supports generic 3 cells pwm to encode
> PWM number, period and polarity.
> 
> Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> ---
>  drivers/pwm/pwm-stm32-lp.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
> index 1ac9e43..346b7bd 100644
> --- a/drivers/pwm/pwm-stm32-lp.c
> +++ b/drivers/pwm/pwm-stm32-lp.c
> @@ -203,6 +203,8 @@ static int stm32_pwm_lp_probe(struct platform_device *pdev)
>  	priv->chip.dev = &pdev->dev;
>  	priv->chip.ops = &stm32_pwm_lp_ops;
>  	priv->chip.npwm = 1;
> +	priv->chip.of_xlate = of_pwm_xlate_with_flags;
> +	priv->chip.of_pwm_n_cells = 3;
>  
>  	ret = pwmchip_add(&priv->chip);
>  	if (ret < 0)
> 

Hi Thierry, all,

Gentle ping for driver review since DT Bindings has been reviewed by Rob.

Many thanks in advance,
Regards,
Fabrice

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [RESEND PATCH 0/3] Add pwm-cells on STM32 LPTimer
  2018-02-23 13:36 [RESEND PATCH 0/3] Add pwm-cells on STM32 LPTimer Fabrice Gasnier
                   ` (2 preceding siblings ...)
  2018-02-23 13:36 ` [RESEND PATCH 3/3] ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743 Fabrice Gasnier
@ 2018-03-27 22:57 ` Thierry Reding
  3 siblings, 0 replies; 7+ messages in thread
From: Thierry Reding @ 2018-03-27 22:57 UTC (permalink / raw)
  To: Fabrice Gasnier
  Cc: alexandre.torgue, robh+dt, mark.rutland, linux, mcoquelin.stm32,
	devicetree, linux-arm-kernel, linux-kernel, linux-pwm,
	benjamin.gaignard

[-- Attachment #1: Type: text/plain, Size: 676 bytes --]

On Fri, Feb 23, 2018 at 02:36:02PM +0100, Fabrice Gasnier wrote:
> Add missing generic #pwm-cells on STM32 LPTimer to allow initialization
> of channel, period and polarity.
> 
> Fabrice Gasnier (1):
>   ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743
> 
> Gerald Baeza (2):
>   dt-bindings: pwm-stm32-lp: add #pwm-cells
>   pwm: stm32: LPTimer: use 3 cells xlate
> 
>  Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt | 3 +++
>  arch/arm/boot/dts/stm32h743.dtsi                       | 5 +++++
>  drivers/pwm/pwm-stm32-lp.c                             | 2 ++
>  3 files changed, 10 insertions(+)

Applied patches 1 and 2, thanks.

Thierry

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [RESEND PATCH 3/3] ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743
  2018-02-23 13:36 ` [RESEND PATCH 3/3] ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743 Fabrice Gasnier
@ 2018-05-03 15:38   ` Alexandre Torgue
  0 siblings, 0 replies; 7+ messages in thread
From: Alexandre Torgue @ 2018-05-03 15:38 UTC (permalink / raw)
  To: Fabrice Gasnier, thierry.reding
  Cc: robh+dt, mark.rutland, linux, mcoquelin.stm32, devicetree,
	linux-arm-kernel, linux-kernel, linux-pwm, benjamin.gaignard

Hi Fabrice

On 02/23/2018 02:36 PM, Fabrice Gasnier wrote:
> LPTimer pwm cells should be updated to 3, to allow initialization of
> channel, period and polarity.
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> ---


Applied on stm32-next.

Thanks.
Alex


>   arch/arm/boot/dts/stm32h743.dtsi | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
> index bbfcbac..40d7d76 100644
> --- a/arch/arm/boot/dts/stm32h743.dtsi
> +++ b/arch/arm/boot/dts/stm32h743.dtsi
> @@ -85,6 +85,7 @@
>   
>   			pwm {
>   				compatible = "st,stm32-pwm-lp";
> +				#pwm-cells = <3>;
>   				status = "disabled";
>   			};
>   
> @@ -238,6 +239,7 @@
>   
>   			pwm {
>   				compatible = "st,stm32-pwm-lp";
> +				#pwm-cells = <3>;
>   				status = "disabled";
>   			};
>   
> @@ -264,6 +266,7 @@
>   
>   			pwm {
>   				compatible = "st,stm32-pwm-lp";
> +				#pwm-cells = <3>;
>   				status = "disabled";
>   			};
>   
> @@ -285,6 +288,7 @@
>   
>   			pwm {
>   				compatible = "st,stm32-pwm-lp";
> +				#pwm-cells = <3>;
>   				status = "disabled";
>   			};
>   		};
> @@ -300,6 +304,7 @@
>   
>   			pwm {
>   				compatible = "st,stm32-pwm-lp";
> +				#pwm-cells = <3>;
>   				status = "disabled";
>   			};
>   		};
> 

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2018-05-03 15:39 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-02-23 13:36 [RESEND PATCH 0/3] Add pwm-cells on STM32 LPTimer Fabrice Gasnier
2018-02-23 13:36 ` [RESEND PATCH 1/3] dt-bindings: pwm-stm32-lp: add #pwm-cells Fabrice Gasnier
2018-02-23 13:36 ` [RESEND PATCH 2/3] pwm: stm32: LPTimer: use 3 cells xlate Fabrice Gasnier
2018-03-23 15:22   ` Fabrice Gasnier
2018-02-23 13:36 ` [RESEND PATCH 3/3] ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743 Fabrice Gasnier
2018-05-03 15:38   ` Alexandre Torgue
2018-03-27 22:57 ` [RESEND PATCH 0/3] Add pwm-cells on STM32 LPTimer Thierry Reding

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).