* [PATCH v4 01/42] gpio: ep93xx: split device in multiple
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-18 7:37 ` Andy Shevchenko
2023-09-15 8:10 ` [PATCH v4 02/42] ARM: ep93xx: add swlocked prototypes Nikita Shubin via B4 Relay
` (42 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Hartley Sweeten, Alexander Sverdlin, Russell King,
Lukasz Majewski, Linus Walleij, Bartosz Golaszewski,
Andy Shevchenko
Cc: linux-arm-kernel, linux-kernel, linux-gpio, Arnd Bergmann,
Alexander Sverdlin, Bartosz Golaszewski
From: Nikita Shubin <nikita.shubin@maquefel.me>
Prepare ep93xx SOC gpio to convert into device tree driver:
- dropped banks and legacy defines
- split AB IRQ and make it shared
We are relying on IRQ number information A, B ports have single shared
IRQ, while F port have dedicated IRQ for each line.
Also we had to split single ep93xx platform_device into multiple, one
for each port, without this we can't do a full working transition from
legacy platform code into device tree capable. All GPIO_LOOKUP were
change to match new chip namings.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
arch/arm/mach-ep93xx/core.c | 121 +++++++++++--
arch/arm/mach-ep93xx/edb93xx.c | 2 +-
arch/arm/mach-ep93xx/ts72xx.c | 4 +-
arch/arm/mach-ep93xx/vision_ep9307.c | 10 +-
drivers/gpio/gpio-ep93xx.c | 325 +++++++++++++----------------------
5 files changed, 235 insertions(+), 227 deletions(-)
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 71b113976420..c81a2e84821b 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -35,6 +35,7 @@
#include <linux/reboot.h>
#include <linux/usb/ohci_pdriver.h>
#include <linux/random.h>
+#include <linux/ioport.h>
#include "hardware.h"
#include <linux/platform_data/video-ep93xx.h>
@@ -139,9 +140,80 @@ EXPORT_SYMBOL_GPL(ep93xx_chip_revision);
/*************************************************************************
* EP93xx GPIO
*************************************************************************/
-static struct resource ep93xx_gpio_resource[] = {
- DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
+/* port A */
+static struct resource ep93xx_a_gpio_resources[] = {
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE, 0x04, "data"),
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x10, 0x04, "dir"),
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x90, 0x1c, "intr"),
DEFINE_RES_IRQ(IRQ_EP93XX_GPIO_AB),
+};
+
+static struct platform_device ep93xx_a_gpio = {
+ .name = "gpio-ep93xx",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(ep93xx_a_gpio_resources),
+ .resource = ep93xx_a_gpio_resources,
+};
+
+/* port B */
+static struct resource ep93xx_b_gpio_resources[] = {
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x04, 0x04, "data"),
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x14, 0x04, "dir"),
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0xac, 0x1c, "intr"),
+ DEFINE_RES_IRQ(IRQ_EP93XX_GPIO_AB),
+};
+
+static struct platform_device ep93xx_b_gpio = {
+ .name = "gpio-ep93xx",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(ep93xx_b_gpio_resources),
+ .resource = ep93xx_b_gpio_resources,
+};
+
+/* port C */
+static struct resource ep93xx_c_gpio_resources[] = {
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x08, 0x04, "data"),
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x18, 0x04, "dir"),
+};
+
+static struct platform_device ep93xx_c_gpio = {
+ .name = "gpio-ep93xx",
+ .id = 2,
+ .num_resources = ARRAY_SIZE(ep93xx_c_gpio_resources),
+ .resource = ep93xx_c_gpio_resources,
+};
+
+/* port D */
+static struct resource ep93xx_d_gpio_resources[] = {
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x0c, 0x04, "data"),
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x1c, 0x04, "dir"),
+};
+
+static struct platform_device ep93xx_d_gpio = {
+ .name = "gpio-ep93xx",
+ .id = 3,
+ .num_resources = ARRAY_SIZE(ep93xx_d_gpio_resources),
+ .resource = ep93xx_d_gpio_resources,
+};
+
+/* port E */
+static struct resource ep93xx_e_gpio_resources[] = {
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x20, 0x04, "data"),
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x24, 0x04, "dir"),
+};
+
+static struct platform_device ep93xx_e_gpio = {
+ .name = "gpio-ep93xx",
+ .id = 4,
+ .num_resources = ARRAY_SIZE(ep93xx_e_gpio_resources),
+ .resource = ep93xx_e_gpio_resources,
+};
+
+/* port F */
+static struct resource ep93xx_f_gpio_resources[] = {
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x30, 0x04, "data"),
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x34, 0x04, "dir"),
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x4c, 0x1c, "intr"),
DEFINE_RES_IRQ(IRQ_EP93XX_GPIO0MUX),
DEFINE_RES_IRQ(IRQ_EP93XX_GPIO1MUX),
DEFINE_RES_IRQ(IRQ_EP93XX_GPIO2MUX),
@@ -152,11 +224,34 @@ static struct resource ep93xx_gpio_resource[] = {
DEFINE_RES_IRQ(IRQ_EP93XX_GPIO7MUX),
};
-static struct platform_device ep93xx_gpio_device = {
- .name = "gpio-ep93xx",
- .id = -1,
- .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
- .resource = ep93xx_gpio_resource,
+static struct platform_device ep93xx_f_gpio = {
+ .name = "gpio-ep93xx",
+ .id = 5,
+ .num_resources = ARRAY_SIZE(ep93xx_f_gpio_resources),
+ .resource = ep93xx_f_gpio_resources,
+};
+
+/* port G */
+static struct resource ep93xx_g_gpio_resources[] = {
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x38, 0x04, "data"),
+ DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x3c, 0x04, "dir"),
+};
+
+static struct platform_device ep93xx_g_gpio = {
+ .name = "gpio-ep93xx",
+ .id = 6,
+ .num_resources = ARRAY_SIZE(ep93xx_g_gpio_resources),
+ .resource = ep93xx_g_gpio_resources,
+};
+
+static struct platform_device *ep93xx_gpio_device[] __initdata = {
+ &ep93xx_a_gpio,
+ &ep93xx_b_gpio,
+ &ep93xx_c_gpio,
+ &ep93xx_d_gpio,
+ &ep93xx_e_gpio,
+ &ep93xx_f_gpio,
+ &ep93xx_g_gpio,
};
/*************************************************************************
@@ -335,9 +430,9 @@ static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = {
.dev_id = "i2c-gpio.0",
.table = {
/* Use local offsets on gpiochip/port "G" */
- GPIO_LOOKUP_IDX("G", 1, NULL, 0,
+ GPIO_LOOKUP_IDX("gpio-ep93xx.6", 1, NULL, 0,
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
- GPIO_LOOKUP_IDX("G", 0, NULL, 1,
+ GPIO_LOOKUP_IDX("gpio-ep93xx.6", 0, NULL, 1,
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
},
};
@@ -440,8 +535,8 @@ static struct gpiod_lookup_table ep93xx_leds_gpio_table = {
.dev_id = "leds-gpio",
.table = {
/* Use local offsets on gpiochip/port "E" */
- GPIO_LOOKUP_IDX("E", 0, NULL, 0, GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP_IDX("E", 1, NULL, 1, GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP_IDX("gpio-ep93xx.4", 0, NULL, 0, GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP_IDX("gpio-ep93xx.4", 1, NULL, 1, GPIO_ACTIVE_HIGH),
{ }
},
};
@@ -974,6 +1069,7 @@ static struct device __init *ep93xx_init_soc(void)
struct device __init *ep93xx_init_devices(void)
{
struct device *parent;
+ unsigned int i;
/* Disallow access to MaverickCrunch initially */
ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
@@ -988,7 +1084,8 @@ struct device __init *ep93xx_init_devices(void)
parent = ep93xx_init_soc();
/* Get the GPIO working early, other devices need it */
- platform_device_register(&ep93xx_gpio_device);
+ for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_device); i++)
+ platform_device_register(ep93xx_gpio_device[i]);
amba_device_register(&uart1_device, &iomem_resource);
amba_device_register(&uart2_device, &iomem_resource);
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index 4b90899a66e9..c1e880946f72 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -105,7 +105,7 @@ static struct spi_board_info edb93xx_spi_board_info[] __initdata = {
static struct gpiod_lookup_table edb93xx_spi_cs_gpio_table = {
.dev_id = "spi0",
.table = {
- GPIO_LOOKUP("A", 6, "cs", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("gpio-ep93xx.0", 6, "cs", GPIO_ACTIVE_LOW),
{ },
},
};
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index d3de7283ecb3..0bbdf587c685 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -268,7 +268,7 @@ static struct spi_board_info bk3_spi_board_info[] __initdata = {
static struct gpiod_lookup_table bk3_spi_cs_gpio_table = {
.dev_id = "spi0",
.table = {
- GPIO_LOOKUP("F", 3, "cs", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("gpio-ep93xx.5", 3, "cs", GPIO_ACTIVE_LOW),
{ },
},
};
@@ -318,7 +318,7 @@ static struct gpiod_lookup_table ts72xx_spi_cs_gpio_table = {
.dev_id = "spi0",
.table = {
/* DIO_17 */
- GPIO_LOOKUP("F", 2, "cs", GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP("gpio-ep93xx.5", 2, "cs", GPIO_ACTIVE_LOW),
{ },
},
};
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index 30d9cf3791eb..020223b0be2b 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -206,9 +206,9 @@ static struct gpiod_lookup_table vision_spi_mmc_gpio_table = {
.dev_id = "mmc_spi.2", /* "mmc_spi @ CS2 */
.table = {
/* Card detect */
- GPIO_LOOKUP_IDX("B", 7, NULL, 0, GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP_IDX("gpio-ep93xx.1", 7, NULL, 0, GPIO_ACTIVE_LOW),
/* Write protect */
- GPIO_LOOKUP_IDX("F", 0, NULL, 1, GPIO_ACTIVE_HIGH),
+ GPIO_LOOKUP_IDX("gpio-ep93xx.5", 0, NULL, 1, GPIO_ACTIVE_HIGH),
{ },
},
};
@@ -244,9 +244,9 @@ static struct spi_board_info vision_spi_board_info[] __initdata = {
static struct gpiod_lookup_table vision_spi_cs_gpio_table = {
.dev_id = "spi0",
.table = {
- GPIO_LOOKUP_IDX("A", 6, "cs", 0, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("A", 7, "cs", 1, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("G", 2, "cs", 2, GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP_IDX("gpio-ep93xx.0", 6, "cs", 0, GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP_IDX("gpio-ep93xx.0", 7, "cs", 1, GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP_IDX("gpio-ep93xx.6", 2, "cs", 2, GPIO_ACTIVE_LOW),
{ },
},
};
diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c
index 6cedf46efec6..a55f635585f4 100644
--- a/drivers/gpio/gpio-ep93xx.c
+++ b/drivers/gpio/gpio-ep93xx.c
@@ -18,30 +18,10 @@
#include <linux/gpio/driver.h>
#include <linux/bitops.h>
#include <linux/seq_file.h>
-
-#define EP93XX_GPIO_F_INT_STATUS 0x5c
-#define EP93XX_GPIO_A_INT_STATUS 0xa0
-#define EP93XX_GPIO_B_INT_STATUS 0xbc
-
-/* Maximum value for gpio line identifiers */
-#define EP93XX_GPIO_LINE_MAX 63
-
-/* Number of GPIO chips in EP93XX */
-#define EP93XX_GPIO_CHIP_NUM 8
-
-/* Maximum value for irq capable line identifiers */
-#define EP93XX_GPIO_LINE_MAX_IRQ 23
-
-#define EP93XX_GPIO_A_IRQ_BASE 64
-#define EP93XX_GPIO_B_IRQ_BASE 72
-/*
- * Static mapping of GPIO bank F IRQS:
- * F0..F7 (16..24) to irq 80..87.
- */
-#define EP93XX_GPIO_F_IRQ_BASE 80
+#include <linux/interrupt.h>
struct ep93xx_gpio_irq_chip {
- u8 irq_offset;
+ void __iomem *base;
u8 int_unmasked;
u8 int_enabled;
u8 int_type1;
@@ -50,15 +30,11 @@ struct ep93xx_gpio_irq_chip {
};
struct ep93xx_gpio_chip {
+ void __iomem *base;
struct gpio_chip gc;
struct ep93xx_gpio_irq_chip *eic;
};
-struct ep93xx_gpio {
- void __iomem *base;
- struct ep93xx_gpio_chip gc[EP93XX_GPIO_CHIP_NUM];
-};
-
#define to_ep93xx_gpio_chip(x) container_of(x, struct ep93xx_gpio_chip, gc)
static struct ep93xx_gpio_irq_chip *to_ep93xx_gpio_irq_chip(struct gpio_chip *gc)
@@ -79,25 +55,23 @@ static struct ep93xx_gpio_irq_chip *to_ep93xx_gpio_irq_chip(struct gpio_chip *gc
#define EP93XX_INT_RAW_STATUS_OFFSET 0x14
#define EP93XX_INT_DEBOUNCE_OFFSET 0x18
-static void ep93xx_gpio_update_int_params(struct ep93xx_gpio *epg,
- struct ep93xx_gpio_irq_chip *eic)
+static void ep93xx_gpio_update_int_params(struct ep93xx_gpio_irq_chip *eic)
{
- writeb_relaxed(0, epg->base + eic->irq_offset + EP93XX_INT_EN_OFFSET);
+ writeb_relaxed(0, eic->base + EP93XX_INT_EN_OFFSET);
writeb_relaxed(eic->int_type2,
- epg->base + eic->irq_offset + EP93XX_INT_TYPE2_OFFSET);
+ eic->base + EP93XX_INT_TYPE2_OFFSET);
writeb_relaxed(eic->int_type1,
- epg->base + eic->irq_offset + EP93XX_INT_TYPE1_OFFSET);
+ eic->base + EP93XX_INT_TYPE1_OFFSET);
writeb_relaxed(eic->int_unmasked & eic->int_enabled,
- epg->base + eic->irq_offset + EP93XX_INT_EN_OFFSET);
+ eic->base + EP93XX_INT_EN_OFFSET);
}
static void ep93xx_gpio_int_debounce(struct gpio_chip *gc,
unsigned int offset, bool enable)
{
- struct ep93xx_gpio *epg = gpiochip_get_data(gc);
struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
int port_mask = BIT(offset);
@@ -106,53 +80,43 @@ static void ep93xx_gpio_int_debounce(struct gpio_chip *gc,
else
eic->int_debounce &= ~port_mask;
- writeb(eic->int_debounce,
- epg->base + eic->irq_offset + EP93XX_INT_DEBOUNCE_OFFSET);
+ writeb(eic->int_debounce, eic->base + EP93XX_INT_DEBOUNCE_OFFSET);
}
-static void ep93xx_gpio_ab_irq_handler(struct irq_desc *desc)
+static u32 ep93xx_gpio_ab_irq_handler(struct gpio_chip *gc)
{
- struct gpio_chip *gc = irq_desc_get_handler_data(desc);
- struct ep93xx_gpio *epg = gpiochip_get_data(gc);
- struct irq_chip *irqchip = irq_desc_get_chip(desc);
+ struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
unsigned long stat;
int offset;
- chained_irq_enter(irqchip, desc);
-
- /*
- * Dispatch the IRQs to the irqdomain of each A and B
- * gpiochip irqdomains depending on what has fired.
- * The tricky part is that the IRQ line is shared
- * between bank A and B and each has their own gpiochip.
- */
- stat = readb(epg->base + EP93XX_GPIO_A_INT_STATUS);
+ stat = readb(eic->base + EP93XX_INT_STATUS_OFFSET);
for_each_set_bit(offset, &stat, 8)
- generic_handle_domain_irq(epg->gc[0].gc.irq.domain,
- offset);
+ generic_handle_domain_irq(gc->irq.domain, offset);
- stat = readb(epg->base + EP93XX_GPIO_B_INT_STATUS);
- for_each_set_bit(offset, &stat, 8)
- generic_handle_domain_irq(epg->gc[1].gc.irq.domain,
- offset);
+ return stat;
+}
- chained_irq_exit(irqchip, desc);
+static irqreturn_t ep93xx_ab_irq_handler(int irq, void *dev_id)
+{
+ return IRQ_RETVAL(ep93xx_gpio_ab_irq_handler(dev_id));
}
static void ep93xx_gpio_f_irq_handler(struct irq_desc *desc)
{
- /*
- * map discontiguous hw irq range to continuous sw irq range:
- *
- * IRQ_EP93XX_GPIO{0..7}MUX -> EP93XX_GPIO_LINE_F{0..7}
- */
struct irq_chip *irqchip = irq_desc_get_chip(desc);
- unsigned int irq = irq_desc_get_irq(desc);
- int port_f_idx = (irq & 7) ^ 4; /* {20..23,48..51} -> {0..7} */
- int gpio_irq = EP93XX_GPIO_F_IRQ_BASE + port_f_idx;
+ struct gpio_chip *gc = irq_desc_get_handler_data(desc);
+ struct gpio_irq_chip *gic = &gc->irq;
+ unsigned int parent = irq_desc_get_irq(desc);
+ unsigned int i;
chained_irq_enter(irqchip, desc);
- generic_handle_irq(gpio_irq);
+ for (i = 0; i < gic->num_parents; i++)
+ if (gic->parents[i] == parent)
+ break;
+
+ if (i < gic->num_parents)
+ generic_handle_domain_irq(gc->irq.domain, i);
+
chained_irq_exit(irqchip, desc);
}
@@ -160,31 +124,29 @@ static void ep93xx_gpio_irq_ack(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
- struct ep93xx_gpio *epg = gpiochip_get_data(gc);
- int port_mask = BIT(d->irq & 7);
+ int port_mask = BIT(irqd_to_hwirq(d));
if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
eic->int_type2 ^= port_mask; /* switch edge direction */
- ep93xx_gpio_update_int_params(epg, eic);
+ ep93xx_gpio_update_int_params(eic);
}
- writeb(port_mask, epg->base + eic->irq_offset + EP93XX_INT_EOI_OFFSET);
+ writeb(port_mask, eic->base + EP93XX_INT_EOI_OFFSET);
}
static void ep93xx_gpio_irq_mask_ack(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
- struct ep93xx_gpio *epg = gpiochip_get_data(gc);
- int port_mask = BIT(d->irq & 7);
+ int port_mask = BIT(irqd_to_hwirq(d));
if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH)
eic->int_type2 ^= port_mask; /* switch edge direction */
eic->int_unmasked &= ~port_mask;
- ep93xx_gpio_update_int_params(epg, eic);
+ ep93xx_gpio_update_int_params(eic);
- writeb(port_mask, epg->base + eic->irq_offset + EP93XX_INT_EOI_OFFSET);
+ writeb(port_mask, eic->base + EP93XX_INT_EOI_OFFSET);
gpiochip_disable_irq(gc, irqd_to_hwirq(d));
}
@@ -192,10 +154,9 @@ static void ep93xx_gpio_irq_mask(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
- struct ep93xx_gpio *epg = gpiochip_get_data(gc);
- eic->int_unmasked &= ~BIT(d->irq & 7);
- ep93xx_gpio_update_int_params(epg, eic);
+ eic->int_unmasked &= ~BIT(irqd_to_hwirq(d));
+ ep93xx_gpio_update_int_params(eic);
gpiochip_disable_irq(gc, irqd_to_hwirq(d));
}
@@ -203,11 +164,10 @@ static void ep93xx_gpio_irq_unmask(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
- struct ep93xx_gpio *epg = gpiochip_get_data(gc);
gpiochip_enable_irq(gc, irqd_to_hwirq(d));
- eic->int_unmasked |= BIT(d->irq & 7);
- ep93xx_gpio_update_int_params(epg, eic);
+ eic->int_unmasked |= BIT(irqd_to_hwirq(d));
+ ep93xx_gpio_update_int_params(eic);
}
/*
@@ -219,8 +179,7 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
- struct ep93xx_gpio *epg = gpiochip_get_data(gc);
- int offset = d->irq & 7;
+ irq_hw_number_t offset = irqd_to_hwirq(d);
int port_mask = BIT(offset);
irq_flow_handler_t handler;
@@ -264,51 +223,11 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type)
eic->int_enabled |= port_mask;
- ep93xx_gpio_update_int_params(epg, eic);
+ ep93xx_gpio_update_int_params(eic);
return 0;
}
-/*************************************************************************
- * gpiolib interface for EP93xx on-chip GPIOs
- *************************************************************************/
-struct ep93xx_gpio_bank {
- const char *label;
- int data;
- int dir;
- int irq;
- int base;
- bool has_irq;
- bool has_hierarchical_irq;
- unsigned int irq_base;
-};
-
-#define EP93XX_GPIO_BANK(_label, _data, _dir, _irq, _base, _has_irq, _has_hier, _irq_base) \
- { \
- .label = _label, \
- .data = _data, \
- .dir = _dir, \
- .irq = _irq, \
- .base = _base, \
- .has_irq = _has_irq, \
- .has_hierarchical_irq = _has_hier, \
- .irq_base = _irq_base, \
- }
-
-static struct ep93xx_gpio_bank ep93xx_gpio_banks[] = {
- /* Bank A has 8 IRQs */
- EP93XX_GPIO_BANK("A", 0x00, 0x10, 0x90, 0, true, false, EP93XX_GPIO_A_IRQ_BASE),
- /* Bank B has 8 IRQs */
- EP93XX_GPIO_BANK("B", 0x04, 0x14, 0xac, 8, true, false, EP93XX_GPIO_B_IRQ_BASE),
- EP93XX_GPIO_BANK("C", 0x08, 0x18, 0x00, 40, false, false, 0),
- EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 0x00, 24, false, false, 0),
- EP93XX_GPIO_BANK("E", 0x20, 0x24, 0x00, 32, false, false, 0),
- /* Bank F has 8 IRQs */
- EP93XX_GPIO_BANK("F", 0x30, 0x34, 0x4c, 16, false, true, EP93XX_GPIO_F_IRQ_BASE),
- EP93XX_GPIO_BANK("G", 0x38, 0x3c, 0x00, 48, false, false, 0),
- EP93XX_GPIO_BANK("H", 0x40, 0x44, 0x00, 56, false, false, 0),
-};
-
static int ep93xx_gpio_set_config(struct gpio_chip *gc, unsigned offset,
unsigned long config)
{
@@ -342,110 +261,102 @@ static const struct irq_chip gpio_eic_irq_chip = {
GPIOCHIP_IRQ_RESOURCE_HELPERS,
};
-static int ep93xx_gpio_add_bank(struct ep93xx_gpio_chip *egc,
- struct platform_device *pdev,
- struct ep93xx_gpio *epg,
- struct ep93xx_gpio_bank *bank)
+static int ep93xx_setup_irqs(struct platform_device *pdev,
+ struct ep93xx_gpio_chip *egc)
{
- void __iomem *data = epg->base + bank->data;
- void __iomem *dir = epg->base + bank->dir;
struct gpio_chip *gc = &egc->gc;
struct device *dev = &pdev->dev;
- struct gpio_irq_chip *girq;
- int err;
-
- err = bgpio_init(gc, dev, 1, data, NULL, NULL, dir, NULL, 0);
- if (err)
- return err;
-
- gc->label = bank->label;
- gc->base = bank->base;
-
- girq = &gc->irq;
- if (bank->has_irq || bank->has_hierarchical_irq) {
- gc->set_config = ep93xx_gpio_set_config;
- egc->eic = devm_kcalloc(dev, 1,
- sizeof(*egc->eic),
- GFP_KERNEL);
- if (!egc->eic)
- return -ENOMEM;
- egc->eic->irq_offset = bank->irq;
- gpio_irq_chip_set_chip(girq, &gpio_eic_irq_chip);
- }
+ struct gpio_irq_chip *girq = &gc->irq;
+ int ret, irq, i;
+ void __iomem *intr;
- if (bank->has_irq) {
- int ab_parent_irq = platform_get_irq(pdev, 0);
-
- girq->parent_handler = ep93xx_gpio_ab_irq_handler;
- girq->num_parents = 1;
- girq->parents = devm_kcalloc(dev, girq->num_parents,
- sizeof(*girq->parents),
- GFP_KERNEL);
- if (!girq->parents)
- return -ENOMEM;
- girq->default_type = IRQ_TYPE_NONE;
- girq->handler = handle_level_irq;
- girq->parents[0] = ab_parent_irq;
- girq->first = bank->irq_base;
- }
+ intr = devm_platform_ioremap_resource_byname(pdev, "intr");
+ if (IS_ERR(intr))
+ return PTR_ERR(intr);
+
+ gc->set_config = ep93xx_gpio_set_config;
+ egc->eic = devm_kzalloc(dev, sizeof(*egc->eic), GFP_KERNEL);
+ if (!egc->eic)
+ return -ENOMEM;
- /* Only bank F has especially funky IRQ handling */
- if (bank->has_hierarchical_irq) {
- int gpio_irq;
- int i;
+ egc->eic->base = intr;
+ gpio_irq_chip_set_chip(girq, &gpio_eic_irq_chip);
+ girq->num_parents = platform_irq_count(pdev);
+ if (girq->num_parents == 0)
+ return -EINVAL;
+
+ girq->parents = devm_kcalloc(dev, girq->num_parents,
+ sizeof(*girq->parents),
+ GFP_KERNEL);
+ if (!girq->parents)
+ return -ENOMEM;
- /*
- * FIXME: convert this to use hierarchical IRQ support!
- * this requires fixing the root irqchip to be hierarchical.
- */
+ if (girq->num_parents == 1) { /* A/B irqchips */
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+
+ ret = devm_request_irq(dev, irq, ep93xx_ab_irq_handler,
+ IRQF_SHARED, gc->label, gc);
+ if (ret)
+ return dev_err_probe(dev, ret, "requesting IRQ: %d\n", irq);
+
+ girq->parents[0] = irq;
+ } else { /* F irqchip */
girq->parent_handler = ep93xx_gpio_f_irq_handler;
- girq->num_parents = 8;
- girq->parents = devm_kcalloc(dev, girq->num_parents,
- sizeof(*girq->parents),
- GFP_KERNEL);
- if (!girq->parents)
- return -ENOMEM;
- /* Pick resources 1..8 for these IRQs */
+
for (i = 0; i < girq->num_parents; i++) {
- girq->parents[i] = platform_get_irq(pdev, i + 1);
- gpio_irq = bank->irq_base + i;
- irq_set_chip_data(gpio_irq, &epg->gc[5]);
- irq_set_chip_and_handler(gpio_irq,
- girq->chip,
- handle_level_irq);
- irq_clear_status_flags(gpio_irq, IRQ_NOREQUEST);
+ irq = platform_get_irq(pdev, i);
+ if (irq < 0)
+ continue;
+
+ girq->parents[i] = irq;
}
- girq->default_type = IRQ_TYPE_NONE;
- girq->handler = handle_level_irq;
- girq->first = bank->irq_base;
+
+ girq->map = girq->parents;
}
- return devm_gpiochip_add_data(dev, gc, epg);
+ girq->default_type = IRQ_TYPE_NONE;
+ /* TODO: replace with handle_bad_irq() once we are fully hierarchical */
+ girq->handler = handle_simple_irq;
+
+ return 0;
}
static int ep93xx_gpio_probe(struct platform_device *pdev)
{
- struct ep93xx_gpio *epg;
- int i;
-
- epg = devm_kzalloc(&pdev->dev, sizeof(*epg), GFP_KERNEL);
- if (!epg)
+ struct ep93xx_gpio_chip *egc;
+ struct gpio_chip *gc;
+ void __iomem *data;
+ void __iomem *dir;
+ int ret;
+
+ egc = devm_kzalloc(&pdev->dev, sizeof(*egc), GFP_KERNEL);
+ if (!egc)
return -ENOMEM;
- epg->base = devm_platform_ioremap_resource(pdev, 0);
- if (IS_ERR(epg->base))
- return PTR_ERR(epg->base);
-
- for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) {
- struct ep93xx_gpio_chip *gc = &epg->gc[i];
- struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i];
-
- if (ep93xx_gpio_add_bank(gc, pdev, epg, bank))
- dev_warn(&pdev->dev, "Unable to add gpio bank %s\n",
- bank->label);
+ data = devm_platform_ioremap_resource_byname(pdev, "data");
+ if (IS_ERR(data))
+ return PTR_ERR(data);
+
+ dir = devm_platform_ioremap_resource_byname(pdev, "dir");
+ if (IS_ERR(dir))
+ return PTR_ERR(dir);
+
+ gc = &egc->gc;
+ ret = bgpio_init(gc, &pdev->dev, 1, data, NULL, NULL, dir, NULL, 0);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret, "unable to init generic GPIO\n");
+
+ gc->label = dev_name(&pdev->dev);
+ if (platform_irq_count(pdev) > 0) {
+ dev_dbg(&pdev->dev, "setting up irqs for %s\n", dev_name(&pdev->dev));
+ ret = ep93xx_setup_irqs(pdev, egc);
+ if (ret)
+ dev_err_probe(&pdev->dev, ret, "setup irqs failed");
}
- return 0;
+ return devm_gpiochip_add_data(&pdev->dev, gc, egc);
}
static struct platform_driver ep93xx_gpio_driver = {
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 01/42] gpio: ep93xx: split device in multiple
2023-09-15 8:10 ` [PATCH v4 01/42] gpio: ep93xx: split device in multiple Nikita Shubin via B4 Relay
@ 2023-09-18 7:37 ` Andy Shevchenko
0 siblings, 0 replies; 78+ messages in thread
From: Andy Shevchenko @ 2023-09-18 7:37 UTC (permalink / raw)
To: nikita.shubin
Cc: Hartley Sweeten, Alexander Sverdlin, Russell King,
Lukasz Majewski, Linus Walleij, Bartosz Golaszewski,
linux-arm-kernel, linux-kernel, linux-gpio, Arnd Bergmann,
Bartosz Golaszewski
On Fri, Sep 15, 2023 at 11:10:43AM +0300, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Prepare ep93xx SOC gpio to convert into device tree driver:
> - dropped banks and legacy defines
> - split AB IRQ and make it shared
>
> We are relying on IRQ number information A, B ports have single shared
> IRQ, while F port have dedicated IRQ for each line.
>
> Also we had to split single ep93xx platform_device into multiple, one
> for each port, without this we can't do a full working transition from
> legacy platform code into device tree capable. All GPIO_LOOKUP were
> change to match new chip namings.
...
> #include <linux/reboot.h>
> #include <linux/usb/ohci_pdriver.h>
> #include <linux/random.h>
> +#include <linux/ioport.h>
Can it be squeezed to the most ordered part?
...
> +static struct resource ep93xx_a_gpio_resources[] = {
> + DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE, 0x04, "data"),
You can also use " + 0x00", but it's up to you.
> + DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x10, 0x04, "dir"),
> + DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x90, 0x1c, "intr"),
> DEFINE_RES_IRQ(IRQ_EP93XX_GPIO_AB),
> +};
...
> .dev_id = "i2c-gpio.0",
> .table = {
> /* Use local offsets on gpiochip/port "G" */
> - GPIO_LOOKUP_IDX("G", 1, NULL, 0,
> + GPIO_LOOKUP_IDX("gpio-ep93xx.6", 1, NULL, 0,
> GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
> - GPIO_LOOKUP_IDX("G", 0, NULL, 1,
> + GPIO_LOOKUP_IDX("gpio-ep93xx.6", 0, NULL, 1,
> GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
Here the terminator is missing, I believe you need to have a separate fix patch
done first to prepend this one.
> },
...
> #include <linux/seq_file.h>
> +#include <linux/interrupt.h>
Please, squeeze this to the most sorted part.
...
> static void ep93xx_gpio_irq_mask_ack(struct irq_data *d)
> {
> struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
> - struct ep93xx_gpio *epg = gpiochip_get_data(gc);
> - int port_mask = BIT(d->irq & 7);
irq_hw_number_t hwirq = irqd_to_hwirq(d);
> + int port_mask = BIT(hwirq);
>
> if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH)
> eic->int_type2 ^= port_mask; /* switch edge direction */
>
> eic->int_unmasked &= ~port_mask;
> - ep93xx_gpio_update_int_params(epg, eic);
> + ep93xx_gpio_update_int_params(eic);
>
> - writeb(port_mask, epg->base + eic->irq_offset + EP93XX_INT_EOI_OFFSET);
> + writeb(port_mask, eic->base + EP93XX_INT_EOI_OFFSET);
> gpiochip_disable_irq(gc, irqd_to_hwirq(d));
gpiochip_disable_irq(gc, hwirq);
> }
...
> {
> struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
> - struct ep93xx_gpio *epg = gpiochip_get_data(gc);
>
> - eic->int_unmasked &= ~BIT(d->irq & 7);
> - ep93xx_gpio_update_int_params(epg, eic);
> + eic->int_unmasked &= ~BIT(irqd_to_hwirq(d));
> + ep93xx_gpio_update_int_params(eic);
> gpiochip_disable_irq(gc, irqd_to_hwirq(d));
> }
As per above.
...
> @@ -203,11 +164,10 @@ static void ep93xx_gpio_irq_unmask(struct irq_data *d)
> {
> struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> struct ep93xx_gpio_irq_chip *eic = to_ep93xx_gpio_irq_chip(gc);
> - struct ep93xx_gpio *epg = gpiochip_get_data(gc);
>
> gpiochip_enable_irq(gc, irqd_to_hwirq(d));
> - eic->int_unmasked |= BIT(d->irq & 7);
> - ep93xx_gpio_update_int_params(epg, eic);
> + eic->int_unmasked |= BIT(irqd_to_hwirq(d));
> + ep93xx_gpio_update_int_params(eic);
> }
As per above.
...
> + irq_hw_number_t offset = irqd_to_hwirq(d);
(or use hwirq name to be consistent in the code).
...
> + girq->parents = devm_kcalloc(dev, girq->num_parents,
> + sizeof(*girq->parents),
I would put this one to the previous line.
> + GFP_KERNEL);
> + if (!girq->parents)
> + return -ENOMEM;
...
> + irq = platform_get_irq(pdev, i);
This will issue a warning or error message if IRQ is not found...
> + if (irq < 0)
> + continue;
...but this suggests that that is optional. Hence
irq = platform_get_irq_optional(pdev, i);
?
...
> + if (platform_irq_count(pdev) > 0) {
> + dev_dbg(&pdev->dev, "setting up irqs for %s\n", dev_name(&pdev->dev));
> + ret = ep93xx_setup_irqs(pdev, egc);
> + if (ret)
> + dev_err_probe(&pdev->dev, ret, "setup irqs failed");
Hmm... Missing return?
> }
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 02/42] ARM: ep93xx: add swlocked prototypes
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
2023-09-15 8:10 ` [PATCH v4 01/42] gpio: ep93xx: split device in multiple Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-16 15:38 ` Alexander Sverdlin
2023-09-15 8:10 ` [PATCH v4 03/42] dt-bindings: clock: Add Cirrus EP93xx Nikita Shubin via B4 Relay
` (41 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Nikita Shubin, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Sergey Shtylyov
Cc: Dmitry Torokhov, Damien Le Moal, Alexander Sverdlin,
linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add ep93xx_regmap_write and ep93xx_regmap_update_bits to make drivers
compilable before actual implementation is added.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
include/linux/soc/cirrus/ep93xx.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/include/linux/soc/cirrus/ep93xx.h b/include/linux/soc/cirrus/ep93xx.h
index 56fbe2dc59b1..8b4b8221ed4c 100644
--- a/include/linux/soc/cirrus/ep93xx.h
+++ b/include/linux/soc/cirrus/ep93xx.h
@@ -3,6 +3,7 @@
#define _SOC_EP93XX_H
struct platform_device;
+struct regmap;
#define EP93XX_CHIP_REV_D0 3
#define EP93XX_CHIP_REV_D1 4
@@ -34,4 +35,9 @@ static inline unsigned int ep93xx_chip_revision(void) { return 0; }
#endif
+static inline void ep93xx_regmap_write(struct regmap *map, unsigned int reg, unsigned int val) {}
+static inline void ep93xx_regmap_update_bits(struct regmap *map, unsigned int reg,
+ unsigned int mask, unsigned int val)
+{ }
+
#endif
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 02/42] ARM: ep93xx: add swlocked prototypes
2023-09-15 8:10 ` [PATCH v4 02/42] ARM: ep93xx: add swlocked prototypes Nikita Shubin via B4 Relay
@ 2023-09-16 15:38 ` Alexander Sverdlin
2023-09-18 13:04 ` Alexander Sverdlin
0 siblings, 1 reply; 78+ messages in thread
From: Alexander Sverdlin @ 2023-09-16 15:38 UTC (permalink / raw)
To: nikita.shubin, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Sergey Shtylyov
Cc: Dmitry Torokhov, Damien Le Moal, linux-kernel, Arnd Bergmann
Hi Nikita!
On Fri, 2023-09-15 at 11:10 +0300, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add ep93xx_regmap_write and ep93xx_regmap_update_bits to make drivers
> compilable before actual implementation is added.
It should be possible to re-arrange the patch series so that real
implementation comes before the drivers using it.
We must assure that bisecting the kernel tree is possible, that
means no matter which (initial) part of your series is applied, there is no
regression allowed.
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
> include/linux/soc/cirrus/ep93xx.h | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/include/linux/soc/cirrus/ep93xx.h b/include/linux/soc/cirrus/ep93xx.h
> index 56fbe2dc59b1..8b4b8221ed4c 100644
> --- a/include/linux/soc/cirrus/ep93xx.h
> +++ b/include/linux/soc/cirrus/ep93xx.h
> @@ -3,6 +3,7 @@
> #define _SOC_EP93XX_H
>
> struct platform_device;
> +struct regmap;
>
> #define EP93XX_CHIP_REV_D0 3
> #define EP93XX_CHIP_REV_D1 4
> @@ -34,4 +35,9 @@ static inline unsigned int ep93xx_chip_revision(void) { return 0; }
>
> #endif
>
> +static inline void ep93xx_regmap_write(struct regmap *map, unsigned int reg, unsigned int val) {}
> +static inline void ep93xx_regmap_update_bits(struct regmap *map, unsigned int reg,
> + unsigned int mask, unsigned int val)
> +{ }
> +
> #endif
--
Alexander Sverdlin.
^ permalink raw reply [flat|nested] 78+ messages in thread* Re: [PATCH v4 02/42] ARM: ep93xx: add swlocked prototypes
2023-09-16 15:38 ` Alexander Sverdlin
@ 2023-09-18 13:04 ` Alexander Sverdlin
0 siblings, 0 replies; 78+ messages in thread
From: Alexander Sverdlin @ 2023-09-18 13:04 UTC (permalink / raw)
To: nikita.shubin, Linus Walleij, Thierry Reding,
Uwe Kleine-König, Sergey Shtylyov
Cc: Dmitry Torokhov, Damien Le Moal, linux-kernel, Arnd Bergmann
Hi Nikita,
On Sat, 2023-09-16 at 17:38 +0200, Alexander Sverdlin wrote:
> > Add ep93xx_regmap_write and ep93xx_regmap_update_bits to make drivers
> > compilable before actual implementation is added.
>
> It should be possible to re-arrange the patch series so that real
> implementation comes before the drivers using it.
>
> We must assure that bisecting the kernel tree is possible, that
> means no matter which (initial) part of your series is applied, there is no
> regression allowed.
>
sorry for the confusion, there is no bisectability problem in it
indeed, because only new drivers use it and they are not active until
the last patches in the series swith to DT.
I'd personally probably melt commit 10 ("soc: Add SoC driver for Cirrus ep93xx")
into this one, but I don't see it necessary after all.
> > Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> > ---
> > include/linux/soc/cirrus/ep93xx.h | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/include/linux/soc/cirrus/ep93xx.h b/include/linux/soc/cirrus/ep93xx.h
> > index 56fbe2dc59b1..8b4b8221ed4c 100644
> > --- a/include/linux/soc/cirrus/ep93xx.h
> > +++ b/include/linux/soc/cirrus/ep93xx.h
> > @@ -3,6 +3,7 @@
> > #define _SOC_EP93XX_H
> >
> > struct platform_device;
> > +struct regmap;
> >
> > #define EP93XX_CHIP_REV_D0 3
> > #define EP93XX_CHIP_REV_D1 4
> > @@ -34,4 +35,9 @@ static inline unsigned int ep93xx_chip_revision(void) { return 0; }
> >
> > #endif
> >
> > +static inline void ep93xx_regmap_write(struct regmap *map, unsigned int reg, unsigned int val) {}
> > +static inline void ep93xx_regmap_update_bits(struct regmap *map, unsigned int reg,
> > + unsigned int mask, unsigned int val)
> > +{ }
> > +
> > #endif
--
Alexander Sverdlin.
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 03/42] dt-bindings: clock: Add Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
2023-09-15 8:10 ` [PATCH v4 01/42] gpio: ep93xx: split device in multiple Nikita Shubin via B4 Relay
2023-09-15 8:10 ` [PATCH v4 02/42] ARM: ep93xx: add swlocked prototypes Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 10:36 ` Krzysztof Kozlowski
2023-09-15 8:10 ` [PATCH v4 04/42] clk: ep93xx: add DT support for " Nikita Shubin via B4 Relay
` (40 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Nikita Shubin,
Alexander Sverdlin
Cc: linux-clk, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add device tree bindings for the Cirrus Logic EP93xx clock block
used in these SoCs.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../bindings/clock/cirrus,ep9301-clk.yaml | 46 ++++++++++++++++++++++
include/dt-bindings/clock/cirrus,ep9301-clk.h | 41 +++++++++++++++++++
2 files changed, 87 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/cirrus,ep9301-clk.yaml b/Documentation/devicetree/bindings/clock/cirrus,ep9301-clk.yaml
new file mode 100644
index 000000000000..111e016601fb
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/cirrus,ep9301-clk.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/cirrus,ep9301-clk.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic ep93xx SoC's clock controller
+
+maintainers:
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-clk
+ - items:
+ - enum:
+ - cirrus,ep9302-clk
+ - cirrus,ep9307-clk
+ - cirrus,ep9312-clk
+ - cirrus,ep9315-clk
+ - const: cirrus,ep9301-clk
+
+ "#clock-cells":
+ const: 1
+
+ clocks:
+ items:
+ - description: reference clock
+
+required:
+ - compatible
+ - "#clock-cells"
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ clock-controller {
+ compatible = "cirrus,ep9301-clk";
+ #clock-cells = <1>;
+ clocks = <&xtali>;
+ };
+...
diff --git a/include/dt-bindings/clock/cirrus,ep9301-clk.h b/include/dt-bindings/clock/cirrus,ep9301-clk.h
new file mode 100644
index 000000000000..3cd053c0fdea
--- /dev/null
+++ b/include/dt-bindings/clock/cirrus,ep9301-clk.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+#ifndef DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H
+#define DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H
+
+#define EP93XX_CLK_UART1 0
+#define EP93XX_CLK_UART2 1
+#define EP93XX_CLK_UART3 2
+
+#define EP93XX_CLK_ADC 3
+#define EP93XX_CLK_ADC_EN 4
+
+#define EP93XX_CLK_KEYPAD 5
+
+#define EP93XX_CLK_VIDEO 6
+
+#define EP93XX_CLK_I2S_MCLK 7
+#define EP93XX_CLK_I2S_SCLK 8
+#define EP93XX_CLK_I2S_LRCLK 9
+
+#define EP93XX_CLK_UART 10
+#define EP93XX_CLK_SPI 11
+#define EP93XX_CLK_PWM 12
+#define EP93XX_CLK_USB 13
+
+#define EP93XX_CLK_M2M0 14
+#define EP93XX_CLK_M2M1 15
+
+#define EP93XX_CLK_M2P0 16
+#define EP93XX_CLK_M2P1 17
+#define EP93XX_CLK_M2P2 18
+#define EP93XX_CLK_M2P3 19
+#define EP93XX_CLK_M2P4 20
+#define EP93XX_CLK_M2P5 21
+#define EP93XX_CLK_M2P6 22
+#define EP93XX_CLK_M2P7 23
+#define EP93XX_CLK_M2P8 24
+#define EP93XX_CLK_M2P9 25
+
+#define EP93XX_CLK_END 26
+
+#endif /* DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H */
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 03/42] dt-bindings: clock: Add Cirrus EP93xx
2023-09-15 8:10 ` [PATCH v4 03/42] dt-bindings: clock: Add Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 10:36 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 10:36 UTC (permalink / raw)
To: nikita.shubin, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Alexander Sverdlin
Cc: linux-clk, devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:10, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
Thank you for your patch. There is something to discuss/improve.
> diff --git a/include/dt-bindings/clock/cirrus,ep9301-clk.h b/include/dt-bindings/clock/cirrus,ep9301-clk.h
> new file mode 100644
> index 000000000000..3cd053c0fdea
> --- /dev/null
> +++ b/include/dt-bindings/clock/cirrus,ep9301-clk.h
> @@ -0,0 +1,41 @@
> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> +#ifndef DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H
> +#define DT_BINDINGS_CIRRUS_EP93XX_CLOCK_H
> +
> +#define EP93XX_CLK_UART1 0
> +#define EP93XX_CLK_UART2 1
> +#define EP93XX_CLK_UART3 2
> +
> +#define EP93XX_CLK_ADC 3
> +#define EP93XX_CLK_ADC_EN 4
> +
> +#define EP93XX_CLK_KEYPAD 5
Wrong indentation - use tab instead of spaces, just like in other places.
> +
> +#define EP93XX_CLK_VIDEO 6
> +
> +#define EP93XX_CLK_I2S_MCLK 7
> +#define EP93XX_CLK_I2S_SCLK 8
> +#define EP93XX_CLK_I2S_LRCLK 9
> +
> +#define EP93XX_CLK_UART 10
> +#define EP93XX_CLK_SPI 11
> +#define EP93XX_CLK_PWM 12
> +#define EP93XX_CLK_USB 13
> +
> +#define EP93XX_CLK_M2M0 14
> +#define EP93XX_CLK_M2M1 15
> +
> +#define EP93XX_CLK_M2P0 16
> +#define EP93XX_CLK_M2P1 17
> +#define EP93XX_CLK_M2P2 18
> +#define EP93XX_CLK_M2P3 19
> +#define EP93XX_CLK_M2P4 20
> +#define EP93XX_CLK_M2P5 21
> +#define EP93XX_CLK_M2P6 22
> +#define EP93XX_CLK_M2P7 23
> +#define EP93XX_CLK_M2P8 24
> +#define EP93XX_CLK_M2P9 25
> +
> +#define EP93XX_CLK_END 26
Here as well... except I propose to drop it. Number of clocks should not
be part of bindings, because then you cannot grow it.
With indentation fixed and CLK_END dropped:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 04/42] clk: ep93xx: add DT support for Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (2 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 03/42] dt-bindings: clock: Add Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-10-24 2:50 ` Stephen Boyd
2023-09-15 8:10 ` [PATCH v4 05/42] dt-bindings: pinctrl: Add " Nikita Shubin via B4 Relay
` (39 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd
Cc: linux-kernel, linux-clk, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Rewrite EP93xx clock driver located in arch/arm/mach-ep93xx/clock.c
trying to do everything the device tree way:
- provide clock acces via of
- drop clk_hw_register_clkdev
- drop init code and use builtin_platform_driver_probe
Also moved all clocks not accessed via device tree to syscon.
Co-developed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/clk/Kconfig | 8 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-ep93xx.c | 753 +++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 762 insertions(+)
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 6b3b424addab..abd8e04a33aa 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -218,6 +218,14 @@ config COMMON_CLK_EN7523
This driver provides the fixed clocks and gates present on Airoha
ARM silicon.
+config COMMON_CLK_EP93XX
+ bool "Clock driver for Cirrus Logic ep93xx SoC"
+ depends on ARCH_EP93XX || COMPILE_TEST
+ select MFD_SYSCON
+ select REGMAP
+ help
+ This driver supports the SoC clocks on the Cirrus Logic ep93xx.
+
config COMMON_CLK_FSL_FLEXSPI
tristate "Clock driver for FlexSPI on Layerscape SoCs"
depends on ARCH_LAYERSCAPE || COMPILE_TEST
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 7cb000549b61..6049a2073a25 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_COMMON_CLK_CDCE706) += clk-cdce706.o
obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o
obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o
obj-$(CONFIG_COMMON_CLK_CS2000_CP) += clk-cs2000-cp.o
+obj-$(CONFIG_COMMON_CLK_EP93XX) += clk-ep93xx.o
obj-$(CONFIG_ARCH_SPARX5) += clk-sparx5.o
obj-$(CONFIG_COMMON_CLK_EN7523) += clk-en7523.o
obj-$(CONFIG_COMMON_CLK_FIXED_MMIO) += clk-fixed-mmio.o
diff --git a/drivers/clk/clk-ep93xx.c b/drivers/clk/clk-ep93xx.c
new file mode 100644
index 000000000000..e8d3bd595255
--- /dev/null
+++ b/drivers/clk/clk-ep93xx.c
@@ -0,0 +1,753 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Clock control for Cirrus EP93xx chips.
+ * Copyright (C) 2021 Nikita Shubin <nikita.shubin@maquefel.me>
+ *
+ * Based on a rewrite of arch/arm/mach-ep93xx/clock.c:
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ */
+#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
+
+#include <linux/bits.h>
+#include <linux/clk-provider.h>
+#include <linux/clk.h>
+#include <linux/mfd/syscon.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/spinlock.h>
+#include <linux/sys_soc.h>
+
+#include <linux/soc/cirrus/ep93xx.h>
+#include <dt-bindings/clock/cirrus,ep9301-clk.h>
+
+#include <asm/div64.h>
+
+#define EP93XX_EXT_RTC_RATE 32768
+
+#define EP93XX_SYSCON_POWER_STATE 0x00
+#define EP93XX_SYSCON_PWRCNT 0x04
+#define EP93XX_SYSCON_PWRCNT_UARTBAUD BIT(29)
+#define EP93XX_SYSCON_PWRCNT_USH_EN 28
+#define EP93XX_SYSCON_PWRCNT_DMA_M2M1 27
+#define EP93XX_SYSCON_PWRCNT_DMA_M2M0 26
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P8 25
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P9 24
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P6 23
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P7 22
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P4 21
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P5 20
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P2 19
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P3 18
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P0 17
+#define EP93XX_SYSCON_PWRCNT_DMA_M2P1 16
+#define EP93XX_SYSCON_DEVCFG 0x80
+#define EP93XX_SYSCON_DEVCFG_U3EN 24
+#define EP93XX_SYSCON_DEVCFG_U2EN 20
+#define EP93XX_SYSCON_DEVCFG_U1EN 18
+#define EP93XX_SYSCON_VIDCLKDIV 0x84
+#define EP93XX_SYSCON_CLKDIV_ENABLE 15
+#define EP93XX_SYSCON_CLKDIV_ESEL BIT(14)
+#define EP93XX_SYSCON_CLKDIV_PSEL BIT(13)
+#define EP93XX_SYSCON_CLKDIV_MASK GENMASK(14, 13)
+#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
+#define EP93XX_SYSCON_I2SCLKDIV 0x8c
+#define EP93XX_SYSCON_I2SCLKDIV_SENA 31
+#define EP93XX_SYSCON_I2SCLKDIV_ORIDE BIT(29)
+#define EP93XX_SYSCON_I2SCLKDIV_SPOL BIT(19)
+#define EP93XX_I2SCLKDIV_SDIV (1 << 16)
+#define EP93XX_I2SCLKDIV_LRDIV32 (0 << 17)
+#define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17)
+#define EP93XX_I2SCLKDIV_LRDIV128 (2 << 17)
+#define EP93XX_I2SCLKDIV_LRDIV_MASK (3 << 17)
+#define EP93XX_SYSCON_KEYTCHCLKDIV 0x90
+#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN 31
+#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV 16
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN 15
+#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV 0
+#define EP93XX_SYSCON_CHIPID 0x94
+#define EP93XX_SYSCON_CHIPID_ID 0x9213
+
+static const char adc_divisors[] = { 16, 4 };
+static const char sclk_divisors[] = { 2, 4 };
+static const char lrclk_divisors[] = { 32, 64, 128 };
+
+static const struct clk_parent_data ep93xx_clk_parents[] = {
+ { .fw_name = "xtali", .name = "xtali" },
+ { .index = -1, .name = "pll1" },
+ { .index = -1, .name = "pll2" },
+};
+
+struct ep93xx_clk {
+ struct clk_hw hw;
+ u16 idx;
+ u16 reg;
+ u32 mask;
+ u8 bit_idx;
+ u8 shift;
+ u8 width;
+ u8 num_div;
+ const char *div;
+};
+
+struct ep93xx_clk_priv {
+ spinlock_t lock;
+ struct device *dev;
+ void __iomem *base;
+ struct regmap *map;
+ struct clk_hw *fixed[16];
+ struct ep93xx_clk reg[];
+};
+
+static struct ep93xx_clk *ep93xx_clk_from(struct clk_hw *hw)
+{
+ return container_of(hw, struct ep93xx_clk, hw);
+}
+
+static struct ep93xx_clk_priv *ep93xx_priv_from(struct ep93xx_clk *clk)
+{
+ return container_of(clk, struct ep93xx_clk_priv, reg[clk->idx]);
+}
+
+static int ep93xx_clk_is_enabled(struct clk_hw *hw)
+{
+ struct ep93xx_clk *clk = ep93xx_clk_from(hw);
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ u32 val;
+
+ regmap_read(priv->map, clk->reg, &val);
+
+ return !!(val & BIT(clk->bit_idx));
+}
+
+static int ep93xx_clk_enable(struct clk_hw *hw)
+{
+ struct ep93xx_clk *clk = ep93xx_clk_from(hw);
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ unsigned long flags;
+ u32 val;
+
+ spin_lock_irqsave(&priv->lock, flags);
+
+ regmap_read(priv->map, clk->reg, &val);
+ val |= BIT(clk->bit_idx);
+
+ ep93xx_regmap_write(priv->map, clk->reg, val);
+
+ spin_unlock_irqrestore(&priv->lock, flags);
+
+ return 0;
+}
+
+static void ep93xx_clk_disable(struct clk_hw *hw)
+{
+ struct ep93xx_clk *clk = ep93xx_clk_from(hw);
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ unsigned long flags;
+ u32 val;
+
+ spin_lock_irqsave(&priv->lock, flags);
+
+ regmap_read(priv->map, clk->reg, &val);
+ val &= ~BIT(clk->bit_idx);
+
+ ep93xx_regmap_write(priv->map, clk->reg, val);
+
+ spin_unlock_irqrestore(&priv->lock, flags);
+}
+
+static const struct clk_ops clk_ep93xx_gate_ops = {
+ .enable = ep93xx_clk_enable,
+ .disable = ep93xx_clk_disable,
+ .is_enabled = ep93xx_clk_is_enabled,
+};
+
+static int ep93xx_clk_register_gate(struct ep93xx_clk *clk,
+ const char *name,
+ struct clk_parent_data *parent_data,
+ unsigned long flags,
+ unsigned int reg,
+ u8 bit_idx)
+{
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ struct clk_init_data init = { };
+
+ init.name = name;
+ init.ops = &clk_ep93xx_gate_ops;
+ init.flags = flags;
+ init.parent_data = parent_data;
+ init.num_parents = 1;
+
+ clk->reg = reg;
+ clk->bit_idx = bit_idx;
+ clk->hw.init = &init;
+
+ return devm_clk_hw_register(priv->dev, &clk->hw);
+}
+
+static u8 ep93xx_mux_get_parent(struct clk_hw *hw)
+{
+ struct ep93xx_clk *clk = ep93xx_clk_from(hw);
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ u32 val;
+
+ regmap_read(priv->map, clk->reg, &val);
+
+ val &= EP93XX_SYSCON_CLKDIV_MASK;
+
+ switch (val) {
+ case EP93XX_SYSCON_CLKDIV_ESEL:
+ return 1; /* PLL1 */
+ case EP93XX_SYSCON_CLKDIV_MASK:
+ return 2; /* PLL2 */
+ default:
+ break;
+ };
+
+ return 0; /* XTALI */
+}
+
+static int ep93xx_mux_set_parent_lock(struct clk_hw *hw, u8 index)
+{
+ struct ep93xx_clk *clk = ep93xx_clk_from(hw);
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ unsigned long flags;
+ u32 val;
+
+ if (index >= ARRAY_SIZE(ep93xx_clk_parents))
+ return -EINVAL;
+
+ spin_lock_irqsave(&priv->lock, flags);
+
+ regmap_read(priv->map, clk->reg, &val);
+ val &= ~(EP93XX_SYSCON_CLKDIV_MASK);
+ if (index) {
+ val |= EP93XX_SYSCON_CLKDIV_ESEL;
+ val |= (index - 1) ? EP93XX_SYSCON_CLKDIV_PSEL : 0;
+ }
+
+ ep93xx_regmap_write(priv->map, clk->reg, val);
+
+ spin_unlock_irqrestore(&priv->lock, flags);
+
+ return 0;
+}
+
+static bool is_best(unsigned long rate, unsigned long now,
+ unsigned long best)
+{
+ return abs(rate - now) < abs(rate - best);
+}
+
+static int ep93xx_mux_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
+{
+ unsigned long best_rate = 0, actual_rate, mclk_rate;
+ unsigned long rate = req->rate;
+ struct clk_hw *parent_best = NULL;
+ unsigned long parent_rate_best;
+ unsigned long parent_rate;
+ int div, pdiv;
+ unsigned int i;
+
+ /*
+ * Try the two pll's and the external clock
+ * Because the valid predividers are 2, 2.5 and 3, we multiply
+ * all the clocks by 2 to avoid floating point math.
+ *
+ * This is based on the algorithm in the ep93xx raster guide:
+ * http://be-a-maverick.com/en/pubs/appNote/AN269REV1.pdf
+ *
+ */
+ for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
+ struct clk_hw *parent = clk_hw_get_parent_by_index(hw, i);
+
+ parent_rate = clk_hw_get_rate(parent);
+ mclk_rate = parent_rate * 2;
+
+ /* Try each predivider value */
+ for (pdiv = 4; pdiv <= 6; pdiv++) {
+ div = DIV_ROUND_CLOSEST(mclk_rate, rate * pdiv);
+ if (div < 1 || div > 127)
+ continue;
+
+ actual_rate = DIV_ROUND_CLOSEST(mclk_rate, pdiv * div);
+ if (is_best(rate, actual_rate, best_rate)) {
+ best_rate = actual_rate;
+ parent_rate_best = parent_rate;
+ parent_best = parent;
+ }
+ }
+ }
+
+ if (!parent_best)
+ return -EINVAL;
+
+ req->best_parent_rate = parent_rate_best;
+ req->best_parent_hw = parent_best;
+ req->rate = best_rate;
+
+ return 0;
+}
+
+static unsigned long ep93xx_ddiv_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct ep93xx_clk *clk = ep93xx_clk_from(hw);
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ unsigned int pdiv, div;
+ u32 val;
+
+ regmap_read(priv->map, clk->reg, &val);
+ pdiv = ((val >> EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) & 0x03);
+ div = val & GENMASK(6, 0);
+ if (!div)
+ return 0;
+
+ return DIV_ROUND_CLOSEST(parent_rate * 2, (pdiv + 3) * div);
+}
+
+static int ep93xx_ddiv_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct ep93xx_clk *clk = ep93xx_clk_from(hw);
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ int pdiv, div, npdiv, ndiv;
+ unsigned long actual_rate, mclk_rate, rate_err = ULONG_MAX;
+ u32 val;
+
+ regmap_read(priv->map, clk->reg, &val);
+ mclk_rate = parent_rate * 2;
+
+ for (pdiv = 4; pdiv <= 6; pdiv++) {
+ div = DIV_ROUND_CLOSEST(mclk_rate, rate * pdiv);
+ if (div < 1 || div > 127)
+ continue;
+
+ actual_rate = DIV_ROUND_CLOSEST(mclk_rate, pdiv * div);
+ if (abs(actual_rate - rate) < rate_err) {
+ npdiv = pdiv - 3;
+ ndiv = div;
+ rate_err = abs(actual_rate - rate);
+ }
+ }
+
+ if (rate_err == ULONG_MAX)
+ return -EINVAL;
+
+ /* Clear old dividers */
+ val &= ~(GENMASK(9, 0) & ~BIT(7));
+
+ /* Set the new pdiv and div bits for the new clock rate */
+ val |= (npdiv << EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) | ndiv;
+
+ ep93xx_regmap_write(priv->map, clk->reg, val);
+
+ return 0;
+}
+
+static const struct clk_ops clk_ddiv_ops = {
+ .enable = ep93xx_clk_enable,
+ .disable = ep93xx_clk_disable,
+ .is_enabled = ep93xx_clk_is_enabled,
+ .get_parent = ep93xx_mux_get_parent,
+ .set_parent = ep93xx_mux_set_parent_lock,
+ .determine_rate = ep93xx_mux_determine_rate,
+ .recalc_rate = ep93xx_ddiv_recalc_rate,
+ .set_rate = ep93xx_ddiv_set_rate,
+};
+
+static int clk_hw_register_ddiv(struct ep93xx_clk *clk,
+ const char *name,
+ unsigned int reg,
+ u8 bit_idx)
+{
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ struct clk_init_data init = { };
+
+ init.name = name;
+ init.ops = &clk_ddiv_ops;
+ init.flags = 0;
+ init.parent_data = ep93xx_clk_parents;
+ init.num_parents = ARRAY_SIZE(ep93xx_clk_parents);
+
+ clk->reg = reg;
+ clk->bit_idx = bit_idx;
+ clk->hw.init = &init;
+
+ return devm_clk_hw_register(priv->dev, &clk->hw);
+}
+
+static unsigned long ep93xx_div_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct ep93xx_clk *clk = ep93xx_clk_from(hw);
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ u32 val;
+ u8 index;
+
+ regmap_read(priv->map, clk->reg, &val);
+ index = (val & clk->mask) >> clk->shift;
+ if (index > clk->num_div)
+ return 0;
+
+ return DIV_ROUND_CLOSEST(parent_rate, clk->div[index]);
+}
+
+static long ep93xx_div_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ struct ep93xx_clk *clk = ep93xx_clk_from(hw);
+ unsigned long best = 0, now;
+ unsigned int i;
+
+ for (i = 0; i < clk->num_div; i++) {
+ if ((rate * clk->div[i]) == *parent_rate)
+ return rate;
+
+ now = DIV_ROUND_CLOSEST(*parent_rate, clk->div[i]);
+ if (!best || is_best(rate, now, best))
+ best = now;
+ }
+
+ return best;
+}
+
+static int ep93xx_div_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct ep93xx_clk *clk = ep93xx_clk_from(hw);
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ unsigned int i;
+ u32 val;
+
+ regmap_read(priv->map, clk->reg, &val);
+ val &= ~clk->mask;
+ for (i = 0; i < clk->num_div; i++)
+ if (rate == DIV_ROUND_CLOSEST(parent_rate, clk->div[i])) {
+ val |= i << clk->shift;
+ break;
+ }
+
+ if (i == clk->num_div)
+ return -EINVAL;
+
+ ep93xx_regmap_write(priv->map, clk->reg, val);
+
+ return 0;
+}
+
+static const struct clk_ops ep93xx_div_ops = {
+ .enable = ep93xx_clk_enable,
+ .disable = ep93xx_clk_disable,
+ .is_enabled = ep93xx_clk_is_enabled,
+ .recalc_rate = ep93xx_div_recalc_rate,
+ .round_rate = ep93xx_div_round_rate,
+ .set_rate = ep93xx_div_set_rate,
+};
+
+static int clk_hw_register_div(struct ep93xx_clk *clk,
+ const char *name,
+ struct clk_parent_data *parent_data,
+ // const char *parent_name,
+ unsigned int reg,
+ u8 enable_bit,
+ u8 shift,
+ u8 width,
+ const char *clk_divisors,
+ u8 num_div)
+{
+ struct ep93xx_clk_priv *priv = ep93xx_priv_from(clk);
+ struct clk_init_data init = { };
+
+ init.name = name;
+ init.ops = &ep93xx_div_ops;
+ init.flags = 0;
+ init.parent_data = parent_data;
+ init.num_parents = 1;
+
+ clk->reg = reg;
+ clk->bit_idx = enable_bit;
+ clk->mask = GENMASK(shift + width - 1, shift);
+ clk->shift = shift;
+ clk->div = clk_divisors;
+ clk->num_div = num_div;
+ clk->hw.init = &init;
+
+ return devm_clk_hw_register(priv->dev, &clk->hw);
+}
+
+struct ep93xx_gate {
+ unsigned int idx;
+ unsigned int bit;
+ const char *name;
+};
+
+static const struct ep93xx_gate ep93xx_uarts[] = {
+ { EP93XX_CLK_UART1, EP93XX_SYSCON_DEVCFG_U1EN, "uart1" },
+ { EP93XX_CLK_UART2, EP93XX_SYSCON_DEVCFG_U2EN, "uart2" },
+ { EP93XX_CLK_UART3, EP93XX_SYSCON_DEVCFG_U3EN, "uart3" },
+};
+
+static int ep93xx_uart_clock_init(struct ep93xx_clk_priv *priv)
+{
+ struct clk_parent_data parent_data = { };
+ unsigned int i, ret, clk_uart_div;
+ struct ep93xx_clk *clk;
+ u32 val;
+
+ regmap_read(priv->map, EP93XX_SYSCON_PWRCNT, &val);
+ if (val & EP93XX_SYSCON_PWRCNT_UARTBAUD)
+ clk_uart_div = 1;
+ else
+ clk_uart_div = 2;
+
+ priv->fixed[0] = clk_hw_register_fixed_factor(NULL, "uart", "xtali", 0, 1, clk_uart_div);
+ parent_data.hw = priv->fixed[0];
+
+ /* parenting uart gate clocks to uart clock */
+ for (i = 0; i < ARRAY_SIZE(ep93xx_uarts); i++) {
+ clk = &priv->reg[ep93xx_uarts[i].idx];
+ clk->idx = ep93xx_uarts[i].idx;
+ ret = ep93xx_clk_register_gate(clk,
+ ep93xx_uarts[i].name,
+ &parent_data, CLK_SET_RATE_PARENT,
+ EP93XX_SYSCON_DEVCFG,
+ ep93xx_uarts[i].bit);
+ if (ret)
+ return dev_err_probe(priv->dev, ret, "failed to register dma clock\n");
+ }
+
+ return 0;
+}
+
+static const struct ep93xx_gate ep93xx_dmas[] = {
+ { EP93XX_CLK_M2M0, EP93XX_SYSCON_PWRCNT_DMA_M2M0, "m2m0" },
+ { EP93XX_CLK_M2M1, EP93XX_SYSCON_PWRCNT_DMA_M2M1, "m2m1" },
+ { EP93XX_CLK_M2P0, EP93XX_SYSCON_PWRCNT_DMA_M2P0, "m2p0" },
+ { EP93XX_CLK_M2P1, EP93XX_SYSCON_PWRCNT_DMA_M2P1, "m2p1" },
+ { EP93XX_CLK_M2P2, EP93XX_SYSCON_PWRCNT_DMA_M2P2, "m2p2" },
+ { EP93XX_CLK_M2P3, EP93XX_SYSCON_PWRCNT_DMA_M2P3, "m2p3" },
+ { EP93XX_CLK_M2P4, EP93XX_SYSCON_PWRCNT_DMA_M2P4, "m2p4" },
+ { EP93XX_CLK_M2P5, EP93XX_SYSCON_PWRCNT_DMA_M2P5, "m2p5" },
+ { EP93XX_CLK_M2P6, EP93XX_SYSCON_PWRCNT_DMA_M2P6, "m2p6" },
+ { EP93XX_CLK_M2P7, EP93XX_SYSCON_PWRCNT_DMA_M2P7, "m2p7" },
+ { EP93XX_CLK_M2P8, EP93XX_SYSCON_PWRCNT_DMA_M2P8, "m2p8" },
+ { EP93XX_CLK_M2P9, EP93XX_SYSCON_PWRCNT_DMA_M2P9, "m2p9" },
+};
+
+static int ep93xx_dma_clock_init(struct ep93xx_clk_priv *priv)
+{
+ unsigned int i, idx;
+
+ for (i = 0; i < ARRAY_SIZE(ep93xx_dmas); i++) {
+ idx = ep93xx_dmas[i].idx - EP93XX_CLK_UART;
+ priv->fixed[idx] = devm_clk_hw_register_gate(priv->dev,
+ ep93xx_dmas[i].name,
+ "hclk", 0,
+ priv->base + EP93XX_SYSCON_PWRCNT,
+ ep93xx_dmas[i].bit,
+ 0,
+ &priv->lock);
+ if (IS_ERR(priv->fixed[idx]))
+ return PTR_ERR(priv->fixed[idx]);
+ }
+
+ return 0;
+}
+
+static struct clk_hw *ep93xx_clk_get(struct of_phandle_args *clkspec, void *data)
+{
+ struct ep93xx_clk_priv *priv = data;
+ unsigned int idx = clkspec->args[0];
+
+ if (idx < EP93XX_CLK_UART)
+ return &priv->reg[idx].hw;
+
+ if (idx < EP93XX_CLK_END)
+ return priv->fixed[idx - EP93XX_CLK_UART];
+
+ return ERR_PTR(-EINVAL);
+}
+
+static const struct soc_device_attribute ep93xx_soc_table[] = {
+ { .revision = "E2", .data = (void *)1 },
+ { /* sentinel */ }
+};
+
+static int ep93xx_clk_probe(struct platform_device *pdev)
+{
+ struct clk_parent_data xtali = { .name = "xtali" };
+ const struct soc_device_attribute *match;
+ struct clk_parent_data pdata = {};
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct ep93xx_clk_priv *priv;
+ struct device_node *parent;
+ struct ep93xx_clk *clk;
+ unsigned long clk_spi_div;
+ int ret;
+ u32 value;
+
+ priv = devm_kzalloc(dev, struct_size(priv, reg, EP93XX_CLK_UART), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ spin_lock_init(&priv->lock);
+ priv->dev = dev;
+ parent = of_get_parent(np);
+ if (!parent)
+ return dev_err_probe(dev, -EINVAL, "no syscon parent for clk node\n");
+
+ priv->map = syscon_node_to_regmap(parent);
+ if (IS_ERR(priv->map)) {
+ of_node_put(parent);
+ return dev_err_probe(dev, -EINVAL, "no syscon regmap\n");
+ }
+
+ priv->base = devm_of_iomap(dev, parent, 0, NULL);
+ of_node_put(parent);
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
+ ret = ep93xx_uart_clock_init(priv);
+ if (ret)
+ return ret;
+
+ ret = ep93xx_dma_clock_init(priv);
+ if (ret)
+ return ret;
+
+ /*
+ * EP93xx SSP clock rate was doubled in version E2. For more information
+ * see:
+ * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf
+ */
+ clk_spi_div = 2;
+ match = soc_device_match(ep93xx_soc_table);
+ if (match)
+ clk_spi_div = (unsigned long)match->data;
+
+ priv->fixed[1] = devm_clk_hw_register_fixed_factor(dev, "ep93xx-spi.0", "xtali",
+ 0, 1, clk_spi_div);
+ if (IS_ERR(priv->fixed[1]))
+ return PTR_ERR(priv->fixed[1]);
+
+ /* PWM clock */
+ priv->fixed[2] = devm_clk_hw_register_fixed_factor(dev, "pwm_clk", "xtali", 0, 1, 1);
+ if (IS_ERR(priv->fixed[2]))
+ return PTR_ERR(priv->fixed[2]);
+
+ /* USB clock */
+ priv->fixed[3] = devm_clk_hw_register_gate(priv->dev,
+ "ohci-platform",
+ "usb_clk", 0,
+ priv->base + EP93XX_SYSCON_PWRCNT,
+ EP93XX_SYSCON_PWRCNT_USH_EN,
+ 0,
+ &priv->lock);
+ if (IS_ERR(priv->fixed[3]))
+ return PTR_ERR(priv->fixed[3]);
+
+ /* touchscreen/adc clock */
+ clk = &priv->reg[EP93XX_CLK_ADC];
+ clk->idx = EP93XX_CLK_ADC;
+ ret = clk_hw_register_div(clk, "ep93xx-adc", &xtali,
+ EP93XX_SYSCON_KEYTCHCLKDIV,
+ EP93XX_SYSCON_KEYTCHCLKDIV_TSEN,
+ EP93XX_SYSCON_KEYTCHCLKDIV_ADIV,
+ 1,
+ adc_divisors,
+ ARRAY_SIZE(adc_divisors));
+
+
+ /* keypad clock */
+ clk = &priv->reg[EP93XX_CLK_KEYPAD];
+ clk->idx = EP93XX_CLK_KEYPAD;
+ ret = clk_hw_register_div(clk, "ep93xx-keypad", &xtali,
+ EP93XX_SYSCON_KEYTCHCLKDIV,
+ EP93XX_SYSCON_KEYTCHCLKDIV_KEN,
+ EP93XX_SYSCON_KEYTCHCLKDIV_KDIV,
+ 1,
+ adc_divisors,
+ ARRAY_SIZE(adc_divisors));
+
+ /*
+ * On reset PDIV and VDIV is set to zero, while PDIV zero
+ * means clock disable, VDIV shouldn't be zero.
+ * So i set both dividers to minimum.
+ */
+ /* ENA - Enable CLK divider. */
+ /* PDIV - 00 - Disable clock */
+ /* VDIV - at least 2 */
+ /* Check and enable video clk registers */
+ regmap_read(priv->map, EP93XX_SYSCON_VIDCLKDIV, &value);
+ value |= BIT(EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) | 2;
+ ep93xx_regmap_write(priv->map, EP93XX_SYSCON_VIDCLKDIV, value);
+
+ /* check and enable i2s clk registers */
+ regmap_read(priv->map, EP93XX_SYSCON_I2SCLKDIV, &value);
+ value |= BIT(EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) | 2;
+ /*
+ * Override the SAI_MSTR_CLK_CFG from the I2S block and use the
+ * I2SClkDiv Register settings. LRCLK transitions on the falling SCLK
+ * edge.
+ */
+ value |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
+ ep93xx_regmap_write(priv->map, EP93XX_SYSCON_I2SCLKDIV, value);
+
+ /* video clk */
+ clk = &priv->reg[EP93XX_CLK_VIDEO];
+ clk->idx = EP93XX_CLK_VIDEO;
+ ret = clk_hw_register_ddiv(clk, "ep93xx-fb",
+ EP93XX_SYSCON_VIDCLKDIV,
+ EP93XX_SYSCON_CLKDIV_ENABLE);
+
+ /* i2s clk */
+ clk = &priv->reg[EP93XX_CLK_I2S_MCLK];
+ clk->idx = EP93XX_CLK_I2S_MCLK;
+ ret = clk_hw_register_ddiv(clk, "mclk",
+ EP93XX_SYSCON_I2SCLKDIV,
+ EP93XX_SYSCON_CLKDIV_ENABLE);
+
+ /* i2s sclk */
+ clk = &priv->reg[EP93XX_CLK_I2S_SCLK];
+ clk->idx = EP93XX_CLK_I2S_SCLK;
+ pdata.hw = &priv->reg[EP93XX_CLK_I2S_MCLK].hw;
+ ret = clk_hw_register_div(clk, "sclk", &pdata,
+ EP93XX_SYSCON_I2SCLKDIV,
+ EP93XX_SYSCON_I2SCLKDIV_SENA,
+ 16, /* EP93XX_I2SCLKDIV_SDIV_SHIFT */
+ 1, /* EP93XX_I2SCLKDIV_SDIV_WIDTH */
+ sclk_divisors,
+ ARRAY_SIZE(sclk_divisors));
+
+ /* i2s lrclk */
+ clk = &priv->reg[EP93XX_CLK_I2S_LRCLK];
+ clk->idx = EP93XX_CLK_I2S_LRCLK;
+ pdata.hw = &priv->reg[EP93XX_CLK_I2S_SCLK].hw;
+ ret = clk_hw_register_div(clk, "lrclk", &pdata,
+ EP93XX_SYSCON_I2SCLKDIV,
+ EP93XX_SYSCON_I2SCLKDIV_SENA,
+ 17, /* EP93XX_I2SCLKDIV_LRDIV32_SHIFT */
+ 2, /* EP93XX_I2SCLKDIV_LRDIV32_WIDTH */
+ lrclk_divisors,
+ ARRAY_SIZE(lrclk_divisors));
+
+ /* IrDa clk uses same pattern but no init code presents in original clock driver */
+ return devm_of_clk_add_hw_provider(priv->dev, ep93xx_clk_get, priv);
+}
+
+static const struct of_device_id ep93xx_clk_dt_ids[] = {
+ { .compatible = "cirrus,ep9301-clk" },
+ { /* sentinel */ }
+};
+
+static struct platform_driver ep93xx_clk_driver = {
+ .driver = {
+ .name = "ep93xx-clk",
+ .of_match_table = ep93xx_clk_dt_ids,
+ .suppress_bind_attrs = true,
+ },
+};
+builtin_platform_driver_probe(ep93xx_clk_driver, ep93xx_clk_probe);
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 04/42] clk: ep93xx: add DT support for Cirrus EP93xx
2023-09-15 8:10 ` [PATCH v4 04/42] clk: ep93xx: add DT support for " Nikita Shubin via B4 Relay
@ 2023-10-24 2:50 ` Stephen Boyd
0 siblings, 0 replies; 78+ messages in thread
From: Stephen Boyd @ 2023-10-24 2:50 UTC (permalink / raw)
To: Michael Turquette, Nikita Shubin via B4 Relay, nikita.shubin
Cc: linux-kernel, linux-clk, Arnd Bergmann, Alexander Sverdlin
Quoting Nikita Shubin via B4 Relay (2023-09-15 01:10:46)
> diff --git a/drivers/clk/clk-ep93xx.c b/drivers/clk/clk-ep93xx.c
> new file mode 100644
> index 000000000000..e8d3bd595255
> --- /dev/null
> +++ b/drivers/clk/clk-ep93xx.c
> @@ -0,0 +1,753 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Clock control for Cirrus EP93xx chips.
[...]
> +#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN 15
> +#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV 0
> +#define EP93XX_SYSCON_CHIPID 0x94
> +#define EP93XX_SYSCON_CHIPID_ID 0x9213
> +
> +static const char adc_divisors[] = { 16, 4 };
> +static const char sclk_divisors[] = { 2, 4 };
> +static const char lrclk_divisors[] = { 32, 64, 128 };
> +
> +static const struct clk_parent_data ep93xx_clk_parents[] = {
> + { .fw_name = "xtali", .name = "xtali" },
Drop name. And please drop fw_name too and set .index to 0 explicitly.
> + { .index = -1, .name = "pll1" },
> + { .index = -1, .name = "pll2" },
These two should come from DT via index as well. The binding should be
changed to list the pll. In the previous review you mentioned the SoC
driver was populating these. The answer is yes that you should be
providing an OF clk provider (and updating the binding) to provide those
clks to this device node. Otherwise it won't be possible to describe the
connection besides with the name fallback method, which is not desired.
> +};
> +
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 05/42] dt-bindings: pinctrl: Add Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (3 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 04/42] clk: ep93xx: add DT support for " Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 10:37 ` Krzysztof Kozlowski
2023-09-15 8:10 ` [PATCH v4 06/42] pinctrl: add a Cirrus ep93xx SoC pin controller Nikita Shubin via B4 Relay
` (38 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Linus Walleij, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nikita Shubin, Alexander Sverdlin
Cc: linux-gpio, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add YAML bindings for ep93xx SoC pinctrl.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
---
.../bindings/pinctrl/cirrus,ep9301-pinctrl.yaml | 57 ++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,ep9301-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,ep9301-pinctrl.yaml
new file mode 100644
index 000000000000..1dbdc5ccc232
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/cirrus,ep9301-pinctrl.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/cirrus,ep9301-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus ep93xx pins mux controller
+
+maintainers:
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-pinctrl
+ - items:
+ - enum:
+ - cirrus,ep9302-pinctrl
+ - cirrus,ep9307-pinctrl
+ - cirrus,ep9312-pinctrl
+ - cirrus,ep9315-pinctrl
+ - const: cirrus,ep9301-pinctrl
+
+patternProperties:
+ '^pins-':
+ type: object
+ description: pin node
+ $ref: pinmux-node.yaml#
+
+ properties:
+ function:
+ enum: [ spi, ac97, i2s, pwm, keypad, pata, lcd, gpio ]
+
+ groups:
+ enum: [ ssp, ac97, i2s_on_ssp, i2s_on_ac97, pwm1, gpio1agrp,
+ gpio2agrp, gpio3agrp, gpio4agrp, gpio6agrp, gpio7agrp,
+ rasteronsdram0grp, rasteronsdram3grp, keypadgrp, idegrp ]
+
+ required:
+ - function
+ - groups
+
+required:
+ - compatible
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ pinctrl {
+ compatible = "cirrus,ep9312-pinctrl", "cirrus,ep9301-pinctrl";
+ spi_default_pins: pins-spi {
+ function = "spi";
+ groups = "ssp";
+ };
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 05/42] dt-bindings: pinctrl: Add Cirrus EP93xx
2023-09-15 8:10 ` [PATCH v4 05/42] dt-bindings: pinctrl: Add " Nikita Shubin via B4 Relay
@ 2023-09-15 10:37 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 10:37 UTC (permalink / raw)
To: nikita.shubin, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Alexander Sverdlin
Cc: linux-gpio, devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:10, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add YAML bindings for ep93xx SoC pinctrl.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> .../bindings/pinctrl/cirrus,ep9301-pinctrl.yaml | 57 ++++++++++++++++++++++
> 1 file changed, 57 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,ep9301-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,ep9301-pinctrl.yaml
> new file mode 100644
> index 000000000000..1dbdc5ccc232
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/cirrus,ep9301-pinctrl.yaml
> @@ -0,0 +1,57 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/cirrus,ep9301-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cirrus ep93xx pins mux controller
> +
> +maintainers:
> + - Nikita Shubin <nikita.shubin@maquefel.me>
> + - Alexander Sverdlin <alexander.sverdlin@gmail.com>
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: cirrus,ep9301-pinctrl
> + - items:
> + - enum:
> + - cirrus,ep9302-pinctrl
> + - cirrus,ep9307-pinctrl
> + - cirrus,ep9312-pinctrl
> + - cirrus,ep9315-pinctrl
> + - const: cirrus,ep9301-pinctrl
> +
> +patternProperties:
> + '^pins-':
> + type: object
> + description: pin node
> + $ref: pinmux-node.yaml#
Still missing unevaluatedProperties: false
> +
> + properties:
> + function:
> + enum: [ spi, ac97, i2s, pwm, keypad, pata, lcd, gpio ]
> +
> + groups:
> + enum: [ ssp, ac97, i2s_on_ssp, i2s_on_ac97, pwm1, gpio1agrp,
> + gpio2agrp, gpio3agrp, gpio4agrp, gpio6agrp, gpio7agrp,
> + rasteronsdram0grp, rasteronsdram3grp, keypadgrp, idegrp ]
> +
> + required:
> + - function
> + - groups
> +
> +required:
> + - compatible
> +
> +unevaluatedProperties: false
Why this was changed? I did not ask for this. I commented in different
place on different level of indentation.
This is unfortunately still wrong. :(
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 06/42] pinctrl: add a Cirrus ep93xx SoC pin controller
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (4 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 05/42] dt-bindings: pinctrl: Add " Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 8:10 ` [PATCH v4 07/42] dt-bindings: power: reset: Add ep93xx reset Nikita Shubin via B4 Relay
` (37 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-kernel, linux-gpio, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add a pin control (only multiplexing) driver for ep93xx SoC so
we can fully convert ep93xx to device tree.
This driver is capable of muxing ep9301/ep9302/ep9307/ep9312/ep9315
variants, this is chosen based on "compatible" in device tree.
Co-developed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/Kconfig | 7 +
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-ep93xx.c | 1429 ++++++++++++++++++++++++++++++++++++++
3 files changed, 1437 insertions(+)
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 57d57af1f624..9819dd491b8b 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -176,6 +176,13 @@ config PINCTRL_DIGICOLOR
select PINMUX
select GENERIC_PINCONF
+config PINCTRL_EP93XX
+ bool
+ depends on OF && (ARCH_EP93XX || COMPILE_TEST)
+ select PINMUX
+ select GENERIC_PINCONF
+ select MFD_SYSCON
+
config PINCTRL_EQUILIBRIUM
tristate "Generic pinctrl and GPIO driver for Intel Lightning Mountain SoC"
depends on OF && HAS_IOMEM
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 482b391b5deb..1f66d345bb91 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_PINCTRL_DA850_PUPD) += pinctrl-da850-pupd.o
obj-$(CONFIG_PINCTRL_DA9062) += pinctrl-da9062.o
obj-$(CONFIG_PINCTRL_DIGICOLOR) += pinctrl-digicolor.o
obj-$(CONFIG_PINCTRL_EQUILIBRIUM) += pinctrl-equilibrium.o
+obj-$(CONFIG_PINCTRL_EP93XX) += pinctrl-ep93xx.o
obj-$(CONFIG_PINCTRL_GEMINI) += pinctrl-gemini.o
obj-$(CONFIG_PINCTRL_INGENIC) += pinctrl-ingenic.o
obj-$(CONFIG_PINCTRL_K210) += pinctrl-k210.o
diff --git a/drivers/pinctrl/pinctrl-ep93xx.c b/drivers/pinctrl/pinctrl-ep93xx.c
new file mode 100644
index 000000000000..4f11986feeb8
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-ep93xx.c
@@ -0,0 +1,1429 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Driver for the EP93xx pin controller
+ * based on linux/drivers/pinctrl/pinmux-gemini.c
+ *
+ * Copyright (C) 2022 Nikita Shubin <nikita.shubin@maquefel.me>
+ *
+ * This is a group-only pin controller.
+ */
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/mfd/syscon.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/seq_file.h>
+#include <linux/slab.h>
+#include <linux/soc/cirrus/ep93xx.h>
+
+#include <linux/pinctrl/machine.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+
+#include "pinctrl-utils.h"
+
+#define DRIVER_NAME "pinctrl-ep93xx"
+
+enum ep93xx_pinctrl_model {
+ EP93XX_9301_PINCTRL,
+ EP93XX_9307_PINCTRL,
+ EP93XX_9312_PINCTRL,
+};
+
+struct ep93xx_pmx {
+ struct device *dev;
+ struct pinctrl_dev *pctl;
+ struct regmap *map;
+ enum ep93xx_pinctrl_model model;
+};
+
+struct ep93xx_pin_group {
+ struct pingroup grp;
+ u32 mask;
+ u32 value;
+};
+
+#define PMX_GROUP(_name, _pins, _mask, _value) \
+ { \
+ .grp = PINCTRL_PINGROUP(_name, _pins, ARRAY_SIZE(_pins)), \
+ .mask = _mask, \
+ .value = _value, \
+ }
+
+#define EP93XX_SYSCON_DEVCFG 0x80
+
+/*
+ * There are several system configuration options selectable by the DeviceCfg and SysCfg
+ * registers. These registers provide the selection of several pin multiplexing options and also
+ * provide software access to the system reset configuration options. Please refer to the
+ * descriptions of the registers, “DeviceCfg” on page 5-25 and “SysCfg” on page 5-34, for a
+ * detailed explanation.
+ */
+#define EP93XX_SYSCON_DEVCFG_D1ONG BIT(30) /* not used */
+#define EP93XX_SYSCON_DEVCFG_D0ONG BIT(29) /* not used */
+#define EP93XX_SYSCON_DEVCFG_IONU2 BIT(28) /* not used */
+#define EP93XX_SYSCON_DEVCFG_GONK BIT(27) /* done */
+#define EP93XX_SYSCON_DEVCFG_TONG BIT(26) /* not used */
+#define EP93XX_SYSCON_DEVCFG_MONG BIT(25) /* not used */
+#define EP93XX_SYSCON_DEVCFG_A2ONG BIT(22) /* not used */
+#define EP93XX_SYSCON_DEVCFG_A1ONG BIT(21) /* not used */
+#define EP93XX_SYSCON_DEVCFG_HONIDE BIT(11) /* done */
+#define EP93XX_SYSCON_DEVCFG_GONIDE BIT(10) /* done */
+#define EP93XX_SYSCON_DEVCFG_PONG BIT(9) /* done */
+#define EP93XX_SYSCON_DEVCFG_EONIDE BIT(8) /* done */
+#define EP93XX_SYSCON_DEVCFG_I2SONSSP BIT(7) /* done */
+#define EP93XX_SYSCON_DEVCFG_I2SONAC97 BIT(6) /* done */
+#define EP93XX_SYSCON_DEVCFG_RASONP3 BIT(4) /* done */
+
+#define PADS_MASK (GENMASK(30, 25) | BIT(22) | BIT(21) | GENMASK(11, 6) | BIT(4))
+#define PADS_MAXBIT 30
+
+/* Ordered by bit index */
+static const char * const ep93xx_padgroups[] = {
+ NULL, NULL, NULL, NULL,
+ "RasOnP3",
+ NULL,
+ "I2SonAC97",
+ "I2SonSSP",
+ "EonIDE",
+ "PonG",
+ "GonIDE",
+ "HonIDE",
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ "A1onG",
+ "A2onG",
+ NULL, NULL,
+ "MonG",
+ "TonG",
+ "GonK",
+ "IonU2",
+ "D0onG",
+ "D1onG",
+};
+
+/* ep9301, ep9302*/
+static const struct pinctrl_pin_desc ep9301_pins[] = {
+ PINCTRL_PIN(1, "CSn[7]"),
+ PINCTRL_PIN(2, "CSn[6]"),
+ PINCTRL_PIN(3, "CSn[3]"),
+ PINCTRL_PIN(4, "CSn[2]"),
+ PINCTRL_PIN(5, "CSn[1]"),
+ PINCTRL_PIN(6, "AD[25]"),
+ PINCTRL_PIN(7, "vdd_ring"),
+ PINCTRL_PIN(8, "gnd_ring"),
+ PINCTRL_PIN(9, "AD[24]"),
+ PINCTRL_PIN(10, "SDCLK"),
+ PINCTRL_PIN(11, "AD[23]"),
+ PINCTRL_PIN(12, "vdd_core"),
+ PINCTRL_PIN(13, "gnd_core"),
+ PINCTRL_PIN(14, "SDWEn"),
+ PINCTRL_PIN(15, "SDCSn[3]"),
+ PINCTRL_PIN(16, "SDCSn[2]"),
+ PINCTRL_PIN(17, "SDCSn[1]"),
+ PINCTRL_PIN(18, "SDCSn[0]"),
+ PINCTRL_PIN(19, "vdd_ring"),
+ PINCTRL_PIN(20, "gnd_ring"),
+ PINCTRL_PIN(21, "RASn"),
+ PINCTRL_PIN(22, "CASn"),
+ PINCTRL_PIN(23, "DQMn[1]"),
+ PINCTRL_PIN(24, "DQMn[0]"),
+ PINCTRL_PIN(25, "AD[22]"),
+ PINCTRL_PIN(26, "AD[21]"),
+ PINCTRL_PIN(27, "vdd_ring"),
+ PINCTRL_PIN(28, "gnd_ring"),
+ PINCTRL_PIN(29, "DA[15]"),
+ PINCTRL_PIN(30, "AD[7]"),
+ PINCTRL_PIN(31, "DA[14]"),
+ PINCTRL_PIN(32, "AD[6]"),
+ PINCTRL_PIN(33, "DA[13]"),
+ PINCTRL_PIN(34, "vdd_core"),
+ PINCTRL_PIN(35, "gnd_core"),
+ PINCTRL_PIN(36, "AD[5]"),
+ PINCTRL_PIN(37, "DA[12]"),
+ PINCTRL_PIN(38, "AD[4]"),
+ PINCTRL_PIN(39, "DA[11]"),
+ PINCTRL_PIN(40, "AD[3]"),
+ PINCTRL_PIN(41, "vdd_ring"),
+ PINCTRL_PIN(42, "gnd_ring"),
+ PINCTRL_PIN(43, "DA[10]"),
+ PINCTRL_PIN(44, "AD[2]"),
+ PINCTRL_PIN(45, "DA[9]"),
+ PINCTRL_PIN(46, "AD[1]"),
+ PINCTRL_PIN(47, "DA[8]"),
+ PINCTRL_PIN(48, "AD[0]"),
+ PINCTRL_PIN(49, "vdd_ring"),
+ PINCTRL_PIN(50, "gnd_ring"),
+ PINCTRL_PIN(51, "NC"),
+ PINCTRL_PIN(52, "NC"),
+ PINCTRL_PIN(53, "vdd_ring"),
+ PINCTRL_PIN(54, "gnd_ring"),
+ PINCTRL_PIN(55, "AD[15]"),
+ PINCTRL_PIN(56, "DA[7]"),
+ PINCTRL_PIN(57, "vdd_core"),
+ PINCTRL_PIN(58, "gnd_core"),
+ PINCTRL_PIN(59, "AD[14]"),
+ PINCTRL_PIN(60, "DA[6]"),
+ PINCTRL_PIN(61, "AD[13]"),
+ PINCTRL_PIN(62, "DA[5]"),
+ PINCTRL_PIN(63, "AD[12]"),
+ PINCTRL_PIN(64, "DA[4]"),
+ PINCTRL_PIN(65, "AD[11]"),
+ PINCTRL_PIN(66, "vdd_ring"),
+ PINCTRL_PIN(67, "gnd_ring"),
+ PINCTRL_PIN(68, "DA[3]"),
+ PINCTRL_PIN(69, "AD[10]"),
+ PINCTRL_PIN(70, "DA[2]"),
+ PINCTRL_PIN(71, "AD[9]"),
+ PINCTRL_PIN(72, "DA[1]"),
+ PINCTRL_PIN(73, "AD[8]"),
+ PINCTRL_PIN(74, "DA[0]"),
+ PINCTRL_PIN(75, "DSRn"),
+ PINCTRL_PIN(76, "DTRn"),
+ PINCTRL_PIN(77, "TCK"),
+ PINCTRL_PIN(78, "TDI"),
+ PINCTRL_PIN(79, "TDO"),
+ PINCTRL_PIN(80, "TMS"),
+ PINCTRL_PIN(81, "vdd_ring"),
+ PINCTRL_PIN(82, "gnd_ring"),
+ PINCTRL_PIN(83, "BOOT[1]"),
+ PINCTRL_PIN(84, "BOOT[0]"),
+ PINCTRL_PIN(85, "gnd_ring"),
+ PINCTRL_PIN(86, "NC"),
+ PINCTRL_PIN(87, "EECLK"),
+ PINCTRL_PIN(88, "EEDAT"),
+ PINCTRL_PIN(89, "ASYNC"),
+ PINCTRL_PIN(90, "vdd_core"),
+ PINCTRL_PIN(91, "gnd_core"),
+ PINCTRL_PIN(92, "ASDO"),
+ PINCTRL_PIN(93, "SCLK1"),
+ PINCTRL_PIN(94, "SFRM1"),
+ PINCTRL_PIN(95, "SSPRX1"),
+ PINCTRL_PIN(96, "SSPTX1"),
+ PINCTRL_PIN(97, "GRLED"),
+ PINCTRL_PIN(98, "RDLED"),
+ PINCTRL_PIN(99, "vdd_ring"),
+ PINCTRL_PIN(100, "gnd_ring"),
+ PINCTRL_PIN(101, "INT[3]"),
+ PINCTRL_PIN(102, "INT[1]"),
+ PINCTRL_PIN(103, "INT[0]"),
+ PINCTRL_PIN(104, "RTSn"),
+ PINCTRL_PIN(105, "USBm[0]"),
+ PINCTRL_PIN(106, "USBp[0]"),
+ PINCTRL_PIN(107, "ABITCLK"),
+ PINCTRL_PIN(108, "CTSn"),
+ PINCTRL_PIN(109, "RXD[0]"),
+ PINCTRL_PIN(110, "RXD[1]"),
+ PINCTRL_PIN(111, "vdd_ring"),
+ PINCTRL_PIN(112, "gnd_ring"),
+ PINCTRL_PIN(113, "TXD[0]"),
+ PINCTRL_PIN(114, "TXD[1]"),
+ PINCTRL_PIN(115, "CGPIO[0]"),
+ PINCTRL_PIN(116, "gnd_core"),
+ PINCTRL_PIN(117, "PLL_GND"),
+ PINCTRL_PIN(118, "XTALI"),
+ PINCTRL_PIN(119, "XTALO"),
+ PINCTRL_PIN(120, "PLL_VDD"),
+ PINCTRL_PIN(121, "vdd_core"),
+ PINCTRL_PIN(122, "gnd_ring"),
+ PINCTRL_PIN(123, "vdd_ring"),
+ PINCTRL_PIN(124, "RSTOn"),
+ PINCTRL_PIN(125, "PRSTn"),
+ PINCTRL_PIN(126, "CSn[0]"),
+ PINCTRL_PIN(127, "gnd_core"),
+ PINCTRL_PIN(128, "vdd_core"),
+ PINCTRL_PIN(129, "gnd_ring"),
+ PINCTRL_PIN(130, "vdd_ring"),
+ PINCTRL_PIN(131, "ADC[4]"),
+ PINCTRL_PIN(132, "ADC[3]"),
+ PINCTRL_PIN(133, "ADC[2]"),
+ PINCTRL_PIN(134, "ADC[1]"),
+ PINCTRL_PIN(135, "ADC[0]"),
+ PINCTRL_PIN(136, "ADC_VDD"),
+ PINCTRL_PIN(137, "RTCXTALI"),
+ PINCTRL_PIN(138, "RTCXTALO"),
+ PINCTRL_PIN(139, "ADC_GND"),
+ PINCTRL_PIN(140, "EGPIO[11]"),
+ PINCTRL_PIN(141, "EGPIO[10]"),
+ PINCTRL_PIN(142, "EGPIO[9]"),
+ PINCTRL_PIN(143, "EGPIO[8]"),
+ PINCTRL_PIN(144, "EGPIO[7]"),
+ PINCTRL_PIN(145, "EGPIO[6]"),
+ PINCTRL_PIN(146, "EGPIO[5]"),
+ PINCTRL_PIN(147, "EGPIO[4]"),
+ PINCTRL_PIN(148, "EGPIO[3]"),
+ PINCTRL_PIN(149, "gnd_ring"),
+ PINCTRL_PIN(150, "vdd_ring"),
+ PINCTRL_PIN(151, "EGPIO[2]"),
+ PINCTRL_PIN(152, "EGPIO[1]"),
+ PINCTRL_PIN(153, "EGPIO[0]"),
+ PINCTRL_PIN(154, "ARSTn"),
+ PINCTRL_PIN(155, "TRSTn"),
+ PINCTRL_PIN(156, "ASDI"),
+ PINCTRL_PIN(157, "USBm[2]"),
+ PINCTRL_PIN(158, "USBp[2]"),
+ PINCTRL_PIN(159, "WAITn"),
+ PINCTRL_PIN(160, "EGPIO[15]"),
+ PINCTRL_PIN(161, "gnd_ring"),
+ PINCTRL_PIN(162, "vdd_ring"),
+ PINCTRL_PIN(163, "EGPIO[14]"),
+ PINCTRL_PIN(164, "EGPIO[13]"),
+ PINCTRL_PIN(165, "EGPIO[12]"),
+ PINCTRL_PIN(166, "gnd_core"),
+ PINCTRL_PIN(167, "vdd_core"),
+ PINCTRL_PIN(168, "FGPIO[3]"),
+ PINCTRL_PIN(169, "FGPIO[2]"),
+ PINCTRL_PIN(170, "FGPIO[1]"),
+ PINCTRL_PIN(171, "gnd_ring"),
+ PINCTRL_PIN(172, "vdd_ring"),
+ PINCTRL_PIN(173, "CLD"),
+ PINCTRL_PIN(174, "CRS"),
+ PINCTRL_PIN(175, "TXERR"),
+ PINCTRL_PIN(176, "TXEN"),
+ PINCTRL_PIN(177, "MIITXD[0]"),
+ PINCTRL_PIN(178, "MIITXD[1]"),
+ PINCTRL_PIN(179, "MIITXD[2]"),
+ PINCTRL_PIN(180, "MIITXD[3]"),
+ PINCTRL_PIN(181, "TXCLK"),
+ PINCTRL_PIN(182, "RXERR"),
+ PINCTRL_PIN(183, "RXDVAL"),
+ PINCTRL_PIN(184, "MIIRXD[0]"),
+ PINCTRL_PIN(185, "MIIRXD[1]"),
+ PINCTRL_PIN(186, "MIIRXD[2]"),
+ PINCTRL_PIN(187, "gnd_ring"),
+ PINCTRL_PIN(188, "vdd_ring"),
+ PINCTRL_PIN(189, "MIIRXD[3]"),
+ PINCTRL_PIN(190, "RXCLK"),
+ PINCTRL_PIN(191, "MDIO"),
+ PINCTRL_PIN(192, "MDC"),
+ PINCTRL_PIN(193, "RDn"),
+ PINCTRL_PIN(194, "WRn"),
+ PINCTRL_PIN(195, "AD[16]"),
+ PINCTRL_PIN(196, "AD[17]"),
+ PINCTRL_PIN(197, "gnd_core"),
+ PINCTRL_PIN(198, "vdd_core"),
+ PINCTRL_PIN(199, "HGPIO[2]"),
+ PINCTRL_PIN(200, "HGPIO[3]"),
+ PINCTRL_PIN(201, "HGPIO[4]"),
+ PINCTRL_PIN(202, "HGPIO[5]"),
+ PINCTRL_PIN(203, "gnd_ring"),
+ PINCTRL_PIN(204, "vdd_ring"),
+ PINCTRL_PIN(205, "AD[18]"),
+ PINCTRL_PIN(206, "AD[19]"),
+ PINCTRL_PIN(207, "AD[20]"),
+ PINCTRL_PIN(208, "SDCLKEN"),
+};
+
+static const unsigned int ssp_ep9301_pins[] = {
+ 93, 94, 95, 96
+};
+
+static const unsigned int ac97_ep9301_pins[] = {
+ 89, 92, 107, 154, 156
+};
+
+/*
+ * Note: The EP9307 processor has one PWM with one output, PWMOUT.
+ * Note: The EP9301, EP9302, EP9312, and EP9315 processors each have two PWMs with
+ * two outputs, PWMOUT and PWMO1. PWMO1 is an alternate function for EGPIO14.
+ */
+/* The GPIO14E (14) pin overlap with pwm1 */
+static const unsigned int pwm_9301_pins[] = { 163 };
+
+static const unsigned int gpio1a_9301_pins[] = { 163 };
+
+/* ep9301/9302 have only 0 pin of GPIO C Port exposed */
+static const unsigned int gpio2a_9301_pins[] = { 115 };
+
+/* ep9301/9302 have only 4,5 pin of GPIO E Port exposed */
+static const unsigned int gpio4a_9301_pins[] = { 97, 98 };
+
+/* ep9301/9302 have only 4,5 pin of GPIO G Port exposed */
+static const unsigned int gpio6a_9301_pins[] = { 87, 88 };
+
+static const unsigned int gpio7a_9301_pins[] = { 199, 200, 201, 202 };
+
+/* Groups for the ep9301/ep9302 SoC/package */
+static const struct ep93xx_pin_group ep9301_pin_groups[] = {
+ PMX_GROUP("ssp", ssp_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP, 0),
+ PMX_GROUP("i2s_on_ssp", ssp_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP,
+ EP93XX_SYSCON_DEVCFG_I2SONSSP),
+ PMX_GROUP("ac97", ac97_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97, 0),
+ PMX_GROUP("i2s_on_ac97", ac97_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97,
+ EP93XX_SYSCON_DEVCFG_I2SONAC97),
+ PMX_GROUP("pwm1", pwm_9301_pins, EP93XX_SYSCON_DEVCFG_PONG, EP93XX_SYSCON_DEVCFG_PONG),
+ PMX_GROUP("gpio1agrp", gpio1a_9301_pins, EP93XX_SYSCON_DEVCFG_PONG, 0),
+ PMX_GROUP("gpio2agrp", gpio2a_9301_pins, EP93XX_SYSCON_DEVCFG_GONK,
+ EP93XX_SYSCON_DEVCFG_GONK),
+ PMX_GROUP("gpio4agrp", gpio4a_9301_pins, EP93XX_SYSCON_DEVCFG_EONIDE,
+ EP93XX_SYSCON_DEVCFG_EONIDE),
+ PMX_GROUP("gpio6agrp", gpio6a_9301_pins, EP93XX_SYSCON_DEVCFG_GONIDE,
+ EP93XX_SYSCON_DEVCFG_GONIDE),
+ PMX_GROUP("gpio7agrp", gpio7a_9301_pins, EP93XX_SYSCON_DEVCFG_HONIDE,
+ EP93XX_SYSCON_DEVCFG_HONIDE),
+};
+
+static const struct pinctrl_pin_desc ep9307_pins[] = {
+ /* Row A */
+ PINCTRL_PIN(0, "CSn[1]"), /* A1 */
+ PINCTRL_PIN(1, "CSn[7]"), /* A2 */
+ PINCTRL_PIN(2, "SDCLKEN"), /* A3 */
+ PINCTRL_PIN(3, "DA[31]"), /* A4 */
+ PINCTRL_PIN(4, "DA[29]"), /* A5 */
+ PINCTRL_PIN(5, "DA[27]"), /* A6 */
+ PINCTRL_PIN(6, "HGPIO[2]"), /* A7 */
+ PINCTRL_PIN(7, "RDn"), /* A8 */
+ PINCTRL_PIN(8, "MIIRXD[3]"), /* A9 */
+ PINCTRL_PIN(9, "RXDVAL"), /* A10 */
+ PINCTRL_PIN(10, "MIITXD[1]"), /* A11 */
+ PINCTRL_PIN(11, "CRS"), /* A12 */
+ PINCTRL_PIN(12, "FGPIO[7]"), /* A13 */
+ PINCTRL_PIN(13, "FGPIO[0]"), /* A14 */
+ PINCTRL_PIN(14, "WAITn"), /* A15 */
+ PINCTRL_PIN(15, "USBm[2]"), /* A16 */
+ PINCTRL_PIN(16, "ASDI"), /* A17 */
+ /* Row B*/
+ PINCTRL_PIN(17, "AD[25]"), /* B1 */
+ PINCTRL_PIN(18, "CSn[2]"), /* B2 */
+ PINCTRL_PIN(19, "CSn[6]"), /* B3 */
+ PINCTRL_PIN(20, "AD[20]"), /* B4 */
+ PINCTRL_PIN(21, "DA[30]"), /* B5 */
+ PINCTRL_PIN(22, "AD[18]"), /* B6 */
+ PINCTRL_PIN(23, "HGPIO[3]"), /* B7 */
+ PINCTRL_PIN(24, "AD[17]"), /* B8 */
+ PINCTRL_PIN(25, "RXCLK"), /* B9 */
+ PINCTRL_PIN(26, "MIIRXD[1]"), /* B10 */
+ PINCTRL_PIN(27, "MIITXD[2]"), /* B11 */
+ PINCTRL_PIN(28, "TXEN"), /* B12 */
+ PINCTRL_PIN(29, "FGPIO[5]"), /* B13 */
+ PINCTRL_PIN(30, "EGPIO[15]"), /* B14 */
+ PINCTRL_PIN(31, "USBp[2]"), /* B15 */
+ PINCTRL_PIN(32, "ARSTn"), /* B16 */
+ PINCTRL_PIN(33, "ADC_VDD"), /* B17 */
+ /* Row C*/
+ PINCTRL_PIN(34, "AD[23]"), /* C1 */
+ PINCTRL_PIN(35, "DA[26]"), /* C2 */
+ PINCTRL_PIN(36, "CSn[3]"), /* C3 */
+ PINCTRL_PIN(37, "DA[25]"), /* C4 */
+ PINCTRL_PIN(38, "AD[24]"), /* C5 */
+ PINCTRL_PIN(39, "AD[19]"), /* C6 */
+ PINCTRL_PIN(40, "HGPIO[5]"), /* C7 */
+ PINCTRL_PIN(41, "WRn"), /* C8 */
+ PINCTRL_PIN(42, "MDIO"), /* C9 */
+ PINCTRL_PIN(43, "MIIRXD[2]"), /* C10 */
+ PINCTRL_PIN(44, "TXCLK"), /* C11 */
+ PINCTRL_PIN(45, "MIITXD[0]"), /* C12 */
+ PINCTRL_PIN(46, "CLD"), /* C13 */
+ PINCTRL_PIN(47, "EGPIO[13]"), /* C14 */
+ PINCTRL_PIN(48, "TRSTn"), /* C15 */
+ PINCTRL_PIN(49, "Xp"), /* C16 */
+ PINCTRL_PIN(50, "Xm"), /* C17 */
+ /* Row D*/
+ PINCTRL_PIN(51, "SDCSn[3]"), /* D1 */
+ PINCTRL_PIN(52, "DA[23]"), /* D2 */
+ PINCTRL_PIN(53, "SDCLK"), /* D3 */
+ PINCTRL_PIN(54, "DA[24]"), /* D4 */
+ PINCTRL_PIN(55, "HGPIO[7]"), /* D5 */
+ PINCTRL_PIN(56, "HGPIO[6]"), /* D6 */
+ PINCTRL_PIN(57, "A[28]"), /* D7 */
+ PINCTRL_PIN(58, "HGPIO[4]"), /* D8 */
+ PINCTRL_PIN(59, "AD[16]"), /* D9 */
+ PINCTRL_PIN(60, "MDC"), /* D10 */
+ PINCTRL_PIN(61, "RXERR"), /* D11 */
+ PINCTRL_PIN(62, "MIITXD[3]"), /* D12 */
+ PINCTRL_PIN(63, "EGPIO[12]"), /* D13 */
+ PINCTRL_PIN(64, "EGPIO[1]"), /* D14 */
+ PINCTRL_PIN(65, "EGPIO[0]"), /* D15 */
+ PINCTRL_PIN(66, "Ym"), /* D16 */
+ PINCTRL_PIN(67, "Yp"), /* D17 */
+ /* Row E */
+ PINCTRL_PIN(68, "SDCSn[2]"), /* E1 */
+ PINCTRL_PIN(69, "SDWEN"), /* E2 */
+ PINCTRL_PIN(70, "DA[22]"), /* E3 */
+ PINCTRL_PIN(71, "AD[3]"), /* E4 */
+ PINCTRL_PIN(72, "DA[15]"), /* E5 */
+ PINCTRL_PIN(73, "AD[21]"), /* E6 */
+ PINCTRL_PIN(74, "DA[17]"), /* E7 */
+ PINCTRL_PIN(75, "vddr"), /* E8 */
+ PINCTRL_PIN(76, "vddr"), /* E9 */
+ PINCTRL_PIN(77, "vddr"), /* E10 */
+ PINCTRL_PIN(78, "MIIRXD[0]"), /* E11 */
+ PINCTRL_PIN(79, "TXERR"), /* E12 */
+ PINCTRL_PIN(80, "EGPIO[2]"), /* E13 */
+ PINCTRL_PIN(81, "EGPIO[4]"), /* E14 */
+ PINCTRL_PIN(82, "EGPIO[3]"), /* E15 */
+ PINCTRL_PIN(83, "sXp"), /* E16 */
+ PINCTRL_PIN(84, "sXm"), /* E17 */
+ /* Row F*/
+ PINCTRL_PIN(85, "RASn"), /* F1 */
+ PINCTRL_PIN(86, "SDCSn[1]"), /* F2 */
+ PINCTRL_PIN(87, "SDCSn[0]"), /* F3 */
+ PINCTRL_PIN(88, "DQMn[3]"), /* F4 */
+ PINCTRL_PIN(89, "AD[5]"), /* F5 */
+ PINCTRL_PIN(90, "gndr"), /* F6 */
+ PINCTRL_PIN(91, "gndr"), /* F7 */
+ PINCTRL_PIN(92, "gndr"), /* F8 */
+ PINCTRL_PIN(93, "vddc"), /* F9 */
+ PINCTRL_PIN(94, "vddc"), /* F10 */
+ PINCTRL_PIN(95, "gndr"), /* F11 */
+ PINCTRL_PIN(96, "EGPIO[7]"), /* F12 */
+ PINCTRL_PIN(97, "EGPIO[5]"), /* F13 */
+ PINCTRL_PIN(98, "ADC GND"), /* F14 */
+ PINCTRL_PIN(99, "EGPIO[6]"), /* F15 */
+ PINCTRL_PIN(100, "sYm"), /* F16 */
+ PINCTRL_PIN(101, "syp"), /* F17 */
+ /* Row G */
+ PINCTRL_PIN(102, "DQMn[0]"), /* G1 */
+ PINCTRL_PIN(103, "CASn"), /* G2 */
+ PINCTRL_PIN(104, "DA[21]"), /* G3 */
+ PINCTRL_PIN(105, "AD[22]"), /* G4 */
+ PINCTRL_PIN(106, "vddr"), /* G5 */
+ PINCTRL_PIN(107, "gndr"), /* G6 */
+ PINCTRL_PIN(108, "gndr"), /* G12 */
+ PINCTRL_PIN(109, "EGPIO[9]"), /* G13 */
+ PINCTRL_PIN(110, "EGPIO[10]"), /* G14 */
+ PINCTRL_PIN(111, "EGPIO[11]"), /* G15 */
+ PINCTRL_PIN(112, "RTCXTALO"), /* G16 */
+ PINCTRL_PIN(113, "RTCXTALI"), /* G17 */
+ /* Row H */
+ PINCTRL_PIN(114, "DA[18]"), /* H1 */
+ PINCTRL_PIN(115, "DA[20]"), /* H2 */
+ PINCTRL_PIN(116, "DA[19]"), /* H3 */
+ PINCTRL_PIN(117, "DA[16]"), /* H4 */
+ PINCTRL_PIN(118, "vddr"), /* H5 */
+ PINCTRL_PIN(119, "vddc"), /* H6 */
+ PINCTRL_PIN(120, "gndc"), /* H7 */
+ PINCTRL_PIN(121, "gndc"), /* H9 */
+ PINCTRL_PIN(122, "gndc"), /* H10 */
+ PINCTRL_PIN(123, "gndr"), /* H12 */
+ PINCTRL_PIN(124, "vddr"), /* H13 */
+ PINCTRL_PIN(125, "EGPIO[8]"), /* H14 */
+ PINCTRL_PIN(126, "PRSTN"), /* H15 */
+ PINCTRL_PIN(127, "COL[7]"), /* H16 */
+ PINCTRL_PIN(128, "RSTON"), /* H17 */
+ /* Row J */
+ PINCTRL_PIN(129, "AD[6]"), /* J1 */
+ PINCTRL_PIN(130, "DA[14]"), /* J2 */
+ PINCTRL_PIN(131, "AD[7]"), /* J3 */
+ PINCTRL_PIN(132, "DA[13]"), /* J4 */
+ PINCTRL_PIN(133, "vddr"), /* J5 */
+ PINCTRL_PIN(134, "vddc"), /* J6 */
+ PINCTRL_PIN(135, "gndc"), /* J8 */
+ PINCTRL_PIN(136, "gndc"), /* J10 */
+ PINCTRL_PIN(137, "vddc"), /* J12 */
+ PINCTRL_PIN(138, "vddr"), /* J13 */
+ PINCTRL_PIN(139, "COL[5]"), /* J14 */
+ PINCTRL_PIN(140, "COL[6]"), /* J15 */
+ PINCTRL_PIN(141, "CSn[0]"), /* J16 */
+ PINCTRL_PIN(142, "COL[3]"), /* J17 */
+ /* Row K */
+ PINCTRL_PIN(143, "AD[4]"), /* K1 */
+ PINCTRL_PIN(144, "DA[12]"), /* K2 */
+ PINCTRL_PIN(145, "DA[10]"), /* K3 */
+ PINCTRL_PIN(146, "DA[11]"), /* K4 */
+ PINCTRL_PIN(147, "vddr"), /* K5 */
+ PINCTRL_PIN(148, "gndr"), /* K6 */
+ PINCTRL_PIN(149, "gndc"), /* K8 */
+ PINCTRL_PIN(150, "gndc"), /* K9 */
+ PINCTRL_PIN(151, "gndc"), /* K10 */
+ PINCTRL_PIN(152, "vddc"), /* K12 */
+ PINCTRL_PIN(153, "COL[4]"), /* K13 */
+ PINCTRL_PIN(154, "PLL_VDD"), /* K14 */
+ PINCTRL_PIN(155, "COL[2]"), /* K15 */
+ PINCTRL_PIN(156, "COL[1]"), /* K16 */
+ PINCTRL_PIN(157, "COL[0]"), /* K17 */
+ /* Row L */
+ PINCTRL_PIN(158, "DA[9]"), /* L1 */
+ PINCTRL_PIN(159, "AD[2]"), /* L2 */
+ PINCTRL_PIN(160, "AD[1]"), /* L3 */
+ PINCTRL_PIN(161, "DA[8]"), /* L4 */
+ PINCTRL_PIN(162, "BLANK"), /* L5 */
+ PINCTRL_PIN(163, "gndr"), /* L6 */
+ PINCTRL_PIN(164, "gndr"), /* L7 */
+ PINCTRL_PIN(165, "ROW[7]"), /* L8 */
+ PINCTRL_PIN(166, "ROW[5]"), /* L9 */
+ PINCTRL_PIN(167, "PLL GND"), /* L10 */
+ PINCTRL_PIN(168, "XTALI"), /* L11 */
+ PINCTRL_PIN(169, "XTALO"), /* L12 */
+ /* Row M */
+ PINCTRL_PIN(170, "BRIGHT"), /* M1 */
+ PINCTRL_PIN(171, "AD[0]"), /* M2 */
+ PINCTRL_PIN(172, "DQMn[1]"), /* M3 */
+ PINCTRL_PIN(173, "DQMn[2]"), /* M4 */
+ PINCTRL_PIN(174, "P[17]"), /* M5 */
+ PINCTRL_PIN(175, "gndr"), /* M6 */
+ PINCTRL_PIN(176, "gndr"), /* M7 */
+ PINCTRL_PIN(177, "vddc"), /* M8 */
+ PINCTRL_PIN(178, "vddc"), /* M9 */
+ PINCTRL_PIN(179, "gndr"), /* M10 */
+ PINCTRL_PIN(180, "gndr"), /* M11 */
+ PINCTRL_PIN(181, "ROW[6]"), /* M12 */
+ PINCTRL_PIN(182, "ROW[4]"), /* M13 */
+ PINCTRL_PIN(183, "ROW[1]"), /* M14 */
+ PINCTRL_PIN(184, "ROW[0]"), /* M15 */
+ PINCTRL_PIN(185, "ROW[3]"), /* M16 */
+ PINCTRL_PIN(186, "ROW[2]"), /* M17 */
+ /* Row N */
+ PINCTRL_PIN(187, "P[14]"), /* N1 */
+ PINCTRL_PIN(188, "P[16]"), /* N2 */
+ PINCTRL_PIN(189, "P[15]"), /* N3 */
+ PINCTRL_PIN(190, "P[13]"), /* N4 */
+ PINCTRL_PIN(191, "P[12]"), /* N5 */
+ PINCTRL_PIN(192, "DA[5]"), /* N6 */
+ PINCTRL_PIN(193, "vddr"), /* N7 */
+ PINCTRL_PIN(194, "vddr"), /* N8 */
+ PINCTRL_PIN(195, "vddr"), /* N9 */
+ PINCTRL_PIN(196, "vddr"), /* N10 */
+ PINCTRL_PIN(197, "EECLK"), /* N11 */
+ PINCTRL_PIN(198, "ASDO"), /* N12 */
+ PINCTRL_PIN(199, "CTSn"), /* N13 */
+ PINCTRL_PIN(200, "RXD[0]"), /* N14 */
+ PINCTRL_PIN(201, "TXD[0]"), /* N15 */
+ PINCTRL_PIN(202, "TXD[1]"), /* N16 */
+ PINCTRL_PIN(203, "TXD[2]"), /* N17 */
+ /* Row P */
+ PINCTRL_PIN(204, "SPCLK"), /* P1 */
+ PINCTRL_PIN(205, "P[10]"), /* P2 */
+ PINCTRL_PIN(206, "P[11]"), /* P3 */
+ PINCTRL_PIN(207, "P[3]"), /* P4 */
+ PINCTRL_PIN(208, "AD[15]"), /* P5 */
+ PINCTRL_PIN(209, "AD[13]"), /* P6 */
+ PINCTRL_PIN(210, "AD[12]"), /* P7 */
+ PINCTRL_PIN(211, "DA[2]"), /* P8 */
+ PINCTRL_PIN(212, "AD[8]"), /* P9 */
+ PINCTRL_PIN(213, "TCK"), /* P10 */
+ PINCTRL_PIN(214, "BOOT[1]"), /* P11 */
+ PINCTRL_PIN(215, "EEDAT"), /* P12 */
+ PINCTRL_PIN(216, "GRLED"), /* P13 */
+ PINCTRL_PIN(217, "RDLED"), /* P14 */
+ PINCTRL_PIN(218, "GGPIO[2]"), /* P15 */
+ PINCTRL_PIN(219, "RXD[1]"), /* P16 */
+ PINCTRL_PIN(220, "RXD[2]"), /* P17 */
+ /* Row R */
+ PINCTRL_PIN(221, "P[9]"), /* R1 */
+ PINCTRL_PIN(222, "HSYNC"), /* R2 */
+ PINCTRL_PIN(223, "P[6]"), /* R3 */
+ PINCTRL_PIN(224, "P[5]"), /* R4 */
+ PINCTRL_PIN(225, "P[0]"), /* R5 */
+ PINCTRL_PIN(226, "AD[14]"), /* R6 */
+ PINCTRL_PIN(227, "DA[4]"), /* R7 */
+ PINCTRL_PIN(228, "DA[1]"), /* R8 */
+ PINCTRL_PIN(229, "DTRn"), /* R9 */
+ PINCTRL_PIN(230, "TDI"), /* R10 */
+ PINCTRL_PIN(231, "BOOT[0]"), /* R11 */
+ PINCTRL_PIN(232, "ASYNC"), /* R12 */
+ PINCTRL_PIN(233, "SSPTX[1]"), /* R13 */
+ PINCTRL_PIN(234, "PWMOUT"), /* R14 */
+ PINCTRL_PIN(235, "USBm[0]"), /* R15 */
+ PINCTRL_PIN(236, "ABITCLK"), /* R16 */
+ PINCTRL_PIN(237, "USBp[0]"), /* R17 */
+ /* Row T */
+ PINCTRL_PIN(238, "NC"), /* T1 */
+ PINCTRL_PIN(239, "NC"), /* T2 */
+ PINCTRL_PIN(240, "V_CSYNC"), /* T3 */
+ PINCTRL_PIN(241, "P[7]"), /* T4 */
+ PINCTRL_PIN(242, "P[2]"), /* T5 */
+ PINCTRL_PIN(243, "DA[7]"), /* T6 */
+ PINCTRL_PIN(244, "AD[11]"), /* T7 */
+ PINCTRL_PIN(245, "AD[9]"), /* T8 */
+ PINCTRL_PIN(246, "DSRn"), /* T9 */
+ PINCTRL_PIN(247, "TMS"), /* T10 */
+ PINCTRL_PIN(248, "gndr"), /* T11 */
+ PINCTRL_PIN(249, "SFRM[1]"), /* T12 */
+ PINCTRL_PIN(250, "INT[2]"), /* T13 */
+ PINCTRL_PIN(251, "INT[0]"), /* T14 */
+ PINCTRL_PIN(252, "USBp[1]"), /* T15 */
+ PINCTRL_PIN(253, "NC"), /* T16 */
+ PINCTRL_PIN(254, "NC"), /* T17 */
+ /* Row U */
+ PINCTRL_PIN(255, "NC"), /* U1 */
+ PINCTRL_PIN(256, "NC"), /* U2 */
+ PINCTRL_PIN(257, "P[8]"), /* U3 */
+ PINCTRL_PIN(258, "P[4]"), /* U4 */
+ PINCTRL_PIN(259, "P[1]"), /* U5 */
+ PINCTRL_PIN(260, "DA[6]"), /* U6 */
+ PINCTRL_PIN(261, "DA[3]"), /* U7 */
+ PINCTRL_PIN(262, "AD[10]"), /* U8 */
+ PINCTRL_PIN(263, "DA[0]"), /* U9 */
+ PINCTRL_PIN(264, "TDO"), /* U10 */
+ PINCTRL_PIN(265, "NC"), /* U11 */
+ PINCTRL_PIN(266, "SCLK[1]"), /* U12 */
+ PINCTRL_PIN(267, "SSPRX[1]"), /* U13 */
+ PINCTRL_PIN(268, "INT[1]"), /* U14 */
+ PINCTRL_PIN(269, "RTSn"), /* U15 */
+ PINCTRL_PIN(270, "USBm[1]"), /* U16 */
+ PINCTRL_PIN(271, "NC"), /* U17 */
+};
+
+static const unsigned int ssp_ep9307_pins[] = {
+ 233, 249, 266, 267
+};
+
+static const unsigned int ac97_ep9307_pins[] = {
+ 16, 32, 198, 232, 236
+};
+
+/* I can't find info on those - it's some internal state */
+static const unsigned int raster_on_sdram0_pins[] = {
+};
+
+static const unsigned int raster_on_sdram3_pins[] = {
+};
+
+/* ROW[N] */
+static const unsigned int gpio2a_9307_pins[] = {
+ 165, 166, 181, 182, 183, 184, 185, 186
+};
+
+/* COL[N] */
+static const unsigned int gpio3a_9307_pins[] = {
+ 127, 139, 140, 142, 153, 155, 156, 157
+};
+
+static const unsigned int keypad_9307_pins[] = {
+ 127, 139, 140, 142, 153, 155, 156, 157,
+ 165, 166, 181, 182, 183, 184, 185, 186
+};
+
+/* ep9307 have only 4,5 pin of GPIO E Port exposed */
+static const unsigned int gpio4a_9307_pins[] = { 216, 217 };
+
+/* ep9307 have only 2 pin of GPIO G Port exposed */
+static const unsigned int gpio6a_9307_pins[] = { 219 };
+
+static const unsigned int gpio7a_9307_pins[] = { 7, 24, 41, 56, 57, 59 };
+
+static const struct ep93xx_pin_group ep9307_pin_groups[] = {
+ PMX_GROUP("ssp", ssp_ep9307_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP, 0),
+ PMX_GROUP("i2s_on_ssp", ssp_ep9307_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP,
+ EP93XX_SYSCON_DEVCFG_I2SONSSP),
+ PMX_GROUP("ac97", ac97_ep9307_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97, 0),
+ PMX_GROUP("i2s_on_ac97", ac97_ep9301_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97,
+ EP93XX_SYSCON_DEVCFG_I2SONAC97),
+ PMX_GROUP("rasteronsdram0grp", raster_on_sdram0_pins, EP93XX_SYSCON_DEVCFG_RASONP3, 0),
+ PMX_GROUP("rasteronsdram3grp", raster_on_sdram0_pins, EP93XX_SYSCON_DEVCFG_RASONP3,
+ EP93XX_SYSCON_DEVCFG_RASONP3),
+ PMX_GROUP("gpio2agrp", gpio2a_9307_pins, EP93XX_SYSCON_DEVCFG_GONK,
+ EP93XX_SYSCON_DEVCFG_GONK),
+ PMX_GROUP("gpio3agrp", gpio3a_9307_pins, EP93XX_SYSCON_DEVCFG_GONK,
+ EP93XX_SYSCON_DEVCFG_GONK),
+ PMX_GROUP("keypadgrp", keypad_9307_pins, EP93XX_SYSCON_DEVCFG_GONK, 0),
+ PMX_GROUP("gpio4agrp", gpio4a_9307_pins, EP93XX_SYSCON_DEVCFG_EONIDE,
+ EP93XX_SYSCON_DEVCFG_EONIDE),
+ PMX_GROUP("gpio6agrp", gpio6a_9307_pins, EP93XX_SYSCON_DEVCFG_GONIDE,
+ EP93XX_SYSCON_DEVCFG_GONIDE),
+ PMX_GROUP("gpio7agrp", gpio7a_9307_pins, EP93XX_SYSCON_DEVCFG_HONIDE,
+ EP93XX_SYSCON_DEVCFG_HONIDE),
+};
+
+/* ep9312, ep9315 */
+static const struct pinctrl_pin_desc ep9312_pins[] = {
+ /* Row A */
+ PINCTRL_PIN(0, "CSN[7]"), /* A1 */
+ PINCTRL_PIN(1, "DA[28]"), /* A2 */
+ PINCTRL_PIN(2, "AD[18]"), /* A3 */
+ PINCTRL_PIN(3, "DD[8]"), /* A4 */
+ PINCTRL_PIN(4, "DD[4]"), /* A5 */
+ PINCTRL_PIN(5, "AD[17]"), /* A6 */
+ PINCTRL_PIN(6, "RDN"), /* A7 */
+ PINCTRL_PIN(7, "RXCLK"), /* A8 */
+ PINCTRL_PIN(8, "MIIRXD[0]"), /* A9 */
+ PINCTRL_PIN(9, "RXDVAL"), /* A10 */
+ PINCTRL_PIN(10, "MIITXD[2]"), /* A11 */
+ PINCTRL_PIN(11, "TXERR"), /* A12 */
+ PINCTRL_PIN(12, "CLD"), /* A13 */
+ PINCTRL_PIN(13, "NC"), /* A14 */
+ PINCTRL_PIN(14, "NC"), /* A15 */
+ PINCTRL_PIN(15, "NC"), /* A16 */
+ PINCTRL_PIN(16, "EGPIO[12]"), /* A17 */
+ PINCTRL_PIN(17, "EGPIO[15]"), /* A18 */
+ PINCTRL_PIN(18, "NC"), /* A19 */
+ PINCTRL_PIN(19, "NC"), /* A20 */
+ /* Row B */
+ PINCTRL_PIN(20, "CSN[2]"), /* B1 */
+ PINCTRL_PIN(21, "DA[31]"), /* B2 */
+ PINCTRL_PIN(22, "DA[30]"), /* B3 */
+ PINCTRL_PIN(23, "DA[27]"), /* B4 */
+ PINCTRL_PIN(24, "DD[7]"), /* B5 */
+ PINCTRL_PIN(25, "DD[3]"), /* B6 */
+ PINCTRL_PIN(26, "WRN"), /* B7 */
+ PINCTRL_PIN(27, "MDIO"), /* B8 */
+ PINCTRL_PIN(28, "MIIRXD[1]"), /* B9 */
+ PINCTRL_PIN(29, "RXERR"), /* B10 */
+ PINCTRL_PIN(30, "MIITXD[1]"), /* B11 */
+ PINCTRL_PIN(31, "CRS"), /* B12 */
+ PINCTRL_PIN(32, "NC"), /* B13 */
+ PINCTRL_PIN(33, "NC"), /* B14 */
+ PINCTRL_PIN(34, "NC"), /* B15 */
+ PINCTRL_PIN(35, "NC"), /* B16 */
+ PINCTRL_PIN(36, "EGPIO[13]"), /* B17 */
+ PINCTRL_PIN(37, "NC"), /* B18 */
+ PINCTRL_PIN(38, "WAITN"), /* B19 */
+ PINCTRL_PIN(39, "TRSTN"), /* B20 */
+ /* Row C */
+ PINCTRL_PIN(40, "CSN[1]"), /* C1 */
+ PINCTRL_PIN(41, "CSN[3]"), /* C2 */
+ PINCTRL_PIN(42, "AD[20]"), /* C3 */
+ PINCTRL_PIN(43, "DA[29]"), /* C4 */
+ PINCTRL_PIN(44, "DD[10]"), /* C5 */
+ PINCTRL_PIN(45, "DD[6]"), /* C6 */
+ PINCTRL_PIN(46, "DD[2]"), /* C7 */
+ PINCTRL_PIN(47, "MDC"), /* C8 */
+ PINCTRL_PIN(48, "MIIRXD[3]"), /* C9 */
+ PINCTRL_PIN(49, "TXCLK"), /* C10 */
+ PINCTRL_PIN(50, "MIITXD[0]"), /* C11 */
+ PINCTRL_PIN(51, "NC"), /* C12 */
+ PINCTRL_PIN(52, "NC"), /* C13 */
+ PINCTRL_PIN(53, "NC"), /* C14 */
+ PINCTRL_PIN(54, "NC"), /* C15 */
+ PINCTRL_PIN(55, "NC"), /* C16 */
+ PINCTRL_PIN(56, "NC"), /* C17 */
+ PINCTRL_PIN(57, "USBP[2]"), /* C18 */
+ PINCTRL_PIN(58, "IORDY"), /* C19 */
+ PINCTRL_PIN(59, "DMACKN"), /* C20 */
+ /* Row D */
+ PINCTRL_PIN(60, "AD[24]"), /* D1 */
+ PINCTRL_PIN(61, "DA[25]"), /* D2 */
+ PINCTRL_PIN(62, "DD[11]"), /* D3 */
+ PINCTRL_PIN(63, "SDCLKEN"), /* D4 */
+ PINCTRL_PIN(64, "AD[19]"), /* D5 */
+ PINCTRL_PIN(65, "DD[9]"), /* D6 */
+ PINCTRL_PIN(66, "DD[5]"), /* D7 */
+ PINCTRL_PIN(67, "AD[16]"), /* D8 */
+ PINCTRL_PIN(68, "MIIRXD[2]"), /* D9 */
+ PINCTRL_PIN(69, "MIITXD[3]"), /* D10 */
+ PINCTRL_PIN(70, "TXEN"), /* D11 */
+ PINCTRL_PIN(71, "NC"), /* D12 */
+ PINCTRL_PIN(72, "NC"), /* D13 */
+ PINCTRL_PIN(73, "NC"), /* D14 */
+ PINCTRL_PIN(74, "EGPIO[14]"), /* D15 */
+ PINCTRL_PIN(75, "NC"), /* D16 */
+ PINCTRL_PIN(76, "USBM[2]"), /* D17 */
+ PINCTRL_PIN(77, "ARSTN"), /* D18 */
+ PINCTRL_PIN(78, "DIORN"), /* D19 */
+ PINCTRL_PIN(79, "EGPIO[1]"), /* D20 */
+ /* Row E */
+ PINCTRL_PIN(80, "AD[23]"), /* E1 */
+ PINCTRL_PIN(81, "DA[23]"), /* E2 */
+ PINCTRL_PIN(82, "DA[26]"), /* E3 */
+ PINCTRL_PIN(83, "CSN[6]"), /* E4 */
+ PINCTRL_PIN(84, "GND"), /* E5 */
+ PINCTRL_PIN(85, "GND"), /* E6 */
+ PINCTRL_PIN(86, "CVDD"), /* E7 */
+ PINCTRL_PIN(87, "CVDD"), /* E8 */
+ PINCTRL_PIN(88, "RVDD"), /* E9 */
+ PINCTRL_PIN(89, "GND"), /* E10 */
+ PINCTRL_PIN(90, "GND"), /* E11 */
+ PINCTRL_PIN(91, "RVDD"), /* E12 */
+ PINCTRL_PIN(92, "CVDD"), /* E13 */
+ PINCTRL_PIN(93, "CVDD"), /* E14 */
+ PINCTRL_PIN(94, "GND"), /* E15 */
+ PINCTRL_PIN(95, "ASDI"), /* E16 */
+ PINCTRL_PIN(96, "DIOWN"), /* E17 */
+ PINCTRL_PIN(97, "EGPIO[0]"), /* E18 */
+ PINCTRL_PIN(98, "EGPIO[3]"), /* E19 */
+ PINCTRL_PIN(99, "EGPIO[5]"), /* E20 */
+ /* Row F */
+ PINCTRL_PIN(100, "SDCSN[3]"), /* F1 */
+ PINCTRL_PIN(101, "DA[22]"), /* F2 */
+ PINCTRL_PIN(102, "DA[24]"), /* F3 */
+ PINCTRL_PIN(103, "AD[25]"), /* F4 */
+ PINCTRL_PIN(104, "RVDD"), /* F5 */
+ PINCTRL_PIN(105, "GND"), /* F6 */
+ PINCTRL_PIN(106, "CVDD"), /* F7 */
+ PINCTRL_PIN(107, "CVDD"), /* F14 */
+ PINCTRL_PIN(108, "GND"), /* F15 */
+ PINCTRL_PIN(109, "GND"), /* F16 */
+ PINCTRL_PIN(110, "EGPIO[2]"), /* F17 */
+ PINCTRL_PIN(111, "EGPIO[4]"), /* F18 */
+ PINCTRL_PIN(112, "EGPIO[6]"), /* F19 */
+ PINCTRL_PIN(113, "EGPIO[8]"), /* F20 */
+ /* Row G */
+ PINCTRL_PIN(114, "SDCSN[0]"), /* G1 */
+ PINCTRL_PIN(115, "SDCSN[1]"), /* G2 */
+ PINCTRL_PIN(116, "SDWEN"), /* G3 */
+ PINCTRL_PIN(117, "SDCLK"), /* G4 */
+ PINCTRL_PIN(118, "RVDD"), /* G5 */
+ PINCTRL_PIN(119, "RVDD"), /* G6 */
+ PINCTRL_PIN(120, "RVDD"), /* G15 */
+ PINCTRL_PIN(121, "RVDD"), /* G16 */
+ PINCTRL_PIN(122, "EGPIO[7]"), /* G17 */
+ PINCTRL_PIN(123, "EGPIO[9]"), /* G18 */
+ PINCTRL_PIN(124, "EGPIO[10]"), /* G19 */
+ PINCTRL_PIN(125, "EGPIO[11]"), /* G20 */
+ /* Row H */
+ PINCTRL_PIN(126, "DQMN[3]"), /* H1 */
+ PINCTRL_PIN(127, "CASN"), /* H2 */
+ PINCTRL_PIN(128, "RASN"), /* H3 */
+ PINCTRL_PIN(129, "SDCSN[2]"), /* H4 */
+ PINCTRL_PIN(130, "CVDD"), /* H5 */
+ PINCTRL_PIN(131, "GND"), /* H8 */
+ PINCTRL_PIN(132, "GND"), /* H9 */
+ PINCTRL_PIN(133, "GND"), /* H10 */
+ PINCTRL_PIN(134, "GND"), /* H11 */
+ PINCTRL_PIN(135, "GND"), /* H12 */
+ PINCTRL_PIN(136, "GND"), /* H13 */
+ PINCTRL_PIN(137, "RVDD"), /* H16 */
+ PINCTRL_PIN(138, "RTCXTALO"), /* H17 */
+ PINCTRL_PIN(139, "ADC_VDD"), /* H18 */
+ PINCTRL_PIN(140, "ADC_GND"), /* H19 */
+ PINCTRL_PIN(141, "XP"), /* H20 */
+ /* Row J */
+ PINCTRL_PIN(142, "DA[21]"), /* J1 */
+ PINCTRL_PIN(143, "DQMN[0]"), /* J2 */
+ PINCTRL_PIN(144, "DQMN[1]"), /* J3 */
+ PINCTRL_PIN(145, "DQMN[2]"), /* J4 */
+ PINCTRL_PIN(146, "GND"), /* J5 */
+ PINCTRL_PIN(147, "GND"), /* J8 */
+ PINCTRL_PIN(148, "GND"), /* J9 */
+ PINCTRL_PIN(149, "GND"), /* J10 */
+ PINCTRL_PIN(150, "GND"), /* J11 */
+ PINCTRL_PIN(151, "GND"), /* J12 */
+ PINCTRL_PIN(152, "GND"), /* J13 */
+ PINCTRL_PIN(153, "CVDD"), /* J16 */
+ PINCTRL_PIN(154, "RTCXTALI"), /* J17 */
+ PINCTRL_PIN(155, "XM"), /* J18 */
+ PINCTRL_PIN(156, "YP"), /* J19 */
+ PINCTRL_PIN(157, "YM"), /* J20 */
+ /* Row K */
+ PINCTRL_PIN(158, "AD[22]"), /* K1 */
+ PINCTRL_PIN(159, "DA[20]"), /* K2 */
+ PINCTRL_PIN(160, "AD[21]"), /* K3 */
+ PINCTRL_PIN(161, "DA[19]"), /* K4 */
+ PINCTRL_PIN(162, "RVDD"), /* K5 */
+ PINCTRL_PIN(163, "GND"), /* K8 */
+ PINCTRL_PIN(164, "GND"), /* K9 */
+ PINCTRL_PIN(165, "GND"), /* K10 */
+ PINCTRL_PIN(166, "GND"), /* K11 */
+ PINCTRL_PIN(167, "GND"), /* K12 */
+ PINCTRL_PIN(168, "GND"), /* K13 */
+ PINCTRL_PIN(169, "CVDD"), /* K16 */
+ PINCTRL_PIN(170, "SYM"), /* K17 */
+ PINCTRL_PIN(171, "SYP"), /* K18 */
+ PINCTRL_PIN(172, "SXM"), /* K19 */
+ PINCTRL_PIN(173, "SXP"), /* K20 */
+ /* Row L */
+ PINCTRL_PIN(174, "DA[18]"), /* L1 */
+ PINCTRL_PIN(175, "DA[17]"), /* L2 */
+ PINCTRL_PIN(176, "DA[16]"), /* L3 */
+ PINCTRL_PIN(177, "DA[15]"), /* L4 */
+ PINCTRL_PIN(178, "GND"), /* L5 */
+ PINCTRL_PIN(179, "GND"), /* L8 */
+ PINCTRL_PIN(180, "GND"), /* L9 */
+ PINCTRL_PIN(181, "GND"), /* L10 */
+ PINCTRL_PIN(182, "GND"), /* L11 */
+ PINCTRL_PIN(183, "GND"), /* L12 */
+ PINCTRL_PIN(184, "GND"), /* L13 */
+ PINCTRL_PIN(185, "CVDD"), /* L16 */
+ PINCTRL_PIN(186, "COL[5]"), /* L17 */
+ PINCTRL_PIN(187, "COL[7]"), /* L18 */
+ PINCTRL_PIN(188, "RSTON"), /* L19 */
+ PINCTRL_PIN(189, "PRSTN"), /* L20 */
+ /* Row M */
+ PINCTRL_PIN(190, "AD[7]"), /* M1 */
+ PINCTRL_PIN(191, "DA[14]"), /* M2 */
+ PINCTRL_PIN(192, "AD[6]"), /* M3 */
+ PINCTRL_PIN(193, "AD[5]"), /* M4 */
+ PINCTRL_PIN(194, "CVDD"), /* M5 */
+ PINCTRL_PIN(195, "GND"), /* M8 */
+ PINCTRL_PIN(196, "GND"), /* M9 */
+ PINCTRL_PIN(197, "GND"), /* M10 */
+ PINCTRL_PIN(198, "GND"), /* M11 */
+ PINCTRL_PIN(199, "GND"), /* M12 */
+ PINCTRL_PIN(200, "GND"), /* M13 */
+ PINCTRL_PIN(201, "GND"), /* M16 */
+ PINCTRL_PIN(202, "COL[4]"), /* M17 */
+ PINCTRL_PIN(203, "COL[3]"), /* M18 */
+ PINCTRL_PIN(204, "COL[6]"), /* M19 */
+ PINCTRL_PIN(205, "CSN[0]"), /* M20 */
+ /* Row N */
+ PINCTRL_PIN(206, "DA[13]"), /* N1 */
+ PINCTRL_PIN(207, "DA[12]"), /* N2 */
+ PINCTRL_PIN(208, "DA[11]"), /* N3 */
+ PINCTRL_PIN(209, "AD[3]"), /* N4 */
+ PINCTRL_PIN(210, "CVDD"), /* N5 */
+ PINCTRL_PIN(211, "CVDD"), /* N6 */
+ PINCTRL_PIN(212, "GND"), /* N8 */
+ PINCTRL_PIN(213, "GND"), /* N9 */
+ PINCTRL_PIN(214, "GND"), /* N10 */
+ PINCTRL_PIN(215, "GND"), /* N11 */
+ PINCTRL_PIN(216, "GND"), /* N12 */
+ PINCTRL_PIN(217, "GND"), /* N13 */
+ PINCTRL_PIN(218, "GND"), /* N15 */
+ PINCTRL_PIN(219, "GND"), /* N16 */
+ PINCTRL_PIN(220, "XTALO"), /* N17 */
+ PINCTRL_PIN(221, "COL[0]"), /* N18 */
+ PINCTRL_PIN(222, "COL[1]"), /* N19 */
+ PINCTRL_PIN(223, "COL[2]"), /* N20 */
+ /* Row P */
+ PINCTRL_PIN(224, "AD[4]"), /* P1 */
+ PINCTRL_PIN(225, "DA[10]"), /* P2 */
+ PINCTRL_PIN(226, "DA[9]"), /* P3 */
+ PINCTRL_PIN(227, "BRIGHT"), /* P4 */
+ PINCTRL_PIN(228, "RVDD"), /* P5 */
+ PINCTRL_PIN(229, "RVDD"), /* P6 */
+ PINCTRL_PIN(230, "RVDD"), /* P15 */
+ PINCTRL_PIN(231, "RVDD"), /* P16 */
+ PINCTRL_PIN(232, "XTALI"), /* P17 */
+ PINCTRL_PIN(233, "PLL_VDD"), /* P18 */
+ PINCTRL_PIN(234, "ROW[6]"), /* P19 */
+ PINCTRL_PIN(235, "ROW[7]"), /* P20 */
+ /* Row R */
+ PINCTRL_PIN(236, "AD[2]"), /* R1 */
+ PINCTRL_PIN(237, "AD[1]"), /* R2 */
+ PINCTRL_PIN(238, "P[17]"), /* R3 */
+ PINCTRL_PIN(239, "P[14]"), /* R4 */
+ PINCTRL_PIN(240, "RVDD"), /* R5 */
+ PINCTRL_PIN(241, "RVDD"), /* R6 */
+ PINCTRL_PIN(242, "GND"), /* R7 */
+ PINCTRL_PIN(243, "CVDD"), /* R8 */
+ PINCTRL_PIN(244, "CVDD"), /* R13 */
+ PINCTRL_PIN(245, "GND"), /* R14 */
+ PINCTRL_PIN(246, "RVDD"), /* R15 */
+ PINCTRL_PIN(247, "RVDD"), /* R16 */
+ PINCTRL_PIN(248, "ROW[0]"), /* R17 */
+ PINCTRL_PIN(249, "ROW[3]"), /* R18 */
+ PINCTRL_PIN(250, "PLL_GND"), /* R19 */
+ PINCTRL_PIN(251, "ROW[5]"), /* R20 */
+ /* Row T */
+ PINCTRL_PIN(252, "DA[8]"), /* T1 */
+ PINCTRL_PIN(253, "BLANK"), /* T2 */
+ PINCTRL_PIN(254, "P[13]"), /* T3 */
+ PINCTRL_PIN(255, "SPCLK"), /* T4 */
+ PINCTRL_PIN(256, "V_CSYNC"), /* T5 */
+ PINCTRL_PIN(257, "DD[14]"), /* T6 */
+ PINCTRL_PIN(258, "GND"), /* T7 */
+ PINCTRL_PIN(259, "CVDD"), /* T8 */
+ PINCTRL_PIN(260, "RVDD"), /* T9 */
+ PINCTRL_PIN(261, "GND"), /* T10 */
+ PINCTRL_PIN(262, "GND"), /* T11 */
+ PINCTRL_PIN(263, "RVDD"), /* T12 */
+ PINCTRL_PIN(264, "CVDD"), /* T13 */
+ PINCTRL_PIN(265, "GND"), /* T14 */
+ PINCTRL_PIN(266, "INT[0]"), /* T15 */
+ PINCTRL_PIN(267, "USBM[1]"), /* T16 */
+ PINCTRL_PIN(268, "RXD[0]"), /* T17 */
+ PINCTRL_PIN(269, "TXD[2]"), /* T18 */
+ PINCTRL_PIN(270, "ROW[2]"), /* T19 */
+ PINCTRL_PIN(271, "ROW[4]"), /* T20 */
+ /* Row U */
+ PINCTRL_PIN(272, "AD[0]"), /* U1 */
+ PINCTRL_PIN(273, "P[15]"), /* U2 */
+ PINCTRL_PIN(274, "P[10]"), /* U3 */
+ PINCTRL_PIN(275, "P[7]"), /* U4 */
+ PINCTRL_PIN(276, "P[6]"), /* U5 */
+ PINCTRL_PIN(277, "P[4]"), /* U6 */
+ PINCTRL_PIN(278, "P[0]"), /* U7 */
+ PINCTRL_PIN(279, "AD[13]"), /* U8 */
+ PINCTRL_PIN(280, "DA[3]"), /* U9 */
+ PINCTRL_PIN(281, "DA[0]"), /* U10 */
+ PINCTRL_PIN(282, "DSRN"), /* U11 */
+ PINCTRL_PIN(283, "BOOT[1]"), /* U12 */
+ PINCTRL_PIN(284, "NC"), /* U13 */
+ PINCTRL_PIN(285, "SSPRX1"), /* U14 */
+ PINCTRL_PIN(286, "INT[1]"), /* U15 */
+ PINCTRL_PIN(287, "PWMOUT"), /* U16 */
+ PINCTRL_PIN(288, "USBM[0]"), /* U17 */
+ PINCTRL_PIN(289, "RXD[1]"), /* U18 */
+ PINCTRL_PIN(290, "TXD[1]"), /* U19 */
+ PINCTRL_PIN(291, "ROW[1]"), /* U20 */
+ /* Row V */
+ PINCTRL_PIN(292, "P[16]"), /* V1 */
+ PINCTRL_PIN(293, "P[11]"), /* V2 */
+ PINCTRL_PIN(294, "P[8]"), /* V3 */
+ PINCTRL_PIN(295, "DD[15]"), /* V4 */
+ PINCTRL_PIN(296, "DD[13]"), /* V5 */
+ PINCTRL_PIN(297, "P[1]"), /* V6 */
+ PINCTRL_PIN(298, "AD[14]"), /* V7 */
+ PINCTRL_PIN(299, "AD[12]"), /* V8 */
+ PINCTRL_PIN(300, "DA[2]"), /* V9 */
+ PINCTRL_PIN(301, "IDECS0N"), /* V10 */
+ PINCTRL_PIN(302, "IDEDA[2]"), /* V11 */
+ PINCTRL_PIN(303, "TDI"), /* V12 */
+ PINCTRL_PIN(304, "GND"), /* V13 */
+ PINCTRL_PIN(305, "ASYNC"), /* V14 */
+ PINCTRL_PIN(306, "SSPTX1"), /* V15 */
+ PINCTRL_PIN(307, "INT[2]"), /* V16 */
+ PINCTRL_PIN(308, "RTSN"), /* V17 */
+ PINCTRL_PIN(309, "USBP[0]"), /* V18 */
+ PINCTRL_PIN(310, "CTSN"), /* V19 */
+ PINCTRL_PIN(311, "TXD[0]"), /* V20 */
+ /* Row W */
+ PINCTRL_PIN(312, "P[12]"), /* W1 */
+ PINCTRL_PIN(313, "P[9]"), /* W2 */
+ PINCTRL_PIN(314, "DD[0]"), /* W3 */
+ PINCTRL_PIN(315, "P[5]"), /* W4 */
+ PINCTRL_PIN(316, "P[3]"), /* W5 */
+ PINCTRL_PIN(317, "DA[7]"), /* W6 */
+ PINCTRL_PIN(318, "DA[5]"), /* W7 */
+ PINCTRL_PIN(319, "AD[11]"), /* W8 */
+ PINCTRL_PIN(320, "AD[9]"), /* W9 */
+ PINCTRL_PIN(321, "IDECS1N"), /* W10 */
+ PINCTRL_PIN(322, "IDEDA[1]"), /* W11 */
+ PINCTRL_PIN(323, "TCK"), /* W12 */
+ PINCTRL_PIN(324, "TMS"), /* W13 */
+ PINCTRL_PIN(325, "EECLK"), /* W14 */
+ PINCTRL_PIN(326, "SCLK1"), /* W15 */
+ PINCTRL_PIN(327, "GRLED"), /* W16 */
+ PINCTRL_PIN(328, "INT[3]"), /* W17 */
+ PINCTRL_PIN(329, "SLA[1]"), /* W18 */
+ PINCTRL_PIN(330, "SLA[0]"), /* W19 */
+ PINCTRL_PIN(331, "RXD[2]"), /* W20 */
+ /* Row Y */
+ PINCTRL_PIN(332, "HSYNC"), /* Y1 */
+ PINCTRL_PIN(333, "DD[1]"), /* Y2 */
+ PINCTRL_PIN(334, "DD[12]"), /* Y3 */
+ PINCTRL_PIN(335, "P[2]"), /* Y4 */
+ PINCTRL_PIN(336, "AD[15]"), /* Y5 */
+ PINCTRL_PIN(337, "DA[6]"), /* Y6 */
+ PINCTRL_PIN(338, "DA[4]"), /* Y7 */
+ PINCTRL_PIN(339, "AD[10]"), /* Y8 */
+ PINCTRL_PIN(340, "DA[1]"), /* Y9 */
+ PINCTRL_PIN(341, "AD[8]"), /* Y10 */
+ PINCTRL_PIN(342, "IDEDA[0]"), /* Y11 */
+ PINCTRL_PIN(343, "DTRN"), /* Y12 */
+ PINCTRL_PIN(344, "TDO"), /* Y13 */
+ PINCTRL_PIN(345, "BOOT[0]"), /* Y14 */
+ PINCTRL_PIN(346, "EEDAT"), /* Y15 */
+ PINCTRL_PIN(347, "ASDO"), /* Y16 */
+ PINCTRL_PIN(348, "SFRM1"), /* Y17 */
+ PINCTRL_PIN(349, "RDLED"), /* Y18 */
+ PINCTRL_PIN(350, "USBP[1]"), /* Y19 */
+ PINCTRL_PIN(351, "ABITCLK"), /* Y20 */
+};
+
+static const unsigned int ssp_ep9312_pins[] = {
+ 285, 306, 326, 348
+};
+
+static const unsigned int ac97_ep9312_pins[] = {
+ 77, 95, 305, 347, 351
+};
+
+static const unsigned int pwm_ep9312_pins[] = { 74 };
+
+static const unsigned int gpio1a_ep9312_pins[] = { 74 };
+
+static const unsigned int gpio2a_9312_pins[] = {
+ 234, 235, 248, 249, 251, 270, 271, 291
+};
+
+static const unsigned int gpio3a_9312_pins[] = {
+ 186, 187, 202, 203, 204, 221, 222, 223
+};
+
+static const unsigned int keypad_9312_pins[] = {
+ 186, 187, 202, 203, 204, 221, 222, 223,
+ 234, 235, 248, 249, 251, 270, 271, 291
+};
+
+static const unsigned int gpio4a_9312_pins[] = {
+ 78, 301, 302, 321, 322, 342
+};
+
+static const unsigned int gpio6a_9312_pins[] = {
+ 257, 295, 296, 334
+};
+
+static const unsigned int gpio7a_9312_pins[] = {
+ 4, 24, 25, 45, 46, 66, 314, 333
+};
+
+static const unsigned int ide_9312_pins[] = {
+ 78, 301, 302, 321, 322, 342,
+ 257, 295, 296, 334,
+ 4, 24, 25, 45, 46, 66, 314, 333
+};
+
+static const struct ep93xx_pin_group ep9312_pin_groups[] = {
+ PMX_GROUP("ssp", ssp_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP, 0),
+ PMX_GROUP("i2s_on_ssp", ssp_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONSSP,
+ EP93XX_SYSCON_DEVCFG_I2SONSSP),
+ PMX_GROUP("pwm1", pwm_ep9312_pins, EP93XX_SYSCON_DEVCFG_PONG,
+ EP93XX_SYSCON_DEVCFG_PONG),
+ PMX_GROUP("gpio1agrp", gpio1a_ep9312_pins, EP93XX_SYSCON_DEVCFG_PONG, 0),
+ PMX_GROUP("ac97", ac97_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97, 0),
+ PMX_GROUP("i2s_on_ac97", ac97_ep9312_pins, EP93XX_SYSCON_DEVCFG_I2SONAC97,
+ EP93XX_SYSCON_DEVCFG_I2SONAC97),
+ PMX_GROUP("rasteronsdram0grp", raster_on_sdram0_pins, EP93XX_SYSCON_DEVCFG_RASONP3, 0),
+ PMX_GROUP("rasteronsdram3grp", raster_on_sdram0_pins, EP93XX_SYSCON_DEVCFG_RASONP3,
+ EP93XX_SYSCON_DEVCFG_RASONP3),
+ PMX_GROUP("gpio2agrp", gpio2a_9312_pins, EP93XX_SYSCON_DEVCFG_GONK,
+ EP93XX_SYSCON_DEVCFG_GONK),
+ PMX_GROUP("gpio3agrp", gpio3a_9312_pins, EP93XX_SYSCON_DEVCFG_GONK,
+ EP93XX_SYSCON_DEVCFG_GONK),
+ PMX_GROUP("keypadgrp", keypad_9312_pins, EP93XX_SYSCON_DEVCFG_GONK, 0),
+ PMX_GROUP("gpio4agrp", gpio4a_9312_pins, EP93XX_SYSCON_DEVCFG_EONIDE,
+ EP93XX_SYSCON_DEVCFG_EONIDE),
+ PMX_GROUP("gpio6agrp", gpio6a_9312_pins, EP93XX_SYSCON_DEVCFG_GONIDE,
+ EP93XX_SYSCON_DEVCFG_GONIDE),
+ PMX_GROUP("gpio7agrp", gpio7a_9312_pins, EP93XX_SYSCON_DEVCFG_HONIDE,
+ EP93XX_SYSCON_DEVCFG_HONIDE),
+ PMX_GROUP("idegrp", ide_9312_pins, EP93XX_SYSCON_DEVCFG_EONIDE |
+ EP93XX_SYSCON_DEVCFG_GONIDE | EP93XX_SYSCON_DEVCFG_HONIDE, 0),
+};
+
+static int ep93xx_get_groups_count(struct pinctrl_dev *pctldev)
+{
+ struct ep93xx_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
+
+ switch (pmx->model) {
+ case EP93XX_9301_PINCTRL:
+ return ARRAY_SIZE(ep9301_pin_groups);
+ case EP93XX_9307_PINCTRL:
+ return ARRAY_SIZE(ep9307_pin_groups);
+ case EP93XX_9312_PINCTRL:
+ return ARRAY_SIZE(ep9312_pin_groups);
+ default:
+ return 0;
+ }
+}
+
+static const char *ep93xx_get_group_name(struct pinctrl_dev *pctldev,
+ unsigned int selector)
+{
+ struct ep93xx_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
+
+ switch (pmx->model) {
+ case EP93XX_9301_PINCTRL:
+ return ep9301_pin_groups[selector].grp.name;
+ case EP93XX_9307_PINCTRL:
+ return ep9307_pin_groups[selector].grp.name;
+ case EP93XX_9312_PINCTRL:
+ return ep9312_pin_groups[selector].grp.name;
+ }
+
+ return NULL;
+}
+
+static int ep93xx_get_group_pins(struct pinctrl_dev *pctldev,
+ unsigned int selector,
+ const unsigned int **pins,
+ unsigned int *num_pins)
+{
+ struct ep93xx_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
+
+ switch (pmx->model) {
+ case EP93XX_9301_PINCTRL:
+ *pins = ep9301_pin_groups[selector].grp.pins;
+ *num_pins = ep9301_pin_groups[selector].grp.npins;
+ break;
+ case EP93XX_9307_PINCTRL:
+ *pins = ep9307_pin_groups[selector].grp.pins;
+ *num_pins = ep9307_pin_groups[selector].grp.npins;
+ break;
+ case EP93XX_9312_PINCTRL:
+ *pins = ep9312_pin_groups[selector].grp.pins;
+ *num_pins = ep9312_pin_groups[selector].grp.npins;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct pinctrl_ops ep93xx_pctrl_ops = {
+ .get_groups_count = ep93xx_get_groups_count,
+ .get_group_name = ep93xx_get_group_name,
+ .get_group_pins = ep93xx_get_group_pins,
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
+ .dt_free_map = pinconf_generic_dt_free_map,
+};
+
+static const char * const spigrps[] = { "ssp" };
+static const char * const ac97grps[] = { "ac97" };
+static const char * const i2sgrps[] = { "i2s_on_ssp", "i2s_on_ac97" };
+static const char * const pwm1grps[] = { "pwm1" };
+static const char * const gpiogrps[] = { "gpio1agrp", "gpio2agrp", "gpio3agrp",
+ "gpio4agrp", "gpio6agrp", "gpio7agrp" };
+static const char * const rastergrps[] = { "rasteronsdram0grp", "rasteronsdram3grp"};
+static const char * const keypadgrps[] = { "keypadgrp"};
+static const char * const idegrps[] = { "idegrp"};
+
+static const struct pinfunction ep93xx_pmx_functions[] = {
+ PINCTRL_PINFUNCTION("spi", spigrps, ARRAY_SIZE(spigrps)),
+ PINCTRL_PINFUNCTION("ac97", ac97grps, ARRAY_SIZE(ac97grps)),
+ PINCTRL_PINFUNCTION("i2s", i2sgrps, ARRAY_SIZE(i2sgrps)),
+ PINCTRL_PINFUNCTION("pwm", pwm1grps, ARRAY_SIZE(pwm1grps)),
+ PINCTRL_PINFUNCTION("keypad", keypadgrps, ARRAY_SIZE(keypadgrps)),
+ PINCTRL_PINFUNCTION("pata", idegrps, ARRAY_SIZE(idegrps)),
+ PINCTRL_PINFUNCTION("lcd", rastergrps, ARRAY_SIZE(rastergrps)),
+ PINCTRL_PINFUNCTION("gpio", gpiogrps, ARRAY_SIZE(gpiogrps)),
+};
+
+static int ep93xx_pmx_set_mux(struct pinctrl_dev *pctldev,
+ unsigned int selector,
+ unsigned int group)
+{
+ struct ep93xx_pmx *pmx;
+ const struct pinfunction *func;
+ const struct ep93xx_pin_group *grp;
+ u32 before, after, expected;
+ unsigned long tmp;
+ int i;
+
+ pmx = pinctrl_dev_get_drvdata(pctldev);
+
+ func = &ep93xx_pmx_functions[selector];
+
+ switch (pmx->model) {
+ case EP93XX_9301_PINCTRL:
+ grp = &ep9301_pin_groups[group];
+ break;
+ case EP93XX_9307_PINCTRL:
+ grp = &ep9307_pin_groups[group];
+ break;
+ case EP93XX_9312_PINCTRL:
+ grp = &ep9312_pin_groups[group];
+ break;
+ }
+
+ dev_dbg(pmx->dev,
+ "ACTIVATE function \"%s\" with group \"%s\" (mask=0x%x, value=0x%x)\n",
+ func->name, grp->grp.name, grp->mask, grp->value);
+
+ regmap_read(pmx->map, EP93XX_SYSCON_DEVCFG, &before);
+ ep93xx_regmap_update_bits(pmx->map, EP93XX_SYSCON_DEVCFG,
+ grp->mask, grp->value);
+ regmap_read(pmx->map, EP93XX_SYSCON_DEVCFG, &after);
+
+ dev_dbg(pmx->dev,
+ "before=0x%x, after=0x%x, mask=0x%lx\n",
+ before, after, PADS_MASK);
+
+ /* Which bits changed */
+ before &= PADS_MASK;
+ after &= PADS_MASK;
+ expected = before & ~grp->mask;
+ expected |= grp->value;
+ expected &= PADS_MASK;
+
+ /* Print changed states */
+ tmp = expected ^ after;
+ for_each_set_bit(i, &tmp, PADS_MAXBIT) {
+ bool enabled = expected & BIT(i);
+
+ dev_err(pmx->dev,
+ "pin group %s could not be %s: probably a hardware limitation\n",
+ ep93xx_padgroups[i], str_enabled_disabled(enabled));
+ dev_err(pmx->dev,
+ "DeviceCfg before: %08x, after %08x, expected %08x\n",
+ before, after, expected);
+ }
+
+ return tmp ? -EINVAL : 0;
+};
+
+static int ep93xx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
+{
+ return ARRAY_SIZE(ep93xx_pmx_functions);
+}
+
+static const char *ep93xx_pmx_get_func_name(struct pinctrl_dev *pctldev,
+ unsigned int selector)
+{
+ return ep93xx_pmx_functions[selector].name;
+}
+
+static int ep93xx_pmx_get_groups(struct pinctrl_dev *pctldev,
+ unsigned int selector,
+ const char * const **groups,
+ unsigned int * const num_groups)
+{
+ *groups = ep93xx_pmx_functions[selector].groups;
+ *num_groups = ep93xx_pmx_functions[selector].ngroups;
+ return 0;
+}
+
+static const struct pinmux_ops ep93xx_pmx_ops = {
+ .get_functions_count = ep93xx_pmx_get_funcs_count,
+ .get_function_name = ep93xx_pmx_get_func_name,
+ .get_function_groups = ep93xx_pmx_get_groups,
+ .set_mux = ep93xx_pmx_set_mux,
+};
+
+static struct pinctrl_desc ep93xx_pmx_desc = {
+ .name = DRIVER_NAME,
+ .pctlops = &ep93xx_pctrl_ops,
+ .pmxops = &ep93xx_pmx_ops,
+ .owner = THIS_MODULE,
+};
+
+static const struct of_device_id ep93xx_pinctrl_of_ids[] = {
+ { .compatible = "cirrus,ep9301-pinctrl", .data = (void *)EP93XX_9301_PINCTRL },
+ { .compatible = "cirrus,ep9302-pinctrl", .data = (void *)EP93XX_9301_PINCTRL },
+ { .compatible = "cirrus,ep9307-pinctrl", .data = (void *)EP93XX_9307_PINCTRL },
+ { .compatible = "cirrus,ep9312-pinctrl", .data = (void *)EP93XX_9312_PINCTRL },
+ { .compatible = "cirrus,ep9315-pinctrl", .data = (void *)EP93XX_9312_PINCTRL },
+ { /* sentinel */ }
+};
+
+static int ep93xx_pmx_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct ep93xx_pmx *pmx;
+ struct device *parent;
+ struct regmap *map;
+
+ /* Create state holders etc for this driver */
+ pmx = devm_kzalloc(dev, sizeof(*pmx), GFP_KERNEL);
+ if (!pmx)
+ return -ENOMEM;
+
+ pmx->dev = dev;
+ parent = dev->parent;
+ if (!parent)
+ return dev_err_probe(dev, -ENODEV, "no parent to pin controller\n");
+
+ map = syscon_node_to_regmap(parent->of_node);
+ if (IS_ERR(map))
+ return dev_err_probe(dev, PTR_ERR(map), "no syscon regmap\n");
+
+ pmx->map = map;
+ pmx->model = (int)of_device_get_match_data(dev);
+ switch (pmx->model) {
+ case EP93XX_9301_PINCTRL:
+ ep93xx_pmx_desc.pins = ep9301_pins;
+ ep93xx_pmx_desc.npins = ARRAY_SIZE(ep9301_pins);
+ dev_info(dev, "detected 9301/9302 chip variant\n");
+ break;
+ case EP93XX_9307_PINCTRL:
+ ep93xx_pmx_desc.pins = ep9307_pins;
+ ep93xx_pmx_desc.npins = ARRAY_SIZE(ep9307_pins);
+ dev_info(dev, "detected 9307 chip variant\n");
+ break;
+ case EP93XX_9312_PINCTRL:
+ ep93xx_pmx_desc.pins = ep9312_pins;
+ ep93xx_pmx_desc.npins = ARRAY_SIZE(ep9312_pins);
+ dev_info(dev, "detected 9312/9315 chip variant\n");
+ break;
+ default:
+ return dev_err_probe(dev, -EINVAL, "unknown pin control model: %u\n", pmx->model);
+ }
+
+ pmx->pctl = devm_pinctrl_register(dev, &ep93xx_pmx_desc, pmx);
+ if (IS_ERR(pmx->pctl)) {
+ dev_err(dev, "could not register pinmux driver\n");
+ return PTR_ERR(pmx->pctl);
+ }
+
+ return 0;
+};
+
+static struct platform_driver ep93xx_pmx_driver = {
+ .driver = {
+ .name = DRIVER_NAME,
+ .of_match_table = ep93xx_pinctrl_of_ids,
+ },
+ .probe = ep93xx_pmx_probe,
+};
+
+static int __init ep93xx_pmx_init(void)
+{
+ return platform_driver_register(&ep93xx_pmx_driver);
+}
+arch_initcall(ep93xx_pmx_init);
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 07/42] dt-bindings: power: reset: Add ep93xx reset
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (5 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 06/42] pinctrl: add a Cirrus ep93xx SoC pin controller Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 10:39 ` Krzysztof Kozlowski
2023-09-15 8:10 ` [PATCH v4 08/42] power: reset: Add a driver for the " Nikita Shubin via B4 Relay
` (36 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Sebastian Reichel, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Alexander Sverdlin, Nikita Shubin
Cc: linux-pm, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add YAML bindings for ep93xx reset.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../bindings/power/reset/cirrus,ep9301-reboot.yaml | 34 ++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/Documentation/devicetree/bindings/power/reset/cirrus,ep9301-reboot.yaml b/Documentation/devicetree/bindings/power/reset/cirrus,ep9301-reboot.yaml
new file mode 100644
index 000000000000..a5a718dec4b5
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/reset/cirrus,ep9301-reboot.yaml
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/reset/cirrus,ep9301-reboot.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus EP93xx SoC family reset controller
+
+maintainers:
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-reboot
+ - items:
+ - enum:
+ - cirrus,ep9302-reboot
+ - cirrus,ep9307-reboot
+ - cirrus,ep9312-reboot
+ - cirrus,ep9315-reboot
+ - const: cirrus,ep9301-reboot
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ reboot {
+ compatible = "cirrus,ep9301-reboot";
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 07/42] dt-bindings: power: reset: Add ep93xx reset
2023-09-15 8:10 ` [PATCH v4 07/42] dt-bindings: power: reset: Add ep93xx reset Nikita Shubin via B4 Relay
@ 2023-09-15 10:39 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 10:39 UTC (permalink / raw)
To: nikita.shubin, Sebastian Reichel, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Alexander Sverdlin
Cc: linux-pm, devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:10, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add YAML bindings for ep93xx reset.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
> .../bindings/power/reset/cirrus,ep9301-reboot.yaml | 34 ++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/power/reset/cirrus,ep9301-reboot.yaml b/Documentation/devicetree/bindings/power/reset/cirrus,ep9301-reboot.yaml
> new file mode 100644
> index 000000000000..a5a718dec4b5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/reset/cirrus,ep9301-reboot.yaml
> @@ -0,0 +1,34 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/reset/cirrus,ep9301-reboot.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cirrus EP93xx SoC family reset controller
> +
> +maintainers:
> + - Alexander Sverdlin <alexander.sverdlin@gmail.com>
> + - Nikita Shubin <nikita.shubin@maquefel.me>
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: cirrus,ep9301-reboot
> + - items:
> + - enum:
> + - cirrus,ep9302-reboot
> + - cirrus,ep9307-reboot
> + - cirrus,ep9312-reboot
> + - cirrus,ep9315-reboot
> + - const: cirrus,ep9301-reboot
> +
> +required:
> + - compatible
> +
The binding looks fine except... that's not needed. See my comment in
next patches.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 08/42] power: reset: Add a driver for the ep93xx reset
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (6 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 07/42] dt-bindings: power: reset: Add ep93xx reset Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 8:10 ` [PATCH v4 09/42] dt-bindings: soc: Add Cirrus EP93xx Nikita Shubin via B4 Relay
` (35 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Sebastian Reichel
Cc: linux-kernel, linux-pm, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Implement the reset behaviour of the various EP93xx SoCS in drivers/power/reset.
It used to be located in arch/arm/mach-ep93xx.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Acked-by: Sebastian Reichel <sre@kernel.org>
---
drivers/power/reset/Kconfig | 10 +++++
drivers/power/reset/Makefile | 1 +
drivers/power/reset/ep93xx-restart.c | 85 ++++++++++++++++++++++++++++++++++++
3 files changed, 96 insertions(+)
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index fff07b2bd77b..9c2aa9218841 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -75,6 +75,16 @@ config POWER_RESET_BRCMSTB
Say Y here if you have a Broadcom STB board and you wish
to have restart support.
+config POWER_RESET_EP93XX
+ bool "Cirrus EP93XX reset driver" if COMPILE_TEST
+ depends on MFD_SYSCON
+ default ARCH_EP93XX
+ help
+ This driver provides restart support for Cirrus EP93XX SoC.
+
+ Say Y here if you have a Cirrus EP93XX SoC and you wish
+ to have restart support.
+
config POWER_RESET_GEMINI_POWEROFF
bool "Cortina Gemini power-off driver"
depends on ARCH_GEMINI || COMPILE_TEST
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index d763e6735ee3..61f4e11619b2 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_POWER_RESET_ATC260X) += atc260x-poweroff.o
obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o
obj-$(CONFIG_POWER_RESET_BRCMKONA) += brcm-kona-reset.o
obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
+obj-$(CONFIG_POWER_RESET_EP93XX) += ep93xx-restart.o
obj-$(CONFIG_POWER_RESET_GEMINI_POWEROFF) += gemini-poweroff.o
obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
obj-$(CONFIG_POWER_RESET_GPIO_RESTART) += gpio-restart.o
diff --git a/drivers/power/reset/ep93xx-restart.c b/drivers/power/reset/ep93xx-restart.c
new file mode 100644
index 000000000000..4da456d45d29
--- /dev/null
+++ b/drivers/power/reset/ep93xx-restart.c
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Cirrus EP93xx SoC reset driver
+ *
+ * Copyright (C) 2021 Nikita Shubin <nikita.shubin@maquefel.me>
+ */
+
+#include <linux/bits.h>
+#include <linux/delay.h>
+#include <linux/mfd/syscon.h>
+#include <linux/notifier.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reboot.h>
+
+#include <linux/soc/cirrus/ep93xx.h>
+
+#define EP93XX_SYSCON_DEVCFG 0x80
+#define EP93XX_SYSCON_DEVCFG_SWRST BIT(31)
+
+struct ep93xx_restart {
+ struct regmap *map;
+ struct notifier_block restart_handler;
+};
+
+static int ep93xx_restart_handle(struct notifier_block *this,
+ unsigned long mode, void *cmd)
+{
+ struct ep93xx_restart *priv =
+ container_of(this, struct ep93xx_restart, restart_handler);
+
+ /* Issue the reboot */
+ ep93xx_regmap_update_bits(priv->map, EP93XX_SYSCON_DEVCFG,
+ EP93XX_SYSCON_DEVCFG_SWRST, EP93XX_SYSCON_DEVCFG_SWRST);
+ ep93xx_regmap_update_bits(priv->map, EP93XX_SYSCON_DEVCFG,
+ EP93XX_SYSCON_DEVCFG_SWRST, 0);
+
+ return NOTIFY_DONE;
+}
+
+static int ep93xx_reboot_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct ep93xx_restart *priv;
+ struct device_node *parent;
+ int err;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ parent = of_get_parent(dev->of_node);
+ if (!parent)
+ return dev_err_probe(dev, -EINVAL, "no syscon parent for reboot node\n");
+
+ priv->map = syscon_node_to_regmap(parent);
+ of_node_put(parent);
+ if (IS_ERR(priv->map))
+ return dev_err_probe(dev, -EINVAL, "no syscon regmap\n");
+
+ priv->restart_handler.notifier_call = ep93xx_restart_handle;
+ priv->restart_handler.priority = 128;
+
+ err = register_restart_handler(&priv->restart_handler);
+ if (err)
+ return dev_err_probe(dev, err, "can't register restart notifier\n");
+
+ return 0;
+}
+
+static const struct of_device_id ep93xx_reboot_of_match[] = {
+ {
+ .compatible = "cirrus,ep9301-reboot",
+ },
+ { /* sentinel */ }
+};
+
+static struct platform_driver ep93xx_reboot_driver = {
+ .probe = ep93xx_reboot_probe,
+ .driver = {
+ .name = "ep9301-reboot",
+ .of_match_table = ep93xx_reboot_of_match,
+ },
+};
+builtin_platform_driver(ep93xx_reboot_driver);
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 09/42] dt-bindings: soc: Add Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (7 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 08/42] power: reset: Add a driver for the " Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 10:42 ` Krzysztof Kozlowski
2023-09-15 8:10 ` [PATCH v4 10/42] soc: Add SoC driver for Cirrus ep93xx Nikita Shubin via B4 Relay
` (34 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Nikita Shubin,
Alexander Sverdlin
Cc: devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add device tree bindings for the Cirrus Logic EP93xx SoC.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../bindings/arm/cirrus/cirrus,ep9301.yaml | 38 ++++++++++++
.../bindings/soc/cirrus/cirrus,ep9301-syscon.yaml | 71 ++++++++++++++++++++++
2 files changed, 109 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cirrus/cirrus,ep9301.yaml b/Documentation/devicetree/bindings/arm/cirrus/cirrus,ep9301.yaml
new file mode 100644
index 000000000000..97dd8b6aefa9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/cirrus/cirrus,ep9301.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/cirrus/cirrus,ep9301.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic EP93xx platforms
+
+description:
+ The EP93xx SoC is a ARMv4T-based with 200 MHz ARM9 CPU.
+
+maintainers:
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - description: The TS-7250 is a compact, full-featured Single Board Computer (SBC)
+ based upon the Cirrus EP9302 ARM9 CPU
+ items:
+ - const: technologic,ts7250
+ - const: cirrus,ep9301
+
+ - description: The Liebherr BK3 is a derivate from ts7250 board
+ items:
+ - const: liebherr,bk3
+ - const: cirrus,ep9301
+
+ - description: EDB302 is an evaluation board by Cirrus Logic,
+ based on a Cirrus Logic EP9302 CPU
+ items:
+ - const: cirrus,edb9302
+ - const: cirrus,ep9301
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/soc/cirrus/cirrus,ep9301-syscon.yaml b/Documentation/devicetree/bindings/soc/cirrus/cirrus,ep9301-syscon.yaml
new file mode 100644
index 000000000000..1692250251d9
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/cirrus/cirrus,ep9301-syscon.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/cirrus/cirrus,ep9301-syscon.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic EP93xx Platforms System Controller
+
+maintainers:
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - cirrus,ep9302-syscon
+ - cirrus,ep9307-syscon
+ - cirrus,ep9312-syscon
+ - cirrus,ep9315-syscon
+ - const: cirrus,ep9301-syscon
+ - const: syscon
+ - const: simple-mfd
+ - items:
+ - const: cirrus,ep9301-syscon
+ - const: syscon
+ - const: simple-mfd
+
+ reg:
+ maxItems: 1
+
+ reboot:
+ type: object
+ $ref: /schemas/power/reset/cirrus,ep9301-reboot.yaml
+
+ clock-controller:
+ type: object
+ $ref: /schemas/clock/cirrus,ep9301-clk.yaml
+
+ pinctrl:
+ type: object
+ $ref: /schemas/pinctrl/cirrus,ep9301-pinctrl.yaml
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ syscon@80930000 {
+ compatible = "cirrus,ep9301-syscon",
+ "syscon", "simple-mfd";
+ reg = <0x80930000 0x1000>;
+
+ clock-controller {
+ compatible = "cirrus,ep9301-clk";
+ #clock-cells = <1>;
+ clocks = <&xtali>;
+ };
+
+ pinctrl {
+ compatible = "cirrus,ep9301-pinctrl";
+ };
+
+ reboot {
+ compatible = "cirrus,ep9301-reboot";
+ };
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 09/42] dt-bindings: soc: Add Cirrus EP93xx
2023-09-15 8:10 ` [PATCH v4 09/42] dt-bindings: soc: Add Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 10:42 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 10:42 UTC (permalink / raw)
To: nikita.shubin, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Alexander Sverdlin
Cc: devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:10, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add device tree bindings for the Cirrus Logic EP93xx SoC.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
> .../bindings/arm/cirrus/cirrus,ep9301.yaml | 38 ++++++++++++
> .../bindings/soc/cirrus/cirrus,ep9301-syscon.yaml | 71 ++++++++++++++++++++++
> 2 files changed, 109 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/cirrus/cirrus,ep9301.yaml b/Documentation/devicetree/bindings/arm/cirrus/cirrus,ep9301.yaml
> new file mode 100644
> index 000000000000..97dd8b6aefa9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/cirrus/cirrus,ep9301.yaml
> @@ -0,0 +1,38 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/cirrus/cirrus,ep9301.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cirrus Logic EP93xx platforms
> +
> +description:
> + The EP93xx SoC is a ARMv4T-based with 200 MHz ARM9 CPU.
> +
> +maintainers:
> + - Alexander Sverdlin <alexander.sverdlin@gmail.com>
> + - Nikita Shubin <nikita.shubin@maquefel.me>
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + oneOf:
> + - description: The TS-7250 is a compact, full-featured Single Board Computer (SBC)
> + based upon the Cirrus EP9302 ARM9 CPU
> + items:
> + - const: technologic,ts7250
> + - const: cirrus,ep9301
> +
> + - description: The Liebherr BK3 is a derivate from ts7250 board
> + items:
> + - const: liebherr,bk3
> + - const: cirrus,ep9301
> +
> + - description: EDB302 is an evaluation board by Cirrus Logic,
> + based on a Cirrus Logic EP9302 CPU
> + items:
> + - const: cirrus,edb9302
> + - const: cirrus,ep9301
> +
> +additionalProperties: true
> diff --git a/Documentation/devicetree/bindings/soc/cirrus/cirrus,ep9301-syscon.yaml b/Documentation/devicetree/bindings/soc/cirrus/cirrus,ep9301-syscon.yaml
> new file mode 100644
> index 000000000000..1692250251d9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/cirrus/cirrus,ep9301-syscon.yaml
> @@ -0,0 +1,71 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/cirrus/cirrus,ep9301-syscon.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cirrus Logic EP93xx Platforms System Controller
> +
> +maintainers:
> + - Alexander Sverdlin <alexander.sverdlin@gmail.com>
> + - Nikita Shubin <nikita.shubin@maquefel.me>
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - cirrus,ep9302-syscon
> + - cirrus,ep9307-syscon
> + - cirrus,ep9312-syscon
> + - cirrus,ep9315-syscon
> + - const: cirrus,ep9301-syscon
> + - const: syscon
> + - const: simple-mfd
> + - items:
> + - const: cirrus,ep9301-syscon
> + - const: syscon
> + - const: simple-mfd
> +
> + reg:
> + maxItems: 1
> +
> + reboot:
> + type: object
> + $ref: /schemas/power/reset/cirrus,ep9301-reboot.yaml
There is no need to have empty node without any resources. There are no
benefits of this. Drop entire reboot schema and instantiate your driver
from parent device. simple-mfd also goes away. syscon probably as well,
unless you export registers for other devices?
> +
> + clock-controller:
> + type: object
> + $ref: /schemas/clock/cirrus,ep9301-clk.yaml
This could be okay, if it took address. But it doesn't, so again, this
can be just part of top node. Unless this is a separate device and you
miss here proper reg/addressing?
> +
> + pinctrl:
> + type: object
> + $ref: /schemas/pinctrl/cirrus,ep9301-pinctrl.yaml
No need, drop entire schema and node, just like with reboot.
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + syscon@80930000 {
> + compatible = "cirrus,ep9301-syscon",
> + "syscon", "simple-mfd";
> + reg = <0x80930000 0x1000>;
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 10/42] soc: Add SoC driver for Cirrus ep93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (8 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 09/42] dt-bindings: soc: Add Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 8:10 ` [PATCH v4 11/42] dt-bindings: timers: Add Cirrus EP93xx Nikita Shubin via B4 Relay
` (33 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Arnd Bergmann, Conor Dooley, Joel Stanley, Alexander Sverdlin,
Paul Menzel, Yinbo Zhu, Jonathan Neuschäfer, Nikita Shubin,
Walker Chen, Emil Renner Berthing, Linus Walleij, Thierry Reding,
Sergey Shtylyov, Uwe Kleine-König
Cc: Damien Le Moal, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add an SoC driver for the ep93xx. Currently there is only one thing
not fitting into any other framework, and that is the swlock setting.
Used for clock settings, pinctrl and restart.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/cirrus/Kconfig | 12 +++
drivers/soc/cirrus/Makefile | 2 +
drivers/soc/cirrus/soc-ep93xx.c | 215 ++++++++++++++++++++++++++++++++++++++
include/linux/soc/cirrus/ep93xx.h | 11 +-
6 files changed, 240 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 4e176280113a..16327b63b773 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -8,6 +8,7 @@ source "drivers/soc/aspeed/Kconfig"
source "drivers/soc/atmel/Kconfig"
source "drivers/soc/bcm/Kconfig"
source "drivers/soc/canaan/Kconfig"
+source "drivers/soc/cirrus/Kconfig"
source "drivers/soc/fsl/Kconfig"
source "drivers/soc/fujitsu/Kconfig"
source "drivers/soc/imx/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 3b0f9fb3b5c8..b76a03fe808e 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -9,6 +9,7 @@ obj-y += aspeed/
obj-$(CONFIG_ARCH_AT91) += atmel/
obj-y += bcm/
obj-$(CONFIG_SOC_CANAAN) += canaan/
+obj-$(CONFIG_EP93XX_SOC) += cirrus/
obj-$(CONFIG_ARCH_DOVE) += dove/
obj-$(CONFIG_MACH_DOVE) += dove/
obj-y += fsl/
diff --git a/drivers/soc/cirrus/Kconfig b/drivers/soc/cirrus/Kconfig
new file mode 100644
index 000000000000..408f3343a265
--- /dev/null
+++ b/drivers/soc/cirrus/Kconfig
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0
+
+if ARCH_EP93XX
+
+config EP93XX_SOC
+ bool "Cirrus EP93xx chips SoC"
+ select SOC_BUS
+ default y if !EP93XX_SOC_COMMON
+ help
+ Support SoC for Cirrus EP93xx chips.
+
+endif
diff --git a/drivers/soc/cirrus/Makefile b/drivers/soc/cirrus/Makefile
new file mode 100644
index 000000000000..ed6752844c6f
--- /dev/null
+++ b/drivers/soc/cirrus/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+obj-y += soc-ep93xx.o
diff --git a/drivers/soc/cirrus/soc-ep93xx.c b/drivers/soc/cirrus/soc-ep93xx.c
new file mode 100644
index 000000000000..b8b23ee56f9f
--- /dev/null
+++ b/drivers/soc/cirrus/soc-ep93xx.c
@@ -0,0 +1,215 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * SoC driver for Cirrus EP93xx chips.
+ * Copyright (C) 2022 Nikita Shubin <nikita.shubin@maquefel.me>
+ *
+ * Based on a rewrite of arch/arm/mach-ep93xx/core.c
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
+ *
+ * Thanks go to Michael Burian and Ray Lehtiniemi for their key
+ * role in the ep93xx Linux community
+ */
+
+#include <linux/bits.h>
+#include <linux/clk-provider.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/mfd/syscon.h>
+#include <linux/of.h>
+#include <linux/of_fdt.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+#include <linux/soc/cirrus/ep93xx.h>
+
+#define EP93XX_EXT_CLK_RATE 14745600
+
+#define EP93XX_SYSCON_DEVCFG 0x80
+
+#define EP93XX_SWLOCK_MAGICK 0xaa
+#define EP93XX_SYSCON_SWLOCK 0xc0
+#define EP93XX_SYSCON_SYSCFG 0x9c
+#define EP93XX_SYSCON_SYSCFG_REV_MASK GENMASK(31, 28)
+#define EP93XX_SYSCON_SYSCFG_REV_SHIFT 28
+
+#define EP93XX_SYSCON_CLKSET1 0x20
+#define EP93XX_SYSCON_CLKSET1_NBYP1 BIT(23)
+#define EP93XX_SYSCON_CLKSET2 0x24
+#define EP93XX_SYSCON_CLKSET2_NBYP2 BIT(19)
+#define EP93XX_SYSCON_CLKSET2_PLL2_EN BIT(18)
+
+static DEFINE_SPINLOCK(ep93xx_swlock);
+
+/*
+ * EP93xx System Controller software locked register write
+ *
+ * Logic safeguards are included to condition the control signals for
+ * power connection to the matrix to prevent part damage. In addition, a
+ * software lock register is included that must be written with 0xAA
+ * before each register write to change the values of the four switch
+ * matrix control registers.
+ */
+void ep93xx_regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&ep93xx_swlock, flags);
+
+ regmap_write(map, EP93XX_SYSCON_SWLOCK, EP93XX_SWLOCK_MAGICK);
+ regmap_write(map, reg, val);
+
+ spin_unlock_irqrestore(&ep93xx_swlock, flags);
+}
+
+void ep93xx_regmap_update_bits(struct regmap *map, unsigned int reg,
+ unsigned int mask, unsigned int val)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&ep93xx_swlock, flags);
+
+ regmap_write(map, EP93XX_SYSCON_SWLOCK, EP93XX_SWLOCK_MAGICK);
+ /* force write is required to clear swlock if is no changes are made */
+ regmap_update_bits_base(map, reg, mask, val, NULL, false, true);
+
+ spin_unlock_irqrestore(&ep93xx_swlock, flags);
+}
+
+static unsigned int __init ep93xx_soc_revision(struct regmap *map)
+{
+ unsigned int val;
+
+ regmap_read(map, EP93XX_SYSCON_SYSCFG, &val);
+ val &= EP93XX_SYSCON_SYSCFG_REV_MASK;
+ val >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
+ return val;
+}
+
+static const char __init *ep93xx_get_soc_rev(struct regmap *map)
+{
+ switch (ep93xx_soc_revision(map)) {
+ case EP93XX_CHIP_REV_D0:
+ return "D0";
+ case EP93XX_CHIP_REV_D1:
+ return "D1";
+ case EP93XX_CHIP_REV_E0:
+ return "E0";
+ case EP93XX_CHIP_REV_E1:
+ return "E1";
+ case EP93XX_CHIP_REV_E2:
+ return "E2";
+ default:
+ return "unknown";
+ }
+}
+
+/*
+ * PLL rate = 14.7456 MHz * (X1FBD + 1) * (X2FBD + 1) / (X2IPD + 1) / 2^PS
+ */
+static unsigned long __init calc_pll_rate(u64 rate, u32 config_word)
+{
+ rate *= ((config_word >> 11) & GENMASK(4, 0)) + 1; /* X1FBD */
+ rate *= ((config_word >> 5) & GENMASK(5, 0)) + 1; /* X2FBD */
+ do_div(rate, (config_word & GENMASK(4, 0)) + 1); /* X2IPD */
+ rate >>= ((config_word >> 16) & GENMASK(1, 0)); /* PS */
+
+ return rate;
+}
+
+static int __init ep93xx_syscon_probe(struct platform_device *pdev)
+{
+ unsigned int clk_f_div, clk_h_div, clk_p_div, clk_usb_div;
+ const char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
+ const char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
+ const char pclk_divisors[] = { 1, 2, 4, 8 };
+ unsigned long clk_pll1_rate, clk_pll2_rate;
+ struct soc_device_attribute *attrs;
+ struct soc_device *soc_dev;
+ struct device *dev = &pdev->dev;
+ struct regmap *map;
+ struct clk_hw *hw;
+ u32 value;
+
+ map = device_node_to_regmap(dev->of_node);
+ if (IS_ERR(map))
+ return PTR_ERR(map);
+
+ /* Determine the bootloader configured pll1 rate */
+ regmap_read(map, EP93XX_SYSCON_CLKSET1, &value);
+
+ if (value & EP93XX_SYSCON_CLKSET1_NBYP1)
+ clk_pll1_rate = calc_pll_rate(EP93XX_EXT_CLK_RATE, value);
+ else
+ clk_pll1_rate = EP93XX_EXT_CLK_RATE;
+
+ hw = clk_hw_register_fixed_rate(dev, "pll1", "xtali", 0, clk_pll1_rate);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ /* Initialize the pll1 derived clocks */
+ clk_f_div = fclk_divisors[(value >> 25) & GENMASK(2, 0)];
+ clk_h_div = hclk_divisors[(value >> 20) & GENMASK(2, 0)];
+ clk_p_div = pclk_divisors[(value >> 18) & GENMASK(1, 0)];
+
+ hw = clk_hw_register_fixed_factor(dev, "fclk", "pll1", 0, 1, clk_f_div);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ hw = clk_hw_register_fixed_factor(dev, "hclk", "pll1", 0, 1, clk_h_div);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ hw = clk_hw_register_fixed_factor(dev, "pclk", "hclk", 0, 1, clk_p_div);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ /* Determine the bootloader configured pll2 rate */
+ regmap_read(map, EP93XX_SYSCON_CLKSET2, &value);
+ if (!(value & EP93XX_SYSCON_CLKSET2_NBYP2))
+ clk_pll2_rate = EP93XX_EXT_CLK_RATE;
+ else if (value & EP93XX_SYSCON_CLKSET2_PLL2_EN)
+ clk_pll2_rate = calc_pll_rate(EP93XX_EXT_CLK_RATE, value);
+ else
+ clk_pll2_rate = 0;
+
+ hw = clk_hw_register_fixed_rate(dev, "pll2", "xtali", 0, clk_pll2_rate);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ regmap_read(map, EP93XX_SYSCON_CLKSET2, &value);
+ clk_usb_div = (((value >> 28) & GENMASK(3, 0)) + 1);
+ hw = clk_hw_register_fixed_factor(dev, "usb_clk", "pll2", 0, 1, clk_usb_div);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ attrs = devm_kzalloc(dev, sizeof(*attrs), GFP_KERNEL);
+ if (!attrs)
+ return -ENOMEM;
+
+ attrs->machine = of_flat_dt_get_machine_name();
+ attrs->family = "Cirrus Logic EP93xx";
+ attrs->revision = ep93xx_get_soc_rev(map);
+
+ soc_dev = soc_device_register(attrs);
+ if (IS_ERR(soc_dev))
+ return PTR_ERR(soc_dev);
+
+ dev_info(dev, "EP93xx SoC revision %s\n", attrs->revision);
+
+ return 0;
+}
+
+static const struct of_device_id ep9301_syscon_of_device_ids[] = {
+ { .compatible = "cirrus,ep9301-syscon" },
+ { /* sentinel */ }
+};
+
+static struct platform_driver ep9301_syscon_driver = {
+ .driver = {
+ .name = "ep9301-syscon",
+ .of_match_table = ep9301_syscon_of_device_ids,
+ },
+};
+builtin_platform_driver_probe(ep9301_syscon_driver, ep93xx_syscon_probe);
diff --git a/include/linux/soc/cirrus/ep93xx.h b/include/linux/soc/cirrus/ep93xx.h
index 8b4b8221ed4c..267529ee2b3d 100644
--- a/include/linux/soc/cirrus/ep93xx.h
+++ b/include/linux/soc/cirrus/ep93xx.h
@@ -11,7 +11,7 @@ struct regmap;
#define EP93XX_CHIP_REV_E1 6
#define EP93XX_CHIP_REV_E2 7
-#ifdef CONFIG_ARCH_EP93XX
+#if defined(CONFIG_EP93XX_SOC_COMMON)
int ep93xx_pwm_acquire_gpio(struct platform_device *pdev);
void ep93xx_pwm_release_gpio(struct platform_device *pdev);
int ep93xx_ide_acquire_gpio(struct platform_device *pdev);
@@ -33,11 +33,18 @@ static inline int ep93xx_i2s_acquire(void) { return 0; }
static inline void ep93xx_i2s_release(void) {}
static inline unsigned int ep93xx_chip_revision(void) { return 0; }
-#endif
+#if defined(CONFIG_EP93XX_SOC)
+void ep93xx_regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
+void ep93xx_regmap_update_bits(struct regmap *map, unsigned int reg,
+ unsigned int mask, unsigned int val);
+#else
static inline void ep93xx_regmap_write(struct regmap *map, unsigned int reg, unsigned int val) {}
static inline void ep93xx_regmap_update_bits(struct regmap *map, unsigned int reg,
unsigned int mask, unsigned int val)
{ }
#endif
+#endif
+
+#endif
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 11/42] dt-bindings: timers: Add Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (9 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 10/42] soc: Add SoC driver for Cirrus ep93xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-10-15 21:40 ` Daniel Lezcano
2023-10-27 18:23 ` [tip: timers/core] " tip-bot2 for Nikita Shubin
2023-09-15 8:10 ` [PATCH v4 12/42] clocksource: ep93xx: Add driver for Cirrus Logic EP93xx Nikita Shubin via B4 Relay
` (32 subsequent siblings)
43 siblings, 2 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Alexander Sverdlin,
Nikita Shubin
Cc: linux-kernel, devicetree, Arnd Bergmann, Alexander Sverdlin,
Krzysztof Kozlowski
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add device tree bindings for the Cirrus Logic EP93xx timer block
used in these SoCs.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../bindings/timer/cirrus,ep9301-timer.yaml | 49 ++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/cirrus,ep9301-timer.yaml b/Documentation/devicetree/bindings/timer/cirrus,ep9301-timer.yaml
new file mode 100644
index 000000000000..e463e11e259d
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/cirrus,ep9301-timer.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/cirrus,ep9301-timer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic EP93xx timer
+
+maintainers:
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-timer
+ - items:
+ - enum:
+ - cirrus,ep9302-timer
+ - cirrus,ep9307-timer
+ - cirrus,ep9312-timer
+ - cirrus,ep9315-timer
+ - const: cirrus,ep9301-timer
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ timer@80810000 {
+ compatible = "cirrus,ep9301-timer";
+ reg = <0x80810000 0x100>;
+ interrupt-parent = <&vic1>;
+ interrupts = <19>;
+ };
+...
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 11/42] dt-bindings: timers: Add Cirrus EP93xx
2023-09-15 8:10 ` [PATCH v4 11/42] dt-bindings: timers: Add Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-10-15 21:40 ` Daniel Lezcano
2023-10-27 18:23 ` [tip: timers/core] " tip-bot2 for Nikita Shubin
1 sibling, 0 replies; 78+ messages in thread
From: Daniel Lezcano @ 2023-10-15 21:40 UTC (permalink / raw)
To: nikita.shubin, Thomas Gleixner, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Alexander Sverdlin
Cc: linux-kernel, devicetree, Arnd Bergmann, Krzysztof Kozlowski
On 15/09/2023 10:10, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add device tree bindings for the Cirrus Logic EP93xx timer block
> used in these SoCs.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
> .../bindings/timer/cirrus,ep9301-timer.yaml | 49 ++++++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/timer/cirrus,ep9301-timer.yaml b/Documentation/devicetree/bindings/timer/cirrus,ep9301-timer.yaml
> new file mode 100644
> index 000000000000..e463e11e259d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/cirrus,ep9301-timer.yaml
> @@ -0,0 +1,49 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
Applied, thanks
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 78+ messages in thread
* [tip: timers/core] dt-bindings: timers: Add Cirrus EP93xx
2023-09-15 8:10 ` [PATCH v4 11/42] dt-bindings: timers: Add Cirrus EP93xx Nikita Shubin via B4 Relay
2023-10-15 21:40 ` Daniel Lezcano
@ 2023-10-27 18:23 ` tip-bot2 for Nikita Shubin
1 sibling, 0 replies; 78+ messages in thread
From: tip-bot2 for Nikita Shubin @ 2023-10-27 18:23 UTC (permalink / raw)
To: linux-tip-commits
Cc: Krzysztof Kozlowski, Nikita Shubin, Daniel Lezcano, x86, linux-kernel
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 81824f7c8fb0485a5007bf0e60718afdecdef60c
Gitweb: https://git.kernel.org/tip/81824f7c8fb0485a5007bf0e60718afdecdef60c
Author: Nikita Shubin <nikita.shubin@maquefel.me>
AuthorDate: Fri, 15 Sep 2023 11:10:53 +03:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Sun, 15 Oct 2023 23:36:36 +02:00
dt-bindings: timers: Add Cirrus EP93xx
Add device tree bindings for the Cirrus Logic EP93xx timer block
used in these SoCs.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230915-ep93xx-v4-11-a1d779dcec10@maquefel.me
---
Documentation/devicetree/bindings/timer/cirrus,ep9301-timer.yaml | 49 +++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/cirrus,ep9301-timer.yaml
diff --git a/Documentation/devicetree/bindings/timer/cirrus,ep9301-timer.yaml b/Documentation/devicetree/bindings/timer/cirrus,ep9301-timer.yaml
new file mode 100644
index 0000000..e463e11
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/cirrus,ep9301-timer.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/cirrus,ep9301-timer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic EP93xx timer
+
+maintainers:
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-timer
+ - items:
+ - enum:
+ - cirrus,ep9302-timer
+ - cirrus,ep9307-timer
+ - cirrus,ep9312-timer
+ - cirrus,ep9315-timer
+ - const: cirrus,ep9301-timer
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ timer@80810000 {
+ compatible = "cirrus,ep9301-timer";
+ reg = <0x80810000 0x100>;
+ interrupt-parent = <&vic1>;
+ interrupts = <19>;
+ };
+...
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH v4 12/42] clocksource: ep93xx: Add driver for Cirrus Logic EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (10 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 11/42] dt-bindings: timers: Add Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-10-11 13:30 ` Daniel Lezcano
` (2 more replies)
2023-09-15 8:10 ` [PATCH v4 13/42] dt-bindings: rtc: Add Cirrus EP93xx Nikita Shubin via B4 Relay
` (31 subsequent siblings)
43 siblings, 3 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Daniel Lezcano, Thomas Gleixner
Cc: linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Rewrite EP93xx timer driver located in arch/arm/mach-ep93xx/timer-ep93xx.c
trying to do everything the device tree way:
- Make every IO-access relative to a base address and dynamic
so we can do a dynamic ioremap and get going.
- Find register range and interrupt from the device tree.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/clocksource/Kconfig | 11 +++
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-ep93xx.c | 190 +++++++++++++++++++++++++++++++++++++
3 files changed, 202 insertions(+)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index c4d671a5a13d..f1b84b05b281 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -739,4 +739,15 @@ config GOLDFISH_TIMER
help
Support for the timer/counter of goldfish-rtc
+config EP93XX_TIMER
+ bool "Cirrus Logic ep93xx timer driver" if COMPILE_TEST
+ depends on ARCH_EP93XX
+ depends on GENERIC_CLOCKEVENTS
+ depends on HAS_IOMEM
+ select CLKSRC_MMIO
+ select TIMER_OF
+ help
+ Enables support for the Cirrus Logic timer block
+ EP93XX.
+
endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 5d93c9e3fc55..b6a3cf1f5b9d 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -90,3 +90,4 @@ obj-$(CONFIG_MSC313E_TIMER) += timer-msc313e.o
obj-$(CONFIG_GOLDFISH_TIMER) += timer-goldfish.o
obj-$(CONFIG_GXP_TIMER) += timer-gxp.o
obj-$(CONFIG_CLKSRC_LOONGSON1_PWM) += timer-loongson1-pwm.o
+obj-$(CONFIG_EP93XX_TIMER) += timer-ep93xx.o
diff --git a/drivers/clocksource/timer-ep93xx.c b/drivers/clocksource/timer-ep93xx.c
new file mode 100644
index 000000000000..bc0ca6e12334
--- /dev/null
+++ b/drivers/clocksource/timer-ep93xx.c
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Cirrus Logic EP93xx timer driver.
+ * Copyright (C) 2021 Nikita Shubin <nikita.shubin@maquefel.me>
+ *
+ * Based on a rewrite of arch/arm/mach-ep93xx/timer.c:
+ */
+
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/sched_clock.h>
+
+#include <asm/mach/time.h>
+
+/*************************************************************************
+ * Timer handling for EP93xx
+ *************************************************************************
+ * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
+ * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
+ * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
+ * is free-running, and can't generate interrupts.
+ *
+ * The 508 kHz timers are ideal for use for the timer interrupt, as the
+ * most common values of HZ divide 508 kHz nicely. We pick the 32 bit
+ * timer (timer 3) to get as long sleep intervals as possible when using
+ * CONFIG_NO_HZ.
+ *
+ * The higher clock rate of timer 4 makes it a better choice than the
+ * other timers for use as clock source and for sched_clock(), providing
+ * a stable 40 bit time base.
+ *************************************************************************
+ */
+
+#define EP93XX_TIMER1_LOAD 0x00
+#define EP93XX_TIMER1_VALUE 0x04
+#define EP93XX_TIMER1_CONTROL 0x08
+#define EP93XX_TIMER123_CONTROL_ENABLE BIT(7)
+#define EP93XX_TIMER123_CONTROL_MODE BIT(6)
+#define EP93XX_TIMER123_CONTROL_CLKSEL BIT(3)
+#define EP93XX_TIMER1_CLEAR 0x0c
+#define EP93XX_TIMER2_LOAD 0x20
+#define EP93XX_TIMER2_VALUE 0x24
+#define EP93XX_TIMER2_CONTROL 0x28
+#define EP93XX_TIMER2_CLEAR 0x2c
+/*
+ * This read-only register contains the low word of the time stamp debug timer
+ * ( Timer4). When this register is read, the high byte of the Timer4 counter is
+ * saved in the Timer4ValueHigh register.
+ */
+#define EP93XX_TIMER4_VALUE_LOW 0x60
+#define EP93XX_TIMER4_VALUE_HIGH 0x64
+#define EP93XX_TIMER4_VALUE_HIGH_ENABLE BIT(8)
+#define EP93XX_TIMER3_LOAD 0x80
+#define EP93XX_TIMER3_VALUE 0x84
+#define EP93XX_TIMER3_CONTROL 0x88
+#define EP93XX_TIMER3_CLEAR 0x8c
+
+#define EP93XX_TIMER123_RATE 508469
+#define EP93XX_TIMER4_RATE 983040
+
+struct ep93xx_tcu {
+ void __iomem *base;
+};
+
+static struct ep93xx_tcu *ep93xx_tcu;
+
+static u64 ep93xx_clocksource_read(struct clocksource *c)
+{
+ struct ep93xx_tcu *tcu = ep93xx_tcu;
+
+ return lo_hi_readq(tcu->base + EP93XX_TIMER4_VALUE_LOW) & GENMASK_ULL(39, 0);
+}
+
+static u64 notrace ep93xx_read_sched_clock(void)
+{
+ return ep93xx_clocksource_read(NULL);
+}
+
+static int ep93xx_clkevt_set_next_event(unsigned long next,
+ struct clock_event_device *evt)
+{
+ struct ep93xx_tcu *tcu = ep93xx_tcu;
+ /* Default mode: periodic, off, 508 kHz */
+ u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
+ EP93XX_TIMER123_CONTROL_CLKSEL;
+
+ /* Clear timer */
+ writel(tmode, tcu->base + EP93XX_TIMER3_CONTROL);
+
+ /* Set next event */
+ writel(next, tcu->base + EP93XX_TIMER3_LOAD);
+ writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
+ tcu->base + EP93XX_TIMER3_CONTROL);
+ return 0;
+}
+
+static int ep93xx_clkevt_shutdown(struct clock_event_device *evt)
+{
+ struct ep93xx_tcu *tcu = ep93xx_tcu;
+ /* Disable timer */
+ writel(0, tcu->base + EP93XX_TIMER3_CONTROL);
+
+ return 0;
+}
+
+static struct clock_event_device ep93xx_clockevent = {
+ .name = "timer1",
+ .features = CLOCK_EVT_FEAT_ONESHOT,
+ .set_state_shutdown = ep93xx_clkevt_shutdown,
+ .set_state_oneshot = ep93xx_clkevt_shutdown,
+ .tick_resume = ep93xx_clkevt_shutdown,
+ .set_next_event = ep93xx_clkevt_set_next_event,
+ .rating = 300,
+};
+
+static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
+{
+ struct ep93xx_tcu *tcu = ep93xx_tcu;
+ struct clock_event_device *evt = dev_id;
+
+ /* Writing any value clears the timer interrupt */
+ writel(1, tcu->base + EP93XX_TIMER3_CLEAR);
+
+ evt->event_handler(evt);
+
+ return IRQ_HANDLED;
+}
+
+static int __init ep93xx_timer_of_init(struct device_node *np)
+{
+ int irq;
+ unsigned long flags = IRQF_TIMER | IRQF_IRQPOLL;
+ struct ep93xx_tcu *tcu;
+ int ret;
+
+ tcu = kzalloc(sizeof(*tcu), GFP_KERNEL);
+ if (!tcu)
+ return -ENOMEM;
+
+ tcu->base = of_iomap(np, 0);
+ if (!tcu->base) {
+ pr_err("Can't remap registers\n");
+ ret = -ENXIO;
+ goto out_free;
+ }
+
+ ep93xx_tcu = tcu;
+
+ irq = irq_of_parse_and_map(np, 0);
+ if (irq == 0)
+ irq = -EINVAL;
+ if (irq < 0) {
+ pr_err("EP93XX Timer Can't parse IRQ %d", irq);
+ goto out_free;
+ }
+
+ /* Enable and register clocksource and sched_clock on timer 4 */
+ writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
+ tcu->base + EP93XX_TIMER4_VALUE_HIGH);
+ clocksource_mmio_init(NULL, "timer4",
+ EP93XX_TIMER4_RATE, 200, 40,
+ ep93xx_clocksource_read);
+ sched_clock_register(ep93xx_read_sched_clock, 40,
+ EP93XX_TIMER4_RATE);
+
+ /* Set up clockevent on timer 3 */
+ if (request_irq(irq, ep93xx_timer_interrupt, flags, "ep93xx timer",
+ &ep93xx_clockevent))
+ pr_err("Failed to request irq %d (ep93xx timer)\n", irq);
+
+ clockevents_config_and_register(&ep93xx_clockevent,
+ EP93XX_TIMER123_RATE,
+ 1,
+ UINT_MAX);
+
+ return 0;
+
+out_free:
+ kfree(tcu);
+ return ret;
+}
+TIMER_OF_DECLARE(ep93xx_timer, "cirrus,ep9301-timer", ep93xx_timer_of_init);
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 12/42] clocksource: ep93xx: Add driver for Cirrus Logic EP93xx
2023-09-15 8:10 ` [PATCH v4 12/42] clocksource: ep93xx: Add driver for Cirrus Logic EP93xx Nikita Shubin via B4 Relay
@ 2023-10-11 13:30 ` Daniel Lezcano
2023-10-15 21:40 ` Daniel Lezcano
2023-10-27 18:23 ` [tip: timers/core] " tip-bot2 for Nikita Shubin
2 siblings, 0 replies; 78+ messages in thread
From: Daniel Lezcano @ 2023-10-11 13:30 UTC (permalink / raw)
To: nikita.shubin, Thomas Gleixner
Cc: linux-kernel, Arnd Bergmann, Alexander Sverdlin
On 15/09/2023 10:10, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Rewrite EP93xx timer driver located in arch/arm/mach-ep93xx/timer-ep93xx.c
> trying to do everything the device tree way:
>
> - Make every IO-access relative to a base address and dynamic
> so we can do a dynamic ioremap and get going.
> - Find register range and interrupt from the device tree.
>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
> drivers/clocksource/Kconfig | 11 +++
> drivers/clocksource/Makefile | 1 +
> drivers/clocksource/timer-ep93xx.c | 190 +++++++++++++++++++++++++++++++++++++
> 3 files changed, 202 insertions(+)
>
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index c4d671a5a13d..f1b84b05b281 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -739,4 +739,15 @@ config GOLDFISH_TIMER
> help
> Support for the timer/counter of goldfish-rtc
>
> +config EP93XX_TIMER
> + bool "Cirrus Logic ep93xx timer driver" if COMPILE_TEST
> + depends on ARCH_EP93XX
Remove this dependency so it would be possible to compile-test on other
platforms.
> + depends on GENERIC_CLOCKEVENTS
This dependency is explicit for all the drivers belonging to this
Kconfig. No need to add it.
> + depends on HAS_IOMEM
> + select CLKSRC_MMIO
> + select TIMER_OF
> + help
> + Enables support for the Cirrus Logic timer block
> + EP93XX.
> +
> endmenu
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> index 5d93c9e3fc55..b6a3cf1f5b9d 100644
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -90,3 +90,4 @@ obj-$(CONFIG_MSC313E_TIMER) += timer-msc313e.o
> obj-$(CONFIG_GOLDFISH_TIMER) += timer-goldfish.o
> obj-$(CONFIG_GXP_TIMER) += timer-gxp.o
> obj-$(CONFIG_CLKSRC_LOONGSON1_PWM) += timer-loongson1-pwm.o
> +obj-$(CONFIG_EP93XX_TIMER) += timer-ep93xx.o
> diff --git a/drivers/clocksource/timer-ep93xx.c b/drivers/clocksource/timer-ep93xx.c
> new file mode 100644
> index 000000000000..bc0ca6e12334
> --- /dev/null
> +++ b/drivers/clocksource/timer-ep93xx.c
> @@ -0,0 +1,190 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Cirrus Logic EP93xx timer driver.
> + * Copyright (C) 2021 Nikita Shubin <nikita.shubin@maquefel.me>
> + *
> + * Based on a rewrite of arch/arm/mach-ep93xx/timer.c:
> + */
> +
> +#include <linux/clockchips.h>
> +#include <linux/clocksource.h>
> +#include <linux/init.h>
> +#include <linux/interrupt.h>
> +#include <linux/io.h>
> +#include <linux/io-64-nonatomic-lo-hi.h>
> +#include <linux/irq.h>
> +#include <linux/kernel.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/sched_clock.h>
> +
> +#include <asm/mach/time.h>
This head should not be needed.
> +
> +/*************************************************************************
> + * Timer handling for EP93xx
> + *************************************************************************
> + * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
> + * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
> + * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
> + * is free-running, and can't generate interrupts.
> + *
> + * The 508 kHz timers are ideal for use for the timer interrupt, as the
> + * most common values of HZ divide 508 kHz nicely. We pick the 32 bit
> + * timer (timer 3) to get as long sleep intervals as possible when using
> + * CONFIG_NO_HZ.
> + *
> + * The higher clock rate of timer 4 makes it a better choice than the
> + * other timers for use as clock source and for sched_clock(), providing
> + * a stable 40 bit time base.
> + *************************************************************************
> + */
> +
> +#define EP93XX_TIMER1_LOAD 0x00
> +#define EP93XX_TIMER1_VALUE 0x04
> +#define EP93XX_TIMER1_CONTROL 0x08
> +#define EP93XX_TIMER123_CONTROL_ENABLE BIT(7)
> +#define EP93XX_TIMER123_CONTROL_MODE BIT(6)
> +#define EP93XX_TIMER123_CONTROL_CLKSEL BIT(3)
> +#define EP93XX_TIMER1_CLEAR 0x0c
> +#define EP93XX_TIMER2_LOAD 0x20
> +#define EP93XX_TIMER2_VALUE 0x24
> +#define EP93XX_TIMER2_CONTROL 0x28
> +#define EP93XX_TIMER2_CLEAR 0x2c
> +/*
> + * This read-only register contains the low word of the time stamp debug timer
> + * ( Timer4). When this register is read, the high byte of the Timer4 counter is
> + * saved in the Timer4ValueHigh register.
> + */
> +#define EP93XX_TIMER4_VALUE_LOW 0x60
> +#define EP93XX_TIMER4_VALUE_HIGH 0x64
> +#define EP93XX_TIMER4_VALUE_HIGH_ENABLE BIT(8)
> +#define EP93XX_TIMER3_LOAD 0x80
> +#define EP93XX_TIMER3_VALUE 0x84
> +#define EP93XX_TIMER3_CONTROL 0x88
> +#define EP93XX_TIMER3_CLEAR 0x8c
> +
> +#define EP93XX_TIMER123_RATE 508469
> +#define EP93XX_TIMER4_RATE 983040
> +
> +struct ep93xx_tcu {
> + void __iomem *base;
> +};
> +
> +static struct ep93xx_tcu *ep93xx_tcu;
Usually what is done is:
struct ep93xx_tcu {
void __iomem *base;
struct clock_event_device evt;
};
And with container_of and all timer API passing the *evt as parameter,
we can retrieve this data.
So we should have:
struct ep93xx_tcu timer = {
.evt = {
.name = "timer1",
.features = CLOCK_EVT_FEAT_ONESHOT,
.set_state_shutdown = ep93xx_clkevt_shutdown,
.set_state_oneshot = ep93xx_clkevt_shutdown,
.tick_resume = ep93xx_clkevt_shutdown,
.set_next_event = ep93xx_clkevt_set_next_event,
.rating = 300,
};
/* No need to compute every time */
void __iomem *clksrc_base; /* base + timer4_val_low */
void __iomem *clkevt_base;
};
And no need to allocate in the init function.
> +static u64 ep93xx_clocksource_read(struct clocksource *c)
Perhaps add __may_be_unused annotation
> +{
> + struct ep93xx_tcu *tcu = ep93xx_tcu;
> +
> + return lo_hi_readq(tcu->base + EP93XX_TIMER4_VALUE_LOW) & GENMASK_ULL(39, 0);
> +}
> +
> +static u64 notrace ep93xx_read_sched_clock(void)
> +{
> + return ep93xx_clocksource_read(NULL);
> +}
> +static int ep93xx_clkevt_set_next_event(unsigned long next,
> + struct clock_event_device *evt)
> +{
> + struct ep93xx_tcu *tcu = ep93xx_tcu;
> + /* Default mode: periodic, off, 508 kHz */
> + u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
> + EP93XX_TIMER123_CONTROL_CLKSEL;
> +
> + /* Clear timer */
> + writel(tmode, tcu->base + EP93XX_TIMER3_CONTROL);
> +
> + /* Set next event */
> + writel(next, tcu->base + EP93XX_TIMER3_LOAD);
> + writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
> + tcu->base + EP93XX_TIMER3_CONTROL);
> + return 0;
> +}
> +
> +static int ep93xx_clkevt_shutdown(struct clock_event_device *evt)
> +{
> + struct ep93xx_tcu *tcu = ep93xx_tcu;
> + /* Disable timer */
> + writel(0, tcu->base + EP93XX_TIMER3_CONTROL);
> +
> + return 0;
> +}
> +
> +static struct clock_event_device ep93xx_clockevent = {
> + .name = "timer1",
> + .features = CLOCK_EVT_FEAT_ONESHOT,
> + .set_state_shutdown = ep93xx_clkevt_shutdown,
> + .set_state_oneshot = ep93xx_clkevt_shutdown,
> + .tick_resume = ep93xx_clkevt_shutdown,
> + .set_next_event = ep93xx_clkevt_set_next_event,
> + .rating = 300,
> +};
> +
> +static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
> +{
> + struct ep93xx_tcu *tcu = ep93xx_tcu;
> + struct clock_event_device *evt = dev_id;
> +
> + /* Writing any value clears the timer interrupt */
> + writel(1, tcu->base + EP93XX_TIMER3_CLEAR);
> +
> + evt->event_handler(evt);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int __init ep93xx_timer_of_init(struct device_node *np)
> +{
> + int irq;
> + unsigned long flags = IRQF_TIMER | IRQF_IRQPOLL;
> + struct ep93xx_tcu *tcu;
> + int ret;
> +
> + tcu = kzalloc(sizeof(*tcu), GFP_KERNEL);
> + if (!tcu)
> + return -ENOMEM;
> +
> + tcu->base = of_iomap(np, 0);
> + if (!tcu->base) {
> + pr_err("Can't remap registers\n");
> + ret = -ENXIO;
> + goto out_free;
> + }
> +
> + ep93xx_tcu = tcu;
> +
> + irq = irq_of_parse_and_map(np, 0);
> + if (irq == 0)
> + irq = -EINVAL;
> + if (irq < 0) {
> + pr_err("EP93XX Timer Can't parse IRQ %d", irq);
> + goto out_free;
> + }
> +
> + /* Enable and register clocksource and sched_clock on timer 4 */
> + writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
> + tcu->base + EP93XX_TIMER4_VALUE_HIGH);
> + clocksource_mmio_init(NULL, "timer4",
> + EP93XX_TIMER4_RATE, 200, 40,
> + ep93xx_clocksource_read);
return code check
> + sched_clock_register(ep93xx_read_sched_clock, 40,
> + EP93XX_TIMER4_RATE);
> +
> + /* Set up clockevent on timer 3 */
> + if (request_irq(irq, ep93xx_timer_interrupt, flags, "ep93xx timer",
> + &ep93xx_clockevent))
> + pr_err("Failed to request irq %d (ep93xx timer)\n", irq);
return error
> + clockevents_config_and_register(&ep93xx_clockevent,
> + EP93XX_TIMER123_RATE,
> + 1,
> + UINT_MAX);
> +
> + return 0;
> +
> +out_free:
> + kfree(tcu);
> + return ret;
> +}
> +TIMER_OF_DECLARE(ep93xx_timer, "cirrus,ep9301-timer", ep93xx_timer_of_init);
>
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 78+ messages in thread* Re: [PATCH v4 12/42] clocksource: ep93xx: Add driver for Cirrus Logic EP93xx
2023-09-15 8:10 ` [PATCH v4 12/42] clocksource: ep93xx: Add driver for Cirrus Logic EP93xx Nikita Shubin via B4 Relay
2023-10-11 13:30 ` Daniel Lezcano
@ 2023-10-15 21:40 ` Daniel Lezcano
2023-10-27 18:23 ` [tip: timers/core] " tip-bot2 for Nikita Shubin
2 siblings, 0 replies; 78+ messages in thread
From: Daniel Lezcano @ 2023-10-15 21:40 UTC (permalink / raw)
To: nikita.shubin, Thomas Gleixner
Cc: linux-kernel, Arnd Bergmann, Alexander Sverdlin
On 15/09/2023 10:10, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Rewrite EP93xx timer driver located in arch/arm/mach-ep93xx/timer-ep93xx.c
> trying to do everything the device tree way:
>
> - Make every IO-access relative to a base address and dynamic
> so we can do a dynamic ioremap and get going.
> - Find register range and interrupt from the device tree.
>
> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
Applied, thanks
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 78+ messages in thread
* [tip: timers/core] clocksource: ep93xx: Add driver for Cirrus Logic EP93xx
2023-09-15 8:10 ` [PATCH v4 12/42] clocksource: ep93xx: Add driver for Cirrus Logic EP93xx Nikita Shubin via B4 Relay
2023-10-11 13:30 ` Daniel Lezcano
2023-10-15 21:40 ` Daniel Lezcano
@ 2023-10-27 18:23 ` tip-bot2 for Nikita Shubin
2 siblings, 0 replies; 78+ messages in thread
From: tip-bot2 for Nikita Shubin @ 2023-10-27 18:23 UTC (permalink / raw)
To: linux-tip-commits
Cc: Linus Walleij, Alexander Sverdlin, Nikita Shubin, Daniel Lezcano,
x86, linux-kernel
The following commit has been merged into the timers/core branch of tip:
Commit-ID: c28ca80ba3b531a79402d61046aef83272f86b08
Gitweb: https://git.kernel.org/tip/c28ca80ba3b531a79402d61046aef83272f86b08
Author: Nikita Shubin <nikita.shubin@maquefel.me>
AuthorDate: Fri, 15 Sep 2023 11:10:54 +03:00
Committer: Daniel Lezcano <daniel.lezcano@linaro.org>
CommitterDate: Sun, 15 Oct 2023 23:36:36 +02:00
clocksource: ep93xx: Add driver for Cirrus Logic EP93xx
Rewrite EP93xx timer driver located in arch/arm/mach-ep93xx/timer-ep93xx.c
trying to do everything the device tree way:
- Make every IO-access relative to a base address and dynamic
so we can do a dynamic ioremap and get going.
- Find register range and interrupt from the device tree.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230915-ep93xx-v4-12-a1d779dcec10@maquefel.me
---
drivers/clocksource/Kconfig | 11 ++-
drivers/clocksource/Makefile | 1 +-
drivers/clocksource/timer-ep93xx.c | 190 ++++++++++++++++++++++++++++-
3 files changed, 202 insertions(+)
create mode 100644 drivers/clocksource/timer-ep93xx.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 0ba0dc4..34faa03 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -732,4 +732,15 @@ config GOLDFISH_TIMER
help
Support for the timer/counter of goldfish-rtc
+config EP93XX_TIMER
+ bool "Cirrus Logic ep93xx timer driver" if COMPILE_TEST
+ depends on ARCH_EP93XX
+ depends on GENERIC_CLOCKEVENTS
+ depends on HAS_IOMEM
+ select CLKSRC_MMIO
+ select TIMER_OF
+ help
+ Enables support for the Cirrus Logic timer block
+ EP93XX.
+
endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 368c346..4bb856e 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -89,3 +89,4 @@ obj-$(CONFIG_MSC313E_TIMER) += timer-msc313e.o
obj-$(CONFIG_GOLDFISH_TIMER) += timer-goldfish.o
obj-$(CONFIG_GXP_TIMER) += timer-gxp.o
obj-$(CONFIG_CLKSRC_LOONGSON1_PWM) += timer-loongson1-pwm.o
+obj-$(CONFIG_EP93XX_TIMER) += timer-ep93xx.o
diff --git a/drivers/clocksource/timer-ep93xx.c b/drivers/clocksource/timer-ep93xx.c
new file mode 100644
index 0000000..bc0ca6e
--- /dev/null
+++ b/drivers/clocksource/timer-ep93xx.c
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Cirrus Logic EP93xx timer driver.
+ * Copyright (C) 2021 Nikita Shubin <nikita.shubin@maquefel.me>
+ *
+ * Based on a rewrite of arch/arm/mach-ep93xx/timer.c:
+ */
+
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/sched_clock.h>
+
+#include <asm/mach/time.h>
+
+/*************************************************************************
+ * Timer handling for EP93xx
+ *************************************************************************
+ * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
+ * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
+ * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
+ * is free-running, and can't generate interrupts.
+ *
+ * The 508 kHz timers are ideal for use for the timer interrupt, as the
+ * most common values of HZ divide 508 kHz nicely. We pick the 32 bit
+ * timer (timer 3) to get as long sleep intervals as possible when using
+ * CONFIG_NO_HZ.
+ *
+ * The higher clock rate of timer 4 makes it a better choice than the
+ * other timers for use as clock source and for sched_clock(), providing
+ * a stable 40 bit time base.
+ *************************************************************************
+ */
+
+#define EP93XX_TIMER1_LOAD 0x00
+#define EP93XX_TIMER1_VALUE 0x04
+#define EP93XX_TIMER1_CONTROL 0x08
+#define EP93XX_TIMER123_CONTROL_ENABLE BIT(7)
+#define EP93XX_TIMER123_CONTROL_MODE BIT(6)
+#define EP93XX_TIMER123_CONTROL_CLKSEL BIT(3)
+#define EP93XX_TIMER1_CLEAR 0x0c
+#define EP93XX_TIMER2_LOAD 0x20
+#define EP93XX_TIMER2_VALUE 0x24
+#define EP93XX_TIMER2_CONTROL 0x28
+#define EP93XX_TIMER2_CLEAR 0x2c
+/*
+ * This read-only register contains the low word of the time stamp debug timer
+ * ( Timer4). When this register is read, the high byte of the Timer4 counter is
+ * saved in the Timer4ValueHigh register.
+ */
+#define EP93XX_TIMER4_VALUE_LOW 0x60
+#define EP93XX_TIMER4_VALUE_HIGH 0x64
+#define EP93XX_TIMER4_VALUE_HIGH_ENABLE BIT(8)
+#define EP93XX_TIMER3_LOAD 0x80
+#define EP93XX_TIMER3_VALUE 0x84
+#define EP93XX_TIMER3_CONTROL 0x88
+#define EP93XX_TIMER3_CLEAR 0x8c
+
+#define EP93XX_TIMER123_RATE 508469
+#define EP93XX_TIMER4_RATE 983040
+
+struct ep93xx_tcu {
+ void __iomem *base;
+};
+
+static struct ep93xx_tcu *ep93xx_tcu;
+
+static u64 ep93xx_clocksource_read(struct clocksource *c)
+{
+ struct ep93xx_tcu *tcu = ep93xx_tcu;
+
+ return lo_hi_readq(tcu->base + EP93XX_TIMER4_VALUE_LOW) & GENMASK_ULL(39, 0);
+}
+
+static u64 notrace ep93xx_read_sched_clock(void)
+{
+ return ep93xx_clocksource_read(NULL);
+}
+
+static int ep93xx_clkevt_set_next_event(unsigned long next,
+ struct clock_event_device *evt)
+{
+ struct ep93xx_tcu *tcu = ep93xx_tcu;
+ /* Default mode: periodic, off, 508 kHz */
+ u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
+ EP93XX_TIMER123_CONTROL_CLKSEL;
+
+ /* Clear timer */
+ writel(tmode, tcu->base + EP93XX_TIMER3_CONTROL);
+
+ /* Set next event */
+ writel(next, tcu->base + EP93XX_TIMER3_LOAD);
+ writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
+ tcu->base + EP93XX_TIMER3_CONTROL);
+ return 0;
+}
+
+static int ep93xx_clkevt_shutdown(struct clock_event_device *evt)
+{
+ struct ep93xx_tcu *tcu = ep93xx_tcu;
+ /* Disable timer */
+ writel(0, tcu->base + EP93XX_TIMER3_CONTROL);
+
+ return 0;
+}
+
+static struct clock_event_device ep93xx_clockevent = {
+ .name = "timer1",
+ .features = CLOCK_EVT_FEAT_ONESHOT,
+ .set_state_shutdown = ep93xx_clkevt_shutdown,
+ .set_state_oneshot = ep93xx_clkevt_shutdown,
+ .tick_resume = ep93xx_clkevt_shutdown,
+ .set_next_event = ep93xx_clkevt_set_next_event,
+ .rating = 300,
+};
+
+static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
+{
+ struct ep93xx_tcu *tcu = ep93xx_tcu;
+ struct clock_event_device *evt = dev_id;
+
+ /* Writing any value clears the timer interrupt */
+ writel(1, tcu->base + EP93XX_TIMER3_CLEAR);
+
+ evt->event_handler(evt);
+
+ return IRQ_HANDLED;
+}
+
+static int __init ep93xx_timer_of_init(struct device_node *np)
+{
+ int irq;
+ unsigned long flags = IRQF_TIMER | IRQF_IRQPOLL;
+ struct ep93xx_tcu *tcu;
+ int ret;
+
+ tcu = kzalloc(sizeof(*tcu), GFP_KERNEL);
+ if (!tcu)
+ return -ENOMEM;
+
+ tcu->base = of_iomap(np, 0);
+ if (!tcu->base) {
+ pr_err("Can't remap registers\n");
+ ret = -ENXIO;
+ goto out_free;
+ }
+
+ ep93xx_tcu = tcu;
+
+ irq = irq_of_parse_and_map(np, 0);
+ if (irq == 0)
+ irq = -EINVAL;
+ if (irq < 0) {
+ pr_err("EP93XX Timer Can't parse IRQ %d", irq);
+ goto out_free;
+ }
+
+ /* Enable and register clocksource and sched_clock on timer 4 */
+ writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
+ tcu->base + EP93XX_TIMER4_VALUE_HIGH);
+ clocksource_mmio_init(NULL, "timer4",
+ EP93XX_TIMER4_RATE, 200, 40,
+ ep93xx_clocksource_read);
+ sched_clock_register(ep93xx_read_sched_clock, 40,
+ EP93XX_TIMER4_RATE);
+
+ /* Set up clockevent on timer 3 */
+ if (request_irq(irq, ep93xx_timer_interrupt, flags, "ep93xx timer",
+ &ep93xx_clockevent))
+ pr_err("Failed to request irq %d (ep93xx timer)\n", irq);
+
+ clockevents_config_and_register(&ep93xx_clockevent,
+ EP93XX_TIMER123_RATE,
+ 1,
+ UINT_MAX);
+
+ return 0;
+
+out_free:
+ kfree(tcu);
+ return ret;
+}
+TIMER_OF_DECLARE(ep93xx_timer, "cirrus,ep9301-timer", ep93xx_timer_of_init);
^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH v4 13/42] dt-bindings: rtc: Add Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (11 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 12/42] clocksource: ep93xx: Add driver for Cirrus Logic EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 10:43 ` Krzysztof Kozlowski
2023-09-15 8:10 ` [PATCH v4 14/42] rtc: ep93xx: add DT support for " Nikita Shubin via B4 Relay
` (30 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Alessandro Zummo, Alexandre Belloni, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Hartley Sweeten,
Alexander Sverdlin
Cc: linux-rtc, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add device tree bindings for the Cirrus Logic EP93xx RTC block
used in these SoCs.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../devicetree/bindings/rtc/cirrus,ep9301-rtc.yaml | 42 ++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/Documentation/devicetree/bindings/rtc/cirrus,ep9301-rtc.yaml b/Documentation/devicetree/bindings/rtc/cirrus,ep9301-rtc.yaml
new file mode 100644
index 000000000000..a95f6af2b1c0
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/cirrus,ep9301-rtc.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/rtc/cirrus,ep9301-rtc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus EP93xx Real Time Clock controller
+
+maintainers:
+ - Hartley Sweeten <hsweeten@visionengravers.com>
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+
+allOf:
+ - $ref: rtc.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-rtc
+ - items:
+ - enum:
+ - cirrus,ep9302-rtc
+ - cirrus,ep9307-rtc
+ - cirrus,ep9312-rtc
+ - cirrus,ep9315-rtc
+ - const: cirrus,ep9301-rtc
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ rtc@80920000 {
+ compatible = "cirrus,ep9301-rtc";
+ reg = <0x80920000 0x100>;
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 13/42] dt-bindings: rtc: Add Cirrus EP93xx
2023-09-15 8:10 ` [PATCH v4 13/42] dt-bindings: rtc: Add Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 10:43 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 10:43 UTC (permalink / raw)
To: nikita.shubin, Alessandro Zummo, Alexandre Belloni, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Hartley Sweeten,
Alexander Sverdlin
Cc: linux-rtc, devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:10, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add device tree bindings for the Cirrus Logic EP93xx RTC block
> used in these SoCs.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 14/42] rtc: ep93xx: add DT support for Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (12 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 13/42] dt-bindings: rtc: Add Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 8:10 ` [PATCH v4 15/42] dt-bindings: watchdog: Add Cirrus EP93x Nikita Shubin via B4 Relay
` (29 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Alessandro Zummo, Alexandre Belloni
Cc: linux-rtc, linux-kernel, Arnd Bergmann, Alexander Sverdlin,
Andy Shevchenko
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add OF ID match table.
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/rtc/rtc-ep93xx.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/rtc/rtc-ep93xx.c b/drivers/rtc/rtc-ep93xx.c
index acae7f16808f..1fdd20d01560 100644
--- a/drivers/rtc/rtc-ep93xx.c
+++ b/drivers/rtc/rtc-ep93xx.c
@@ -7,6 +7,7 @@
*/
#include <linux/module.h>
+#include <linux/mod_devicetable.h>
#include <linux/rtc.h>
#include <linux/platform_device.h>
#include <linux/io.h>
@@ -148,9 +149,16 @@ static int ep93xx_rtc_probe(struct platform_device *pdev)
return devm_rtc_register_device(ep93xx_rtc->rtc);
}
+static const struct of_device_id ep93xx_rtc_of_ids[] = {
+ { .compatible = "cirrus,ep9301-rtc" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ep93xx_rtc_of_ids);
+
static struct platform_driver ep93xx_rtc_driver = {
.driver = {
.name = "ep93xx-rtc",
+ .of_match_table = ep93xx_rtc_of_ids,
},
.probe = ep93xx_rtc_probe,
};
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 15/42] dt-bindings: watchdog: Add Cirrus EP93x
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (13 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 14/42] rtc: ep93xx: add DT support for " Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 10:43 ` Krzysztof Kozlowski
2023-09-15 8:10 ` [PATCH v4 16/42] watchdog: ep93xx: add DT support for Cirrus EP93xx Nikita Shubin via B4 Relay
` (28 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Wim Van Sebroeck, Guenter Roeck, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Nikita Shubin,
Alexander Sverdlin
Cc: linux-watchdog, devicetree, linux-kernel, Arnd Bergmann,
Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add device tree bindings for the Cirrus Logic EP93xx watchdog block
used in these SoCs.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../bindings/watchdog/cirrus,ep9301-wdt.yaml | 42 ++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/cirrus,ep9301-wdt.yaml b/Documentation/devicetree/bindings/watchdog/cirrus,ep9301-wdt.yaml
new file mode 100644
index 000000000000..5dbe891c70c6
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/cirrus,ep9301-wdt.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/cirrus,ep9301-wdt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic EP93xx Watchdog Timer
+
+maintainers:
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+
+allOf:
+ - $ref: watchdog.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-wdt
+ - items:
+ - enum:
+ - cirrus,ep9302-wdt
+ - cirrus,ep9307-wdt
+ - cirrus,ep9312-wdt
+ - cirrus,ep9315-wdt
+ - const: cirrus,ep9301-wdt
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ watchdog@80940000 {
+ compatible = "cirrus,ep9301-wdt";
+ reg = <0x80940000 0x08>;
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 15/42] dt-bindings: watchdog: Add Cirrus EP93x
2023-09-15 8:10 ` [PATCH v4 15/42] dt-bindings: watchdog: Add Cirrus EP93x Nikita Shubin via B4 Relay
@ 2023-09-15 10:43 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 10:43 UTC (permalink / raw)
To: nikita.shubin, Wim Van Sebroeck, Guenter Roeck, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Alexander Sverdlin
Cc: linux-watchdog, devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:10, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add device tree bindings for the Cirrus Logic EP93xx watchdog block
> used in these SoCs.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 16/42] watchdog: ep93xx: add DT support for Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (14 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 15/42] dt-bindings: watchdog: Add Cirrus EP93x Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 8:10 ` [PATCH v4 17/42] dt-bindings: pwm: Add " Nikita Shubin via B4 Relay
` (27 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Wim Van Sebroeck, Guenter Roeck
Cc: linux-watchdog, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add OF ID match table.
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/watchdog/ep93xx_wdt.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/watchdog/ep93xx_wdt.c b/drivers/watchdog/ep93xx_wdt.c
index 59dfd7f6bf0b..af89b7bb8f66 100644
--- a/drivers/watchdog/ep93xx_wdt.c
+++ b/drivers/watchdog/ep93xx_wdt.c
@@ -19,6 +19,7 @@
*/
#include <linux/platform_device.h>
+#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/watchdog.h>
#include <linux/io.h>
@@ -127,9 +128,16 @@ static int ep93xx_wdt_probe(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id ep93xx_wdt_of_ids[] = {
+ { .compatible = "cirrus,ep9301-wdt" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ep93xx_wdt_of_ids);
+
static struct platform_driver ep93xx_wdt_driver = {
.driver = {
.name = "ep93xx-wdt",
+ .of_match_table = ep93xx_wdt_of_ids,
},
.probe = ep93xx_wdt_probe,
};
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 17/42] dt-bindings: pwm: Add Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (15 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 16/42] watchdog: ep93xx: add DT support for Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:10 ` Nikita Shubin via B4 Relay
2023-09-15 10:45 ` Krzysztof Kozlowski
2023-09-15 8:11 ` [PATCH v4 18/42] pwm: ep93xx: add DT support for " Nikita Shubin via B4 Relay
` (26 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:10 UTC (permalink / raw)
To: Thierry Reding, Uwe Kleine-König, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Alexander Sverdlin,
Nikita Shubin
Cc: linux-pwm, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add YAML bindings for ep93xx SoC PWM.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
.../devicetree/bindings/pwm/cirrus,ep9301-pwm.yaml | 46 ++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/Documentation/devicetree/bindings/pwm/cirrus,ep9301-pwm.yaml b/Documentation/devicetree/bindings/pwm/cirrus,ep9301-pwm.yaml
new file mode 100644
index 000000000000..198b9a40f756
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/cirrus,ep9301-pwm.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/cirrus,ep9301-pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logick ep93xx PWM controller
+
+maintainers:
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-pwm
+ - items:
+ - enum:
+ - cirrus,ep9302-pwm
+ - cirrus,ep9307-pwm
+ - cirrus,ep9312-pwm
+ - cirrus,ep9315-pwm
+ - const: cirrus,ep9301-pwm
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: SoC PWM clock
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/cirrus,ep9301-clk.h>
+ pwm@80910000 {
+ compatible = "cirrus,ep9301-pwm";
+ reg = <0x80910000 0x10>;
+ clocks = <&syscon EP93XX_CLK_PWM>;
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 17/42] dt-bindings: pwm: Add Cirrus EP93xx
2023-09-15 8:10 ` [PATCH v4 17/42] dt-bindings: pwm: Add " Nikita Shubin via B4 Relay
@ 2023-09-15 10:45 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 10:45 UTC (permalink / raw)
To: nikita.shubin, Thierry Reding, Uwe Kleine-König,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Alexander Sverdlin
Cc: linux-pwm, devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:10, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add YAML bindings for ep93xx SoC PWM.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
> .../devicetree/bindings/pwm/cirrus,ep9301-pwm.yaml | 46 ++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pwm/cirrus,ep9301-pwm.yaml b/Documentation/devicetree/bindings/pwm/cirrus,ep9301-pwm.yaml
> new file mode 100644
> index 000000000000..198b9a40f756
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/cirrus,ep9301-pwm.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pwm/cirrus,ep9301-pwm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cirrus Logick ep93xx PWM controller
> +
> +maintainers:
> + - Alexander Sverdlin <alexander.sverdlin@gmail.com>
> + - Nikita Shubin <nikita.shubin@maquefel.me>
> +
$ref to pwm.yaml
> +properties:
> + compatible:
> + oneOf:
> + - const: cirrus,ep9301-pwm
> + - items:
> + - enum:
> + - cirrus,ep9302-pwm
> + - cirrus,ep9307-pwm
> + - cirrus,ep9312-pwm
> + - cirrus,ep9315-pwm
> + - const: cirrus,ep9301-pwm
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: SoC PWM clock
No pwm-cells?
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> +
> +additionalProperties: false
and then unevaluatedProperties: false instead
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 18/42] pwm: ep93xx: add DT support for Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (16 preceding siblings ...)
2023-09-15 8:10 ` [PATCH v4 17/42] dt-bindings: pwm: Add " Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 10:43 ` Uwe Kleine-König
2023-09-15 8:11 ` [PATCH v4 19/42] dt-bindings: spi: Add " Nikita Shubin via B4 Relay
` (25 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Thierry Reding, Uwe Kleine-König
Cc: linux-pwm, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add OF ID match table.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/pwm/pwm-ep93xx.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/pwm/pwm-ep93xx.c b/drivers/pwm/pwm-ep93xx.c
index c45a75e65c86..361984ef4c0b 100644
--- a/drivers/pwm/pwm-ep93xx.c
+++ b/drivers/pwm/pwm-ep93xx.c
@@ -17,6 +17,7 @@
*/
#include <linux/module.h>
+#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/clk.h>
@@ -190,9 +191,16 @@ static int ep93xx_pwm_probe(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id ep93xx_pwm_of_ids[] = {
+ { .compatible = "cirrus,ep9301-pwm" },
+ { /* sentinel */}
+};
+MODULE_DEVICE_TABLE(of, ep93xx_pwm_of_ids);
+
static struct platform_driver ep93xx_pwm_driver = {
.driver = {
.name = "ep93xx-pwm",
+ .of_match_table = ep93xx_pwm_of_ids,
},
.probe = ep93xx_pwm_probe,
};
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 18/42] pwm: ep93xx: add DT support for Cirrus EP93xx
2023-09-15 8:11 ` [PATCH v4 18/42] pwm: ep93xx: add DT support for " Nikita Shubin via B4 Relay
@ 2023-09-15 10:43 ` Uwe Kleine-König
0 siblings, 0 replies; 78+ messages in thread
From: Uwe Kleine-König @ 2023-09-15 10:43 UTC (permalink / raw)
To: nikita.shubin
Cc: Thierry Reding, linux-pwm, linux-kernel, Arnd Bergmann,
Alexander Sverdlin
[-- Attachment #1: Type: text/plain, Size: 462 bytes --]
On Fri, Sep 15, 2023 at 11:11:00AM +0300, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add OF ID match table.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Thanks
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | https://www.pengutronix.de/ |
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 19/42] dt-bindings: spi: Add Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (17 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 18/42] pwm: ep93xx: add DT support for " Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 10:47 ` Krzysztof Kozlowski
2023-09-15 8:11 ` [PATCH v4 20/42] spi: ep93xx: add DT support for " Nikita Shubin via B4 Relay
` (24 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Mark Brown, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Alexander Sverdlin, Nikita Shubin
Cc: linux-spi, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add YAML bindings for ep93xx SoC SPI.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../devicetree/bindings/spi/cirrus,ep9301-spi.yaml | 61 ++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/cirrus,ep9301-spi.yaml b/Documentation/devicetree/bindings/spi/cirrus,ep9301-spi.yaml
new file mode 100644
index 000000000000..945108abfc94
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/cirrus,ep9301-spi.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/cirrus,ep9301-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: EP93xx SoC SPI controller
+
+maintainers:
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-spi
+ - items:
+ - enum:
+ - cirrus,ep9302-spi
+ - cirrus,ep9307-spi
+ - cirrus,ep9312-spi
+ - cirrus,ep9315-spi
+ - const: cirrus,ep9301-spi
+
+ reg:
+ items:
+ - description: SPI registers region
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: SPI Controller reference clock source
+
+ dmas:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/clock/cirrus,ep9301-clk.h>
+ spi@808a0000 {
+ compatible = "cirrus,ep9301-spi";
+ reg = <0x808a0000 0x18>;
+ interrupt-parent = <&vic1>;
+ interrupts = <21>;
+ clocks = <&syscon EP93XX_CLK_SPI>;
+ cs-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 19/42] dt-bindings: spi: Add Cirrus EP93xx
2023-09-15 8:11 ` [PATCH v4 19/42] dt-bindings: spi: Add " Nikita Shubin via B4 Relay
@ 2023-09-15 10:47 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 10:47 UTC (permalink / raw)
To: nikita.shubin, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Alexander Sverdlin
Cc: linux-spi, devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:11, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add YAML bindings for ep93xx SoC SPI.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 20/42] spi: ep93xx: add DT support for Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (18 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 19/42] dt-bindings: spi: Add " Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 12:38 ` Mark Brown
2023-09-15 8:11 ` [PATCH v4 21/42] dt-bindings: net: Add " Nikita Shubin via B4 Relay
` (23 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Mark Brown; +Cc: linux-spi, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
- add OF ID match table
Instead of platform use_dma flag - check if DT dmas property is present to
decide to use dma ot not.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/spi/spi-ep93xx.c | 28 +++++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-ep93xx.c b/drivers/spi/spi-ep93xx.c
index 1615fd22f9a2..f93cd506bf17 100644
--- a/drivers/spi/spi-ep93xx.c
+++ b/drivers/spi/spi-ep93xx.c
@@ -22,6 +22,7 @@
#include <linux/bitops.h>
#include <linux/interrupt.h>
#include <linux/module.h>
+#include <linux/property.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
#include <linux/scatterlist.h>
@@ -644,6 +645,23 @@ static void ep93xx_spi_release_dma(struct ep93xx_spi *espi)
free_page((unsigned long)espi->zeropage);
}
+#ifdef CONFIG_OF
+static struct ep93xx_spi_info dt_spi_info;
+
+static struct ep93xx_spi_info *ep93xx_spi_get_platdata(struct platform_device *pdev)
+{
+ if (device_property_present(&pdev->dev, "dmas"))
+ dt_spi_info.use_dma = 1;
+
+ return &dt_spi_info;
+}
+#else
+static struct ep93xx_spi_info *ep93xx_spi_get_platdata(struct platform_device *pdev)
+{
+ return dev_get_platdata(&pdev->dev);
+}
+#endif
+
static int ep93xx_spi_probe(struct platform_device *pdev)
{
struct spi_master *master;
@@ -653,7 +671,7 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
int irq;
int error;
- info = dev_get_platdata(&pdev->dev);
+ info = ep93xx_spi_get_platdata(pdev);
if (!info) {
dev_err(&pdev->dev, "missing platform data\n");
return -EINVAL;
@@ -726,6 +744,7 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
/* make sure that the hardware is disabled */
writel(0, espi->mmio + SSPCR1);
+ device_set_node(&master->dev, dev_fwnode(&pdev->dev));
error = devm_spi_register_master(&pdev->dev, master);
if (error) {
dev_err(&pdev->dev, "failed to register SPI master\n");
@@ -753,9 +772,16 @@ static void ep93xx_spi_remove(struct platform_device *pdev)
ep93xx_spi_release_dma(espi);
}
+static const struct of_device_id ep93xx_spi_of_ids[] = {
+ { .compatible = "cirrus,ep9301-spi" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ep93xx_spi_of_ids);
+
static struct platform_driver ep93xx_spi_driver = {
.driver = {
.name = "ep93xx-spi",
+ .of_match_table = ep93xx_spi_of_ids,
},
.probe = ep93xx_spi_probe,
.remove_new = ep93xx_spi_remove,
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 21/42] dt-bindings: net: Add Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (19 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 20/42] spi: ep93xx: add DT support for " Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 10:49 ` Krzysztof Kozlowski
2023-09-15 8:11 ` [PATCH v4 22/42] net: cirrus: add DT support for " Nikita Shubin via B4 Relay
` (22 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Alexander Sverdlin, Nikita Shubin
Cc: netdev, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add YAML bindings for ep93xx SoC Ethernet Controller.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../devicetree/bindings/net/cirrus,ep9301-eth.yaml | 59 ++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/cirrus,ep9301-eth.yaml b/Documentation/devicetree/bindings/net/cirrus,ep9301-eth.yaml
new file mode 100644
index 000000000000..ad0915307095
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/cirrus,ep9301-eth.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/cirrus,ep9301-eth.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: EP93xx SoC Ethernet Controller
+
+maintainers:
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+allOf:
+ - $ref: ethernet-controller.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-eth
+ - items:
+ - enum:
+ - cirrus,ep9302-eth
+ - cirrus,ep9307-eth
+ - cirrus,ep9312-eth
+ - cirrus,ep9315-eth
+ - const: cirrus,ep9301-eth
+
+ reg:
+ items:
+ - description: The physical base address and size of IO range
+
+ interrupts:
+ items:
+ - description: Combined signal for various interrupt events
+
+ phy-handle: true
+
+ mdio:
+ $ref: mdio.yaml#
+ unevaluatedProperties: false
+ description: optional node for embedded MDIO controller
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - phy-handle
+
+additionalProperties: false
+
+examples:
+ - |
+ ethernet@80010000 {
+ compatible = "cirrus,ep9301-eth";
+ reg = <0x80010000 0x10000>;
+ interrupt-parent = <&vic1>;
+ interrupts = <7>;
+ phy-handle = <&phy0>;
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 21/42] dt-bindings: net: Add Cirrus EP93xx
2023-09-15 8:11 ` [PATCH v4 21/42] dt-bindings: net: Add " Nikita Shubin via B4 Relay
@ 2023-09-15 10:49 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 10:49 UTC (permalink / raw)
To: nikita.shubin, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Alexander Sverdlin
Cc: netdev, devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:11, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> + mdio:
> + $ref: mdio.yaml#
> + unevaluatedProperties: false
> + description: optional node for embedded MDIO controller
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - phy-handle
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + ethernet@80010000 {
> + compatible = "cirrus,ep9301-eth";
> + reg = <0x80010000 0x10000>;
> + interrupt-parent = <&vic1>;
> + interrupts = <7>;
> + phy-handle = <&phy0>;
Would be nice to extend the example with mdio, to be complete as much as
possible. Anyway:
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 22/42] net: cirrus: add DT support for Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (20 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 21/42] dt-bindings: net: Add " Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:11 ` [PATCH v4 23/42] dt-bindings: dma: Add " Nikita Shubin via B4 Relay
` (21 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Hartley Sweeten, David S. Miller, Eric Dumazet, Jakub Kicinski,
Paolo Abeni
Cc: netdev, linux-kernel, Arnd Bergmann, Alexander Sverdlin, Andrew Lunn
From: Nikita Shubin <nikita.shubin@maquefel.me>
- add OF ID match table
- get phy_id from the device tree, as part of mdio
- copy_addr is now always used, as there is no SoC/board that aren't
- dropped platform header
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/net/ethernet/cirrus/ep93xx_eth.c | 63 ++++++++++++++++----------------
1 file changed, 32 insertions(+), 31 deletions(-)
diff --git a/drivers/net/ethernet/cirrus/ep93xx_eth.c b/drivers/net/ethernet/cirrus/ep93xx_eth.c
index 8627ab19d470..3106dd97fe74 100644
--- a/drivers/net/ethernet/cirrus/ep93xx_eth.c
+++ b/drivers/net/ethernet/cirrus/ep93xx_eth.c
@@ -17,12 +17,11 @@
#include <linux/interrupt.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
+#include <linux/of.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/slab.h>
-#include <linux/platform_data/eth-ep93xx.h>
-
#define DRV_MODULE_NAME "ep93xx-eth"
#define RX_QUEUE_ENTRIES 64
@@ -738,25 +737,6 @@ static const struct net_device_ops ep93xx_netdev_ops = {
.ndo_set_mac_address = eth_mac_addr,
};
-static struct net_device *ep93xx_dev_alloc(struct ep93xx_eth_data *data)
-{
- struct net_device *dev;
-
- dev = alloc_etherdev(sizeof(struct ep93xx_priv));
- if (dev == NULL)
- return NULL;
-
- eth_hw_addr_set(dev, data->dev_addr);
-
- dev->ethtool_ops = &ep93xx_ethtool_ops;
- dev->netdev_ops = &ep93xx_netdev_ops;
-
- dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
-
- return dev;
-}
-
-
static int ep93xx_eth_remove(struct platform_device *pdev)
{
struct net_device *dev;
@@ -788,27 +768,47 @@ static int ep93xx_eth_remove(struct platform_device *pdev)
static int ep93xx_eth_probe(struct platform_device *pdev)
{
- struct ep93xx_eth_data *data;
struct net_device *dev;
struct ep93xx_priv *ep;
struct resource *mem;
+ void __iomem *base_addr;
+ struct device_node *np;
+ u32 phy_id;
int irq;
int err;
if (pdev == NULL)
return -ENODEV;
- data = dev_get_platdata(&pdev->dev);
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irq = platform_get_irq(pdev, 0);
if (!mem || irq < 0)
return -ENXIO;
- dev = ep93xx_dev_alloc(data);
+ base_addr = ioremap(mem->start, resource_size(mem));
+ if (!base_addr)
+ return dev_err_probe(&pdev->dev, -EIO, "Failed to ioremap ethernet registers\n");
+
+ np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
+ if (!np)
+ return dev_err_probe(&pdev->dev, -ENODEV, "Please provide \"phy-handle\"\n");
+
+ err = of_property_read_u32(np, "reg", &phy_id);
+ of_node_put(np);
+ if (err)
+ return dev_err_probe(&pdev->dev, -ENOENT, "Failed to locate \"phy_id\"\n");
+
+ dev = alloc_etherdev(sizeof(struct ep93xx_priv));
if (dev == NULL) {
err = -ENOMEM;
goto err_out;
}
+
+ eth_hw_addr_set(dev, base_addr + 0x50);
+ dev->ethtool_ops = &ep93xx_ethtool_ops;
+ dev->netdev_ops = &ep93xx_netdev_ops;
+ dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
+
ep = netdev_priv(dev);
ep->dev = dev;
SET_NETDEV_DEV(dev, &pdev->dev);
@@ -824,15 +824,10 @@ static int ep93xx_eth_probe(struct platform_device *pdev)
goto err_out;
}
- ep->base_addr = ioremap(mem->start, resource_size(mem));
- if (ep->base_addr == NULL) {
- dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
- err = -EIO;
- goto err_out;
- }
+ ep->base_addr = base_addr;
ep->irq = irq;
- ep->mii.phy_id = data->phy_id;
+ ep->mii.phy_id = phy_id;
ep->mii.phy_id_mask = 0x1f;
ep->mii.reg_num_mask = 0x1f;
ep->mii.dev = dev;
@@ -859,12 +854,18 @@ static int ep93xx_eth_probe(struct platform_device *pdev)
return err;
}
+static const struct of_device_id ep93xx_eth_of_ids[] = {
+ { .compatible = "cirrus,ep9301-eth" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ep93xx_eth_of_ids);
static struct platform_driver ep93xx_eth_driver = {
.probe = ep93xx_eth_probe,
.remove = ep93xx_eth_remove,
.driver = {
.name = "ep93xx-eth",
+ .of_match_table = ep93xx_eth_of_ids,
},
};
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 23/42] dt-bindings: dma: Add Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (21 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 22/42] net: cirrus: add DT support for " Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 10:58 ` Krzysztof Kozlowski
2023-09-15 8:11 ` [PATCH v4 24/42] dma: cirrus: add DT support for " Nikita Shubin via B4 Relay
` (20 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Vinod Koul, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Nikita Shubin, Alexander Sverdlin
Cc: dmaengine, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add YAML bindings for ep93xx SoC DMA.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../bindings/dma/cirrus,ep9301-dma-m2m.yaml | 69 ++++++++++++
.../bindings/dma/cirrus,ep9301-dma-m2p.yaml | 121 +++++++++++++++++++++
include/dt-bindings/dma/cirrus,ep93xx-dma.h | 26 +++++
include/linux/platform_data/dma-ep93xx.h | 21 +---
4 files changed, 217 insertions(+), 20 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2m.yaml b/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2m.yaml
new file mode 100644
index 000000000000..80a4352bf8aa
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2m.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/cirrus,ep9301-dma-m2m.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logick ep93xx SoC DMA controller
+
+maintainers:
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-dma-m2m
+ - items:
+ - enum:
+ - cirrus,ep9302-dma-m2m
+ - cirrus,ep9307-dma-m2m
+ - cirrus,ep9312-dma-m2m
+ - cirrus,ep9315-dma-m2m
+ - const: cirrus,ep9301-dma-m2m
+
+ reg:
+ items:
+ - description: m2m0 channel registers
+ - description: m2m1 channel registers
+
+ clocks:
+ items:
+ - description: m2m0 channel gate clock
+ - description: m2m1 channel gate clock
+
+ clock-names:
+ items:
+ - const: m2m0
+ - const: m2m1
+
+ interrupts:
+ items:
+ - description: m2m0 channel interrupt
+ - description: m2m1 channel interrupt
+
+ '#dma-cells': true
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/cirrus,ep9301-clk.h>
+ dma-controller@80000100 {
+ compatible = "cirrus,ep9301-dma-m2m";
+ reg = <0x80000100 0x0040>,
+ <0x80000140 0x0040>;
+ clocks = <&eclk EP93XX_CLK_M2M0>,
+ <&eclk EP93XX_CLK_M2M1>;
+ clock-names = "m2m0", "m2m1";
+ interrupt-parent = <&vic0>;
+ interrupts = <17>, <18>;
+ #dma-cells = <1>;
+ };
diff --git a/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2p.yaml b/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2p.yaml
new file mode 100644
index 000000000000..0236cc37233e
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2p.yaml
@@ -0,0 +1,121 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/cirrus,ep9301-dma-m2p.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logick ep93xx SoC M2P DMA controller
+
+maintainers:
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9301-dma-m2p
+ - items:
+ - enum:
+ - cirrus,ep9302-dma-m2p
+ - cirrus,ep9307-dma-m2p
+ - cirrus,ep9312-dma-m2p
+ - cirrus,ep9315-dma-m2p
+ - const: cirrus,ep9301-dma-m2p
+
+ reg:
+ items:
+ - description: m2p0 channel registers
+ - description: m2p1 channel registers
+ - description: m2p2 channel registers
+ - description: m2p3 channel registers
+ - description: m2p4 channel registers
+ - description: m2p5 channel registers
+ - description: m2p6 channel registers
+ - description: m2p7 channel registers
+ - description: m2p8 channel registers
+ - description: m2p9 channel registers
+
+ clocks:
+ items:
+ - description: m2p0 channel gate clock
+ - description: m2p1 channel gate clock
+ - description: m2p2 channel gate clock
+ - description: m2p3 channel gate clock
+ - description: m2p4 channel gate clock
+ - description: m2p5 channel gate clock
+ - description: m2p6 channel gate clock
+ - description: m2p7 channel gate clock
+ - description: m2p8 channel gate clock
+ - description: m2p9 channel gate clock
+
+ clock-names:
+ items:
+ - const: m2p0
+ - const: m2p1
+ - const: m2p2
+ - const: m2p3
+ - const: m2p4
+ - const: m2p5
+ - const: m2p6
+ - const: m2p7
+ - const: m2p8
+ - const: m2p9
+
+ interrupts:
+ items:
+ - description: m2p0 channel interrupt
+ - description: m2p1 channel interrupt
+ - description: m2p2 channel interrupt
+ - description: m2p3 channel interrupt
+ - description: m2p4 channel interrupt
+ - description: m2p5 channel interrupt
+ - description: m2p6 channel interrupt
+ - description: m2p7 channel interrupt
+ - description: m2p8 channel interrupt
+ - description: m2p9 channel interrupt
+
+ '#dma-cells': true
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/cirrus,ep9301-clk.h>
+ dma-controller@80000000 {
+ compatible = "cirrus,ep9301-dma-m2p";
+ reg = <0x80000000 0x0040>,
+ <0x80000040 0x0040>,
+ <0x80000080 0x0040>,
+ <0x800000c0 0x0040>,
+ <0x80000240 0x0040>,
+ <0x80000200 0x0040>,
+ <0x800002c0 0x0040>,
+ <0x80000280 0x0040>,
+ <0x80000340 0x0040>,
+ <0x80000300 0x0040>;
+ clocks = <&eclk EP93XX_CLK_M2P0>,
+ <&eclk EP93XX_CLK_M2P1>,
+ <&eclk EP93XX_CLK_M2P2>,
+ <&eclk EP93XX_CLK_M2P3>,
+ <&eclk EP93XX_CLK_M2P4>,
+ <&eclk EP93XX_CLK_M2P5>,
+ <&eclk EP93XX_CLK_M2P6>,
+ <&eclk EP93XX_CLK_M2P7>,
+ <&eclk EP93XX_CLK_M2P8>,
+ <&eclk EP93XX_CLK_M2P9>;
+ clock-names = "m2p0", "m2p1",
+ "m2p2", "m2p3",
+ "m2p4", "m2p5",
+ "m2p6", "m2p7",
+ "m2p8", "m2p9";
+ interrupt-parent = <&vic0>;
+ interrupts = <7>, <8>, <9>, <10>, <11>, <12>, <13>, <14>, <15>, <16>;
+ #dma-cells = <1>;
+ };
diff --git a/include/dt-bindings/dma/cirrus,ep93xx-dma.h b/include/dt-bindings/dma/cirrus,ep93xx-dma.h
new file mode 100644
index 000000000000..21c7324eb27e
--- /dev/null
+++ b/include/dt-bindings/dma/cirrus,ep93xx-dma.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+#ifndef DT_BINDINGS_CIRRUS_EP93XX_DMA_H
+#define DT_BINDINGS_CIRRUS_EP93XX_DMA_H
+
+/*
+ * M2P channels.
+ *
+ * Note that these values are also directly used for setting the PPALLOC
+ * register.
+ */
+#define EP93XX_DMA_I2S1 0
+#define EP93XX_DMA_I2S2 1
+#define EP93XX_DMA_AAC1 2
+#define EP93XX_DMA_AAC2 3
+#define EP93XX_DMA_AAC3 4
+#define EP93XX_DMA_I2S3 5
+#define EP93XX_DMA_UART1 6
+#define EP93XX_DMA_UART2 7
+#define EP93XX_DMA_UART3 8
+#define EP93XX_DMA_IRDA 9
+/* M2M channels */
+#define EP93XX_DMA_SSP 10
+#define EP93XX_DMA_IDE 11
+
+#endif /* DT_BINDINGS_CIRRUS_EP93XX_DMA_H */
+
diff --git a/include/linux/platform_data/dma-ep93xx.h b/include/linux/platform_data/dma-ep93xx.h
index eb9805bb3fe8..54b41d1468ef 100644
--- a/include/linux/platform_data/dma-ep93xx.h
+++ b/include/linux/platform_data/dma-ep93xx.h
@@ -5,26 +5,7 @@
#include <linux/types.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
-
-/*
- * M2P channels.
- *
- * Note that these values are also directly used for setting the PPALLOC
- * register.
- */
-#define EP93XX_DMA_I2S1 0
-#define EP93XX_DMA_I2S2 1
-#define EP93XX_DMA_AAC1 2
-#define EP93XX_DMA_AAC2 3
-#define EP93XX_DMA_AAC3 4
-#define EP93XX_DMA_I2S3 5
-#define EP93XX_DMA_UART1 6
-#define EP93XX_DMA_UART2 7
-#define EP93XX_DMA_UART3 8
-#define EP93XX_DMA_IRDA 9
-/* M2M channels */
-#define EP93XX_DMA_SSP 10
-#define EP93XX_DMA_IDE 11
+#include <dt-bindings/dma/cirrus,ep93xx-dma.h>
/**
* struct ep93xx_dma_data - configuration data for the EP93xx dmaengine
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 23/42] dt-bindings: dma: Add Cirrus EP93xx
2023-09-15 8:11 ` [PATCH v4 23/42] dt-bindings: dma: Add " Nikita Shubin via B4 Relay
@ 2023-09-15 10:58 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 10:58 UTC (permalink / raw)
To: nikita.shubin, Vinod Koul, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Alexander Sverdlin
Cc: dmaengine, devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:11, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add YAML bindings for ep93xx SoC DMA.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
> .../bindings/dma/cirrus,ep9301-dma-m2m.yaml | 69 ++++++++++++
> .../bindings/dma/cirrus,ep9301-dma-m2p.yaml | 121 +++++++++++++++++++++
> include/dt-bindings/dma/cirrus,ep93xx-dma.h | 26 +++++
> include/linux/platform_data/dma-ep93xx.h | 21 +---
> 4 files changed, 217 insertions(+), 20 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2m.yaml b/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2m.yaml
> new file mode 100644
> index 000000000000..80a4352bf8aa
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2m.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/cirrus,ep9301-dma-m2m.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cirrus Logick ep93xx SoC DMA controller
> +
> +maintainers:
> + - Alexander Sverdlin <alexander.sverdlin@gmail.com>
> + - Nikita Shubin <nikita.shubin@maquefel.me>
> +
Missing $ref to dma-controller.yaml
> +properties:
> + compatible:
> + oneOf:
> + - const: cirrus,ep9301-dma-m2m
> + - items:
> + - enum:
> + - cirrus,ep9302-dma-m2m
> + - cirrus,ep9307-dma-m2m
> + - cirrus,ep9312-dma-m2m
> + - cirrus,ep9315-dma-m2m
> + - const: cirrus,ep9301-dma-m2m
> +
> + reg:
> + items:
> + - description: m2m0 channel registers
> + - description: m2m1 channel registers
> +
> + clocks:
> + items:
> + - description: m2m0 channel gate clock
> + - description: m2m1 channel gate clock
> +
> + clock-names:
> + items:
> + - const: m2m0
> + - const: m2m1
> +
> + interrupts:
> + items:
> + - description: m2m0 channel interrupt
> + - description: m2m1 channel interrupt
> +
> + '#dma-cells': true
Rather:
const: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/cirrus,ep9301-clk.h>
> + dma-controller@80000100 {
> + compatible = "cirrus,ep9301-dma-m2m";
> + reg = <0x80000100 0x0040>,
> + <0x80000140 0x0040>;
> + clocks = <&eclk EP93XX_CLK_M2M0>,
> + <&eclk EP93XX_CLK_M2M1>;
> + clock-names = "m2m0", "m2m1";
> + interrupt-parent = <&vic0>;
> + interrupts = <17>, <18>;
> + #dma-cells = <1>;
> + };
> diff --git a/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2p.yaml b/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2p.yaml
> new file mode 100644
> index 000000000000..0236cc37233e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/cirrus,ep9301-dma-m2p.yaml
> @@ -0,0 +1,121 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/cirrus,ep9301-dma-m2p.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cirrus Logick ep93xx SoC M2P DMA controller
> +
> +maintainers:
> + - Alexander Sverdlin <alexander.sverdlin@gmail.com>
> + - Nikita Shubin <nikita.shubin@maquefel.me>
> +
Same comments in this file
> +properties:
> + compatible:
> + oneOf:
> + - const: cirrus,ep9301-dma-m2p
> + - items:
> + - enum:
> + - cirrus,ep9302-dma-m2p
> + - cirrus,ep9307-dma-m2p
> + - cirrus,ep9312-dma-m2p
> + - cirrus,ep9315-dma-m2p
> + - const: cirrus,ep9301-dma-m2p
> +
> + reg:
> + items:
> + - description: m2p0 channel registers
> + - description: m2p1 channel registers
> + - description: m2p2 channel registers
> + - description: m2p3 channel registers
> + - description: m2p4 channel registers
> + - description: m2p5 channel registers
> + - description: m2p6 channel registers
> + - description: m2p7 channel registers
> + - description: m2p8 channel registers
> + - description: m2p9 channel registers
> +
...
> diff --git a/include/dt-bindings/dma/cirrus,ep93xx-dma.h b/include/dt-bindings/dma/cirrus,ep93xx-dma.h
> new file mode 100644
> index 000000000000..21c7324eb27e
> --- /dev/null
> +++ b/include/dt-bindings/dma/cirrus,ep93xx-dma.h
Use same filename as bindings.
> @@ -0,0 +1,26 @@
> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> +#ifndef DT_BINDINGS_CIRRUS_EP93XX_DMA_H
> +#define DT_BINDINGS_CIRRUS_EP93XX_DMA_H
> +
> +/*
> + * M2P channels.
> + *
> + * Note that these values are also directly used for setting the PPALLOC
> + * register.
> + */
> +#define EP93XX_DMA_I2S1 0
Where is the user of these defines? IOW, who uses them? Only driver?
> +#define EP93XX_DMA_I2S2 1
> +#define EP93XX_DMA_AAC1 2
> +#define EP93XX_DMA_AAC2 3
> +#define EP93XX_DMA_AAC3 4
> +#define EP93XX_DMA_I2S3 5
> +#define EP93XX_DMA_UART1 6
> +#define EP93XX_DMA_UART2 7
> +#define EP93XX_DMA_UART3 8
> +#define EP93XX_DMA_IRDA 9
> +/* M2M channels */
> +#define EP93XX_DMA_SSP 10
> +#define EP93XX_DMA_IDE 11
> +
> +#endif /* DT_BINDINGS_CIRRUS_EP93XX_DMA_H */
> +
> diff --git a/include/linux/platform_data/dma-ep93xx.h b/include/linux/platform_data/dma-ep93xx.h> index eb9805bb3fe8..54b41d1468ef 100644
> --- a/include/linux/platform_data/dma-ep93xx.h
> +++ b/include/linux/platform_data/dma-ep93xx.h
> @@ -5,26 +5,7 @@
> #include <linux/types.h>
> #include <linux/dmaengine.h>
> #include <linux/dma-mapping.h>
> -
> -/*
> - * M2P channels.
> - *
> - * Note that these values are also directly used for setting the PPALLOC
> - * register.
> - */
> -#define EP93XX_DMA_I2S1 0
> -#define EP93XX_DMA_I2S2 1
> -#define EP93XX_DMA_AAC1 2
> -#define EP93XX_DMA_AAC2 3
> -#define EP93XX_DMA_AAC3 4
> -#define EP93XX_DMA_I2S3 5
> -#define EP93XX_DMA_UART1 6
> -#define EP93XX_DMA_UART2 7
> -#define EP93XX_DMA_UART3 8
> -#define EP93XX_DMA_IRDA 9
> -/* M2M channels */
> -#define EP93XX_DMA_SSP 10
> -#define EP93XX_DMA_IDE 11
> +#include <dt-bindings/dma/cirrus,ep93xx-dma.h>
Your headers should not include bindings.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 24/42] dma: cirrus: add DT support for Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (22 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 23/42] dt-bindings: dma: Add " Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:11 ` [PATCH v4 25/42] dt-bindings: mtd: Add ts7200 nand-controller Nikita Shubin via B4 Relay
` (19 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Vinod Koul, Nikita Shubin, Alexander Sverdlin
Cc: dmaengine, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
- drop subsys_initcall code
- add OF ID match table with data
- add of_probe for device tree
Co-developed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/dma/ep93xx_dma.c | 125 +++++++++++++++++++++++++++----
include/linux/platform_data/dma-ep93xx.h | 4 +
2 files changed, 116 insertions(+), 13 deletions(-)
diff --git a/drivers/dma/ep93xx_dma.c b/drivers/dma/ep93xx_dma.c
index 5338a94f1a69..4ec928ffcd52 100644
--- a/drivers/dma/ep93xx_dma.c
+++ b/drivers/dma/ep93xx_dma.c
@@ -20,6 +20,7 @@
#include <linux/dmaengine.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
+#include <linux/overflow.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
@@ -104,6 +105,11 @@
#define DMA_MAX_CHAN_BYTES 0xffff
#define DMA_MAX_CHAN_DESCRIPTORS 32
+enum ep93xx_dma_type {
+ M2P_DMA,
+ M2M_DMA,
+};
+
struct ep93xx_dma_engine;
static int ep93xx_dma_slave_config_write(struct dma_chan *chan,
enum dma_transfer_direction dir,
@@ -216,6 +222,11 @@ struct ep93xx_dma_engine {
struct ep93xx_dma_chan channels[];
};
+struct ep93xx_edma_data {
+ u32 id;
+ size_t num_channels;
+};
+
static inline struct device *chan2dev(struct ep93xx_dma_chan *edmac)
{
return &edmac->chan.dev->device;
@@ -1315,22 +1326,78 @@ static void ep93xx_dma_issue_pending(struct dma_chan *chan)
ep93xx_dma_advance_work(to_ep93xx_dma_chan(chan));
}
-static int __init ep93xx_dma_probe(struct platform_device *pdev)
+static struct ep93xx_dma_engine *ep93xx_dma_of_probe(struct platform_device *pdev)
{
- struct ep93xx_dma_platform_data *pdata = dev_get_platdata(&pdev->dev);
+ struct device_node *np = pdev->dev.of_node;
+ const struct ep93xx_edma_data *data;
struct ep93xx_dma_engine *edma;
struct dma_device *dma_dev;
- size_t edma_size;
- int ret, i;
+ int i;
+
+ data = device_get_match_data(&pdev->dev);
+ if (!data)
+ return ERR_PTR(dev_err_probe(&pdev->dev, -ENODEV, "No device match found\n"));
- edma_size = pdata->num_channels * sizeof(struct ep93xx_dma_chan);
- edma = kzalloc(sizeof(*edma) + edma_size, GFP_KERNEL);
+ edma = devm_kzalloc(&pdev->dev,
+ struct_size(edma, channels, data->num_channels),
+ GFP_KERNEL);
if (!edma)
- return -ENOMEM;
+ return ERR_PTR(-ENOMEM);
+ edma->m2m = data->id;
+ edma->num_channels = data->num_channels;
dma_dev = &edma->dma_dev;
+
+ INIT_LIST_HEAD(&dma_dev->channels);
+ for (i = 0; i < edma->num_channels; i++) {
+ struct ep93xx_dma_chan *edmac = &edma->channels[i];
+
+ edmac->chan.device = dma_dev;
+ edmac->regs = devm_platform_ioremap_resource(pdev, i);
+ if (IS_ERR(edmac->regs))
+ return edmac->regs;
+
+ edmac->irq = fwnode_irq_get(dev_fwnode(&pdev->dev), i);
+ if (edmac->irq < 0)
+ return ERR_PTR(edmac->irq);
+
+ edmac->edma = edma;
+
+ edmac->clk = of_clk_get(np, i);
+ if (IS_ERR(edmac->clk)) {
+ dev_warn(&pdev->dev, "failed to get clock\n");
+ continue;
+ }
+
+ spin_lock_init(&edmac->lock);
+ INIT_LIST_HEAD(&edmac->active);
+ INIT_LIST_HEAD(&edmac->queue);
+ INIT_LIST_HEAD(&edmac->free_list);
+ tasklet_setup(&edmac->tasklet, ep93xx_dma_tasklet);
+
+ list_add_tail(&edmac->chan.device_node,
+ &dma_dev->channels);
+ }
+
+ return edma;
+}
+
+static struct ep93xx_dma_engine *ep93xx_init_from_pdata(struct platform_device *pdev)
+{
+ struct ep93xx_dma_platform_data *pdata = dev_get_platdata(&pdev->dev);
+ struct ep93xx_dma_engine *edma;
+ struct dma_device *dma_dev;
+ int i;
+
+ edma = devm_kzalloc(&pdev->dev,
+ struct_size(edma, channels, pdata->num_channels),
+ GFP_KERNEL);
+ if (!edma)
+ return ERR_PTR(-ENOMEM);
+
edma->m2m = platform_get_device_id(pdev)->driver_data;
edma->num_channels = pdata->num_channels;
+ dma_dev = &edma->dma_dev;
INIT_LIST_HEAD(&dma_dev->channels);
for (i = 0; i < pdata->num_channels; i++) {
@@ -1359,6 +1426,24 @@ static int __init ep93xx_dma_probe(struct platform_device *pdev)
&dma_dev->channels);
}
+ return edma;
+}
+
+static int ep93xx_dma_probe(struct platform_device *pdev)
+{
+ struct ep93xx_dma_engine *edma;
+ struct dma_device *dma_dev;
+ int ret, i;
+
+ if (platform_get_device_id(pdev))
+ edma = ep93xx_init_from_pdata(pdev);
+ else
+ edma = ep93xx_dma_of_probe(pdev);
+ if (!edma)
+ return PTR_ERR(edma);
+
+ dma_dev = &edma->dma_dev;
+
dma_cap_zero(dma_dev->cap_mask);
dma_cap_set(DMA_SLAVE, dma_dev->cap_mask);
dma_cap_set(DMA_CYCLIC, dma_dev->cap_mask);
@@ -1410,6 +1495,23 @@ static int __init ep93xx_dma_probe(struct platform_device *pdev)
return ret;
}
+static const struct ep93xx_edma_data edma_m2p = {
+ .id = M2P_DMA,
+ .num_channels = 10,
+};
+
+static const struct ep93xx_edma_data edma_m2m = {
+ .id = M2M_DMA,
+ .num_channels = 2,
+};
+
+static const struct of_device_id ep93xx_dma_of_ids[] = {
+ { .compatible = "cirrus,ep9301-dma-m2p", .data = &edma_m2p },
+ { .compatible = "cirrus,ep9301-dma-m2m", .data = &edma_m2m },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ep93xx_dma_of_ids);
+
static const struct platform_device_id ep93xx_dma_driver_ids[] = {
{ "ep93xx-dma-m2p", 0 },
{ "ep93xx-dma-m2m", 1 },
@@ -1419,15 +1521,12 @@ static const struct platform_device_id ep93xx_dma_driver_ids[] = {
static struct platform_driver ep93xx_dma_driver = {
.driver = {
.name = "ep93xx-dma",
+ .of_match_table = ep93xx_dma_of_ids,
},
.id_table = ep93xx_dma_driver_ids,
+ .probe = ep93xx_dma_probe,
};
-static int __init ep93xx_dma_module_init(void)
-{
- return platform_driver_probe(&ep93xx_dma_driver, ep93xx_dma_probe);
-}
-subsys_initcall(ep93xx_dma_module_init);
-
+module_platform_driver(ep93xx_dma_driver);
MODULE_AUTHOR("Mika Westerberg <mika.westerberg@iki.fi>");
MODULE_DESCRIPTION("EP93xx DMA driver");
diff --git a/include/linux/platform_data/dma-ep93xx.h b/include/linux/platform_data/dma-ep93xx.h
index 54b41d1468ef..91af4a368338 100644
--- a/include/linux/platform_data/dma-ep93xx.h
+++ b/include/linux/platform_data/dma-ep93xx.h
@@ -5,6 +5,7 @@
#include <linux/types.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
+#include <linux/property.h>
#include <dt-bindings/dma/cirrus,ep93xx-dma.h>
/**
@@ -51,6 +52,9 @@ struct ep93xx_dma_platform_data {
static inline bool ep93xx_dma_chan_is_m2p(struct dma_chan *chan)
{
+ if (device_is_compatible(chan->device->dev, "cirrus,ep9301-dma-m2p"))
+ return true;
+
return !strcmp(dev_name(chan->device->dev), "ep93xx-dma-m2p");
}
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 25/42] dt-bindings: mtd: Add ts7200 nand-controller
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (23 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 24/42] dma: cirrus: add DT support for " Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 11:00 ` Krzysztof Kozlowski
2023-09-15 8:11 ` [PATCH v4 26/42] mtd: nand: add support for ts72xx Nikita Shubin via B4 Relay
` (18 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Nikita Shubin
Cc: linux-mtd, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add YAML bindings for ts7200 NAND Controller.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../devicetree/bindings/mtd/technologic,nand.yaml | 45 ++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/technologic,nand.yaml b/Documentation/devicetree/bindings/mtd/technologic,nand.yaml
new file mode 100644
index 000000000000..f9d87c46094b
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/technologic,nand.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/technologic,nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Technologic Systems NAND controller
+
+maintainers:
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+allOf:
+ - $ref: nand-controller.yaml
+
+properties:
+ compatible:
+ oneOf:
+ - const: technologic,ts7200-nand
+ - items:
+ - enum:
+ - technologic,ts7300-nand
+ - technologic,ts7260-nand
+ - technologic,ts7250-nand
+ - const: technologic,ts7200-nand
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ nand-controller@60000000 {
+ compatible = "technologic,ts7200-nand";
+ reg = <0x60000000 0x8000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ nand@0 {
+ reg = <0>;
+ };
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 25/42] dt-bindings: mtd: Add ts7200 nand-controller
2023-09-15 8:11 ` [PATCH v4 25/42] dt-bindings: mtd: Add ts7200 nand-controller Nikita Shubin via B4 Relay
@ 2023-09-15 11:00 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 11:00 UTC (permalink / raw)
To: nikita.shubin, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-mtd, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
On 15/09/2023 10:11, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add YAML bindings for ts7200 NAND Controller.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 26/42] mtd: nand: add support for ts72xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (24 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 25/42] dt-bindings: mtd: Add ts7200 nand-controller Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-18 12:58 ` Miquel Raynal
2023-09-15 8:11 ` [PATCH v4 27/42] dt-bindings: ata: Add Cirrus EP93xx Nikita Shubin via B4 Relay
` (17 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Miquel Raynal, Richard Weinberger, Vignesh Raghavendra,
Arnd Bergmann, Neil Armstrong, Nikita Shubin, Florian Fainelli,
Liang Yang, Christophe Kerello, Jean Delvare, Johan Jonker
Cc: linux-kernel, linux-mtd, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Technologic Systems has it's own nand controller implementation in CPLD.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/mtd/nand/raw/Kconfig | 7 +
drivers/mtd/nand/raw/Makefile | 1 +
drivers/mtd/nand/raw/technologic-nand-controller.c | 166 +++++++++++++++++++++
3 files changed, 174 insertions(+)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index b523354dfb00..94788da1a169 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -456,6 +456,13 @@ config MTD_NAND_RENESAS
Enables support for the NAND controller found on Renesas R-Car
Gen3 and RZ/N1 SoC families.
+config MTD_NAND_TS72XX
+ bool "ts72xx NAND controller"
+ depends on ARCH_EP93XX && HAS_IOMEM
+ help
+ Enables support for NAND controller on ts72xx SBCs.
+ This is a legacy driver based on gen_nand.
+
comment "Misc"
config MTD_SM_COMMON
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index d93e861d8ba7..b85161c3296b 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -23,6 +23,7 @@ omap2_nand-objs := omap2.o
obj-$(CONFIG_MTD_NAND_OMAP2) += omap2_nand.o
obj-$(CONFIG_MTD_NAND_OMAP_BCH_BUILD) += omap_elm.o
obj-$(CONFIG_MTD_NAND_MARVELL) += marvell_nand.o
+obj-$(CONFIG_MTD_NAND_TS72XX) += technologic-nand-controller.o
obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
diff --git a/drivers/mtd/nand/raw/technologic-nand-controller.c b/drivers/mtd/nand/raw/technologic-nand-controller.c
new file mode 100644
index 000000000000..02430ed1e896
--- /dev/null
+++ b/drivers/mtd/nand/raw/technologic-nand-controller.c
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Technologic Systems TS72xx NAND controller driver
+ *
+ * Copyright (C) 2023 Nikita Shubin <nikita.shubin@maquefel.me>
+ *
+ * Derived from: plat_nand.c
+ * Author: Vitaly Wool <vitalywool@gmail.com>
+ */
+
+#include <linux/bits.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/platnand.h>
+
+#define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */
+#define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */
+
+struct ts72xx_nand_data {
+ struct nand_controller controller;
+ struct nand_chip chip;
+ void __iomem *io_base;
+};
+
+static int ts72xx_nand_attach_chip(struct nand_chip *chip)
+{
+ switch (chip->ecc.engine_type) {
+ case NAND_ECC_ENGINE_TYPE_SOFT:
+ if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
+ chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
+ break;
+ case NAND_ECC_ENGINE_TYPE_ON_HOST:
+ return -EINVAL;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static const struct nand_controller_ops ts72xx_nand_ops = {
+ .attach_chip = ts72xx_nand_attach_chip,
+};
+
+static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
+ int cmd, unsigned int ctrl)
+{
+ if (ctrl & NAND_CTRL_CHANGE) {
+ void __iomem *addr = chip->legacy.IO_ADDR_R;
+ unsigned char bits;
+
+ addr += BIT(TS72XX_NAND_CONTROL_ADDR_LINE);
+
+ bits = readb(addr) & ~GENMASK(2, 0);
+ bits |= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */
+ bits |= (ctrl & NAND_CLE); /* bit 1 -> bit 1 */
+ bits |= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */
+
+ writeb(bits, addr);
+ }
+
+ if (cmd != NAND_CMD_NONE)
+ writeb(cmd, chip->legacy.IO_ADDR_W);
+}
+
+static int ts72xx_nand_device_ready(struct nand_chip *chip)
+{
+ void __iomem *addr = chip->legacy.IO_ADDR_R;
+
+ addr += BIT(TS72XX_NAND_BUSY_ADDR_LINE);
+
+ return !!(readb(addr) & BIT(5));
+}
+
+static int ts72xx_nand_probe(struct platform_device *pdev)
+{
+ struct ts72xx_nand_data *data;
+ struct fwnode_handle *child;
+ struct mtd_info *mtd;
+ int err;
+
+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ data->controller.ops = &ts72xx_nand_ops;
+ nand_controller_init(&data->controller);
+ data->chip.controller = &data->controller;
+
+ data->io_base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(data->io_base))
+ return PTR_ERR(data->io_base);
+
+ child = fwnode_get_next_child_node(dev_fwnode(&pdev->dev), NULL);
+ if (!child)
+ return dev_err_probe(&pdev->dev, -ENXIO,
+ "ts72xx controller node should have exactly one child\n");
+
+ nand_set_flash_node(&data->chip, to_of_node(child));
+ mtd = nand_to_mtd(&data->chip);
+ mtd->dev.parent = &pdev->dev;
+
+ data->chip.legacy.IO_ADDR_R = data->io_base;
+ data->chip.legacy.IO_ADDR_W = data->io_base;
+ data->chip.legacy.cmd_ctrl = ts72xx_nand_hwcontrol;
+ data->chip.legacy.dev_ready = ts72xx_nand_device_ready;
+
+ platform_set_drvdata(pdev, data);
+
+ /*
+ * This driver assumes that the default ECC engine should be TYPE_SOFT.
+ * Set ->engine_type before registering the NAND devices in order to
+ * provide a driver specific default value.
+ */
+ data->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+
+ /* Scan to find existence of the device */
+ err = nand_scan(&data->chip, 1);
+ if (err)
+ goto err_handle_put;
+
+ err = mtd_device_parse_register(mtd, NULL, NULL, NULL, 0);
+ if (err)
+ goto err_clean_nand;
+
+ return 0;
+
+err_clean_nand:
+ nand_cleanup(&data->chip);
+err_handle_put:
+ fwnode_handle_put(child);
+ return err;
+}
+
+static void ts72xx_nand_remove(struct platform_device *pdev)
+{
+ struct ts72xx_nand_data *data = platform_get_drvdata(pdev);
+ struct nand_chip *chip = &data->chip;
+ int ret;
+
+ ret = mtd_device_unregister(nand_to_mtd(chip));
+ WARN_ON(ret);
+ nand_cleanup(chip);
+}
+
+static const struct of_device_id ts72xx_id_table[] = {
+ { .compatible = "technologic,ts7200-nand" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ts72xx_id_table);
+
+static struct platform_driver ts72xx_nand_driver = {
+ .driver = {
+ .name = "ts72xx-nand",
+ .of_match_table = ts72xx_id_table,
+ },
+ .probe = ts72xx_nand_probe,
+ .remove_new = ts72xx_nand_remove,
+};
+module_platform_driver(ts72xx_nand_driver);
+
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 26/42] mtd: nand: add support for ts72xx
2023-09-15 8:11 ` [PATCH v4 26/42] mtd: nand: add support for ts72xx Nikita Shubin via B4 Relay
@ 2023-09-18 12:58 ` Miquel Raynal
0 siblings, 0 replies; 78+ messages in thread
From: Miquel Raynal @ 2023-09-18 12:58 UTC (permalink / raw)
To: Nikita Shubin via B4 Relay
Cc: nikita.shubin, Richard Weinberger, Vignesh Raghavendra,
Arnd Bergmann, Neil Armstrong, Florian Fainelli, Liang Yang,
Christophe Kerello, Jean Delvare, Johan Jonker, linux-kernel,
linux-mtd, Alexander Sverdlin
Hi Nikita,
devnull+nikita.shubin.maquefel.me@kernel.org wrote on Fri, 15 Sep 2023
11:11:08 +0300:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Technologic Systems has it's own nand controller implementation in CPLD.
I initially agreed to accept a first version of this controller driver
with a legacy API because people were apparently under time pressure to
get this in. I see it's been a couple of months, so this is not that
urgent after all. As the driver is only 166 lines long, I would
strongly prefer a very straight ->exec_op() conversion in order to get
rid of these ugly direct I/O accesses.
Thanks,
Miquèl
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
> drivers/mtd/nand/raw/Kconfig | 7 +
> drivers/mtd/nand/raw/Makefile | 1 +
> drivers/mtd/nand/raw/technologic-nand-controller.c | 166 +++++++++++++++++++++
> 3 files changed, 174 insertions(+)
>
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 27/42] dt-bindings: ata: Add Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (25 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 26/42] mtd: nand: add support for ts72xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 11:00 ` Krzysztof Kozlowski
2023-09-15 8:11 ` [PATCH v4 28/42] ata: pata_ep93xx: add device tree support Nikita Shubin via B4 Relay
` (16 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Damien Le Moal, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-ide, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add YAML bindings for ep93xx SoC PATA.
Acked-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../bindings/ata/cirrus,ep9312-pata.yaml | 42 ++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/Documentation/devicetree/bindings/ata/cirrus,ep9312-pata.yaml b/Documentation/devicetree/bindings/ata/cirrus,ep9312-pata.yaml
new file mode 100644
index 000000000000..8130923fdc72
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/cirrus,ep9312-pata.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/cirrus,ep9312-pata.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic EP9312 PATA controller
+
+maintainers:
+ - Damien Le Moal <dlemoal@kernel.org>
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9312-pata
+ - items:
+ - const: cirrus,ep9315-pata
+ - const: cirrus,ep9312-pata
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ ide@800a0000 {
+ compatible = "cirrus,ep9312-pata";
+ reg = <0x800a0000 0x38>;
+ interrupt-parent = <&vic1>;
+ interrupts = <8>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ide_default_pins>;
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 27/42] dt-bindings: ata: Add Cirrus EP93xx
2023-09-15 8:11 ` [PATCH v4 27/42] dt-bindings: ata: Add Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 11:00 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 11:00 UTC (permalink / raw)
To: nikita.shubin, Damien Le Moal, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-ide, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
On 15/09/2023 10:11, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add YAML bindings for ep93xx SoC PATA.
>
> Acked-by: Damien Le Moal <dlemoal@kernel.org>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 28/42] ata: pata_ep93xx: add device tree support
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (26 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 27/42] dt-bindings: ata: Add Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:17 ` Damien Le Moal
2023-09-15 8:53 ` Sergey Shtylyov
2023-09-15 8:11 ` [PATCH v4 29/42] dt-bindings: input: Add Cirrus EP93xx keypad Nikita Shubin via B4 Relay
` (15 subsequent siblings)
43 siblings, 2 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Sergey Shtylyov, Damien Le Moal
Cc: linux-ide, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add OF ID match table.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/ata/pata_ep93xx.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/ata/pata_ep93xx.c b/drivers/ata/pata_ep93xx.c
index 3f91b6cff353..47686dc1fed6 100644
--- a/drivers/ata/pata_ep93xx.c
+++ b/drivers/ata/pata_ep93xx.c
@@ -44,6 +44,7 @@
#include <linux/delay.h>
#include <linux/dmaengine.h>
#include <linux/ktime.h>
+#include <linux/mod_devicetable.h>
#include <linux/platform_data/dma-ep93xx.h>
#include <linux/soc/cirrus/ep93xx.h>
@@ -1022,9 +1023,16 @@ static int ep93xx_pata_remove(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id ep93xx_pata_of_ids[] = {
+ { .compatible = "cirrus,ep9312-pata" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ep93xx_pata_of_ids);
+
static struct platform_driver ep93xx_pata_platform_driver = {
.driver = {
.name = DRV_NAME,
+ .of_match_table = ep93xx_pata_of_ids,
},
.probe = ep93xx_pata_probe,
.remove = ep93xx_pata_remove,
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 28/42] ata: pata_ep93xx: add device tree support
2023-09-15 8:11 ` [PATCH v4 28/42] ata: pata_ep93xx: add device tree support Nikita Shubin via B4 Relay
@ 2023-09-15 8:17 ` Damien Le Moal
2023-09-15 8:53 ` Sergey Shtylyov
1 sibling, 0 replies; 78+ messages in thread
From: Damien Le Moal @ 2023-09-15 8:17 UTC (permalink / raw)
To: nikita.shubin, Sergey Shtylyov
Cc: linux-ide, linux-kernel, Arnd Bergmann, Alexander Sverdlin
On 9/15/23 17:11, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add OF ID match table.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Acked-by: Damien Le Moal <dlemoal@kernel.org>
--
Damien Le Moal
Western Digital Research
^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH v4 28/42] ata: pata_ep93xx: add device tree support
2023-09-15 8:11 ` [PATCH v4 28/42] ata: pata_ep93xx: add device tree support Nikita Shubin via B4 Relay
2023-09-15 8:17 ` Damien Le Moal
@ 2023-09-15 8:53 ` Sergey Shtylyov
1 sibling, 0 replies; 78+ messages in thread
From: Sergey Shtylyov @ 2023-09-15 8:53 UTC (permalink / raw)
To: nikita.shubin, Damien Le Moal
Cc: linux-ide, linux-kernel, Arnd Bergmann, Alexander Sverdlin
On 9/15/23 11:11 AM, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add OF ID match table.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
[...]
MBR, Sergey
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 29/42] dt-bindings: input: Add Cirrus EP93xx keypad
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (27 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 28/42] ata: pata_ep93xx: add device tree support Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 11:05 ` Krzysztof Kozlowski
2023-09-15 8:11 ` [PATCH v4 30/42] input: keypad: ep93xx: add DT support for Cirrus EP93xx Nikita Shubin via B4 Relay
` (14 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Dmitry Torokhov, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Alexander Sverdlin
Cc: linux-input, devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add YAML bindings for ep93xx SoC keypad.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../bindings/input/cirrus,ep9307-keypad.yaml | 87 ++++++++++++++++++++++
1 file changed, 87 insertions(+)
diff --git a/Documentation/devicetree/bindings/input/cirrus,ep9307-keypad.yaml b/Documentation/devicetree/bindings/input/cirrus,ep9307-keypad.yaml
new file mode 100644
index 000000000000..ac020c9f564a
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/cirrus,ep9307-keypad.yaml
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/input/cirrus,ep9307-keypad.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus ep93xx keypad
+
+maintainers:
+ - Alexander Sverdlin <alexander.sverdlin@gmail.com>
+
+allOf:
+ - $ref: /schemas/input/matrix-keymap.yaml#
+
+description:
+ The KPP is designed to interface with a keypad matrix with 2-point contact
+ or 3-point contact keys. The KPP is designed to simplify the software task
+ of scanning a keypad matrix. The KPP is capable of detecting, debouncing,
+ and decoding one or multiple keys pressed simultaneously on a keypad.
+
+properties:
+ compatible:
+ oneOf:
+ - const: cirrus,ep9307-keypad
+ - items:
+ - enum:
+ - cirrus,ep9312-keypad
+ - cirrus,ep9315-keypad
+ - const: cirrus,ep9307-keypad
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ debounce-delay-ms:
+ description: |
+ Time in microseconds that key must be pressed or
+ released for state change interrupt to trigger.
+
+ cirrus,prescale:
+ description: row/column counter pre-scaler load value
+ $ref: /schemas/types.yaml#/definitions/uint16
+ maximum: 1023
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - linux,keymap
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/cirrus,ep9301-clk.h>
+ #include <dt-bindings/input/input.h>
+ keypad@800f0000 {
+ compatible = "cirrus,ep9307-keypad";
+ reg = <0x800f0000 0x0c>;
+ interrupt-parent = <&vic0>;
+ interrupts = <29>;
+ clocks = <&eclk EP93XX_CLK_KEYPAD>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&keypad_default_pins>;
+ linux,keymap = <KEY_UP>,
+ <KEY_DOWN>,
+ <KEY_VOLUMEDOWN>,
+ <KEY_HOME>,
+ <KEY_RIGHT>,
+ <KEY_LEFT>,
+ <KEY_ENTER>,
+ <KEY_VOLUMEUP>,
+ <KEY_F6>,
+ <KEY_F8>,
+ <KEY_F9>,
+ <KEY_F10>,
+ <KEY_F1>,
+ <KEY_F2>,
+ <KEY_F3>,
+ <KEY_POWER>;
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 29/42] dt-bindings: input: Add Cirrus EP93xx keypad
2023-09-15 8:11 ` [PATCH v4 29/42] dt-bindings: input: Add Cirrus EP93xx keypad Nikita Shubin via B4 Relay
@ 2023-09-15 11:05 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 11:05 UTC (permalink / raw)
To: nikita.shubin, Dmitry Torokhov, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Alexander Sverdlin
Cc: linux-input, devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:11, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add YAML bindings for ep93xx SoC keypad.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 30/42] input: keypad: ep93xx: add DT support for Cirrus EP93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (28 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 29/42] dt-bindings: input: Add Cirrus EP93xx keypad Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-18 7:27 ` Andy Shevchenko
2023-09-15 8:11 ` [PATCH v4 31/42] dt-bindings: wdt: Add ts72xx Nikita Shubin via B4 Relay
` (13 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Hartley Sweeten, Alexander Sverdlin, Russell King,
Dmitry Torokhov, Jonathan Cameron, Nikita Shubin,
Andy Shevchenko, Uwe Kleine-König, Sergey Shtylyov,
Damien Le Moal
Cc: Linus Walleij, linux-arm-kernel, linux-kernel, linux-input,
Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
- drop flags, they were not used anyway
- add OF ID match table
- process "autorepeat", "debounce-delay-ms", prescale from device tree
- drop platform data usage and it's header
- keymap goes from device tree now on
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
arch/arm/mach-ep93xx/core.c | 46 ---------------------
drivers/input/keyboard/ep93xx_keypad.c | 74 ++++++++++------------------------
include/linux/soc/cirrus/ep93xx.h | 4 --
3 files changed, 22 insertions(+), 102 deletions(-)
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index c81a2e84821b..c60a9d3632dd 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -696,52 +696,6 @@ void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
platform_device_register(&ep93xx_keypad_device);
}
-int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
-{
- int err;
- int i;
-
- for (i = 0; i < 8; i++) {
- err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
- if (err)
- goto fail_gpio_c;
- err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
- if (err)
- goto fail_gpio_d;
- }
-
- /* Enable the keypad controller; GPIO ports C and D used for keypad */
- ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
- EP93XX_SYSCON_DEVCFG_GONK);
-
- return 0;
-
-fail_gpio_d:
- gpio_free(EP93XX_GPIO_LINE_C(i));
-fail_gpio_c:
- for (--i; i >= 0; --i) {
- gpio_free(EP93XX_GPIO_LINE_C(i));
- gpio_free(EP93XX_GPIO_LINE_D(i));
- }
- return err;
-}
-EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
-
-void ep93xx_keypad_release_gpio(struct platform_device *pdev)
-{
- int i;
-
- for (i = 0; i < 8; i++) {
- gpio_free(EP93XX_GPIO_LINE_C(i));
- gpio_free(EP93XX_GPIO_LINE_D(i));
- }
-
- /* Disable the keypad controller; GPIO ports C and D used for GPIO */
- ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
- EP93XX_SYSCON_DEVCFG_GONK);
-}
-EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
-
/*************************************************************************
* EP93xx I2S audio peripheral handling
*************************************************************************/
diff --git a/drivers/input/keyboard/ep93xx_keypad.c b/drivers/input/keyboard/ep93xx_keypad.c
index 55075addcac2..bc302f0fd0b3 100644
--- a/drivers/input/keyboard/ep93xx_keypad.c
+++ b/drivers/input/keyboard/ep93xx_keypad.c
@@ -6,20 +6,13 @@
*
* Based on the pxa27x matrix keypad controller by Rodolfo Giometti.
*
- * NOTE:
- *
- * The 3-key reset is triggered by pressing the 3 keys in
- * Row 0, Columns 2, 4, and 7 at the same time. This action can
- * be disabled by setting the EP93XX_KEYPAD_DISABLE_3_KEY flag.
- *
- * Normal operation for the matrix does not autorepeat the key press.
- * This action can be enabled by setting the EP93XX_KEYPAD_AUTOREPEAT
- * flag.
*/
#include <linux/bits.h>
#include <linux/module.h>
+#include <linux/of.h>
#include <linux/platform_device.h>
+#include <linux/mod_devicetable.h>
#include <linux/interrupt.h>
#include <linux/clk.h>
#include <linux/io.h>
@@ -27,7 +20,6 @@
#include <linux/input/matrix_keypad.h>
#include <linux/slab.h>
#include <linux/soc/cirrus/ep93xx.h>
-#include <linux/platform_data/keypad-ep93xx.h>
#include <linux/pm_wakeirq.h>
/*
@@ -61,12 +53,16 @@
#define KEY_REG_KEY1_MASK GENMASK(5, 0)
#define KEY_REG_KEY1_SHIFT 0
+#define EP93XX_MATRIX_ROWS (8)
+#define EP93XX_MATRIX_COLS (8)
+
#define EP93XX_MATRIX_SIZE (EP93XX_MATRIX_ROWS * EP93XX_MATRIX_COLS)
struct ep93xx_keypad {
- struct ep93xx_keypad_platform_data *pdata;
struct input_dev *input_dev;
struct clk *clk;
+ unsigned int debounce;
+ uint16_t prescale;
void __iomem *mmio_base;
@@ -133,23 +129,11 @@ static irqreturn_t ep93xx_keypad_irq_handler(int irq, void *dev_id)
static void ep93xx_keypad_config(struct ep93xx_keypad *keypad)
{
- struct ep93xx_keypad_platform_data *pdata = keypad->pdata;
unsigned int val = 0;
- clk_set_rate(keypad->clk, pdata->clk_rate);
-
- if (pdata->flags & EP93XX_KEYPAD_DISABLE_3_KEY)
- val |= KEY_INIT_DIS3KY;
- if (pdata->flags & EP93XX_KEYPAD_DIAG_MODE)
- val |= KEY_INIT_DIAG;
- if (pdata->flags & EP93XX_KEYPAD_BACK_DRIVE)
- val |= KEY_INIT_BACK;
- if (pdata->flags & EP93XX_KEYPAD_TEST_MODE)
- val |= KEY_INIT_T2;
-
- val |= ((pdata->debounce << KEY_INIT_DBNC_SHIFT) & KEY_INIT_DBNC_MASK);
+ val |= ((keypad->debounce << KEY_INIT_DBNC_SHIFT) & KEY_INIT_DBNC_MASK);
- val |= ((pdata->prescale << KEY_INIT_PRSCL_SHIFT) & KEY_INIT_PRSCL_MASK);
+ val |= ((keypad->prescale << KEY_INIT_PRSCL_SHIFT) & KEY_INIT_PRSCL_MASK);
__raw_writel(val, keypad->mmio_base + KEY_INIT);
}
@@ -220,17 +204,10 @@ static int ep93xx_keypad_resume(struct device *dev)
static DEFINE_SIMPLE_DEV_PM_OPS(ep93xx_keypad_pm_ops,
ep93xx_keypad_suspend, ep93xx_keypad_resume);
-static void ep93xx_keypad_release_gpio_action(void *_pdev)
-{
- struct platform_device *pdev = _pdev;
-
- ep93xx_keypad_release_gpio(pdev);
-}
-
static int ep93xx_keypad_probe(struct platform_device *pdev)
{
+ struct device *dev = &pdev->dev;
struct ep93xx_keypad *keypad;
- const struct matrix_keymap_data *keymap_data;
struct input_dev *input_dev;
int err;
@@ -238,14 +215,6 @@ static int ep93xx_keypad_probe(struct platform_device *pdev)
if (!keypad)
return -ENOMEM;
- keypad->pdata = dev_get_platdata(&pdev->dev);
- if (!keypad->pdata)
- return -EINVAL;
-
- keymap_data = keypad->pdata->keymap_data;
- if (!keymap_data)
- return -EINVAL;
-
keypad->irq = platform_get_irq(pdev, 0);
if (keypad->irq < 0)
return keypad->irq;
@@ -254,19 +223,13 @@ static int ep93xx_keypad_probe(struct platform_device *pdev)
if (IS_ERR(keypad->mmio_base))
return PTR_ERR(keypad->mmio_base);
- err = ep93xx_keypad_acquire_gpio(pdev);
- if (err)
- return err;
-
- err = devm_add_action_or_reset(&pdev->dev,
- ep93xx_keypad_release_gpio_action, pdev);
- if (err)
- return err;
-
keypad->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(keypad->clk))
return PTR_ERR(keypad->clk);
+ device_property_read_u32(dev, "debounce-delay-ms", &keypad->debounce);
+ device_property_read_u16(dev, "cirrus,prescale", &keypad->prescale);
+
input_dev = devm_input_allocate_device(&pdev->dev);
if (!input_dev)
return -ENOMEM;
@@ -278,13 +241,13 @@ static int ep93xx_keypad_probe(struct platform_device *pdev)
input_dev->open = ep93xx_keypad_open;
input_dev->close = ep93xx_keypad_close;
- err = matrix_keypad_build_keymap(keymap_data, NULL,
+ err = matrix_keypad_build_keymap(NULL, NULL,
EP93XX_MATRIX_ROWS, EP93XX_MATRIX_COLS,
keypad->keycodes, input_dev);
if (err)
return err;
- if (keypad->pdata->flags & EP93XX_KEYPAD_AUTOREPEAT)
+ if (device_property_read_bool(&pdev->dev, "autorepeat"))
__set_bit(EV_REP, input_dev->evbit);
input_set_drvdata(input_dev, keypad);
@@ -315,10 +278,17 @@ static int ep93xx_keypad_remove(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id ep93xx_keypad_of_ids[] = {
+ { .compatible = "cirrus,ep9307-keypad" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ep93xx_keypad_of_ids);
+
static struct platform_driver ep93xx_keypad_driver = {
.driver = {
.name = "ep93xx-keypad",
.pm = pm_sleep_ptr(&ep93xx_keypad_pm_ops),
+ .of_match_table = ep93xx_keypad_of_ids,
},
.probe = ep93xx_keypad_probe,
.remove = ep93xx_keypad_remove,
diff --git a/include/linux/soc/cirrus/ep93xx.h b/include/linux/soc/cirrus/ep93xx.h
index 267529ee2b3d..4327f66b7cf5 100644
--- a/include/linux/soc/cirrus/ep93xx.h
+++ b/include/linux/soc/cirrus/ep93xx.h
@@ -16,8 +16,6 @@ int ep93xx_pwm_acquire_gpio(struct platform_device *pdev);
void ep93xx_pwm_release_gpio(struct platform_device *pdev);
int ep93xx_ide_acquire_gpio(struct platform_device *pdev);
void ep93xx_ide_release_gpio(struct platform_device *pdev);
-int ep93xx_keypad_acquire_gpio(struct platform_device *pdev);
-void ep93xx_keypad_release_gpio(struct platform_device *pdev);
int ep93xx_i2s_acquire(void);
void ep93xx_i2s_release(void);
unsigned int ep93xx_chip_revision(void);
@@ -27,8 +25,6 @@ static inline int ep93xx_pwm_acquire_gpio(struct platform_device *pdev) { return
static inline void ep93xx_pwm_release_gpio(struct platform_device *pdev) {}
static inline int ep93xx_ide_acquire_gpio(struct platform_device *pdev) { return 0; }
static inline void ep93xx_ide_release_gpio(struct platform_device *pdev) {}
-static inline int ep93xx_keypad_acquire_gpio(struct platform_device *pdev) { return 0; }
-static inline void ep93xx_keypad_release_gpio(struct platform_device *pdev) {}
static inline int ep93xx_i2s_acquire(void) { return 0; }
static inline void ep93xx_i2s_release(void) {}
static inline unsigned int ep93xx_chip_revision(void) { return 0; }
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 30/42] input: keypad: ep93xx: add DT support for Cirrus EP93xx
2023-09-15 8:11 ` [PATCH v4 30/42] input: keypad: ep93xx: add DT support for Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-18 7:27 ` Andy Shevchenko
0 siblings, 0 replies; 78+ messages in thread
From: Andy Shevchenko @ 2023-09-18 7:27 UTC (permalink / raw)
To: nikita.shubin
Cc: Hartley Sweeten, Alexander Sverdlin, Russell King,
Dmitry Torokhov, Jonathan Cameron, Uwe Kleine-König,
Sergey Shtylyov, Damien Le Moal, Linus Walleij, linux-arm-kernel,
linux-kernel, linux-input, Arnd Bergmann
On Fri, Sep 15, 2023 at 11:11:12AM +0300, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> - drop flags, they were not used anyway
> - add OF ID match table
> - process "autorepeat", "debounce-delay-ms", prescale from device tree
> - drop platform data usage and it's header
> - keymap goes from device tree now on
...
> #include <linux/bits.h>
> #include <linux/module.h>
> +#include <linux/of.h>
Is this correct header? Shouldn't be property.h?
> #include <linux/platform_device.h>
> +#include <linux/mod_devicetable.h>
Can you. please, try to squeeze them to most ordered parts?
> #include <linux/interrupt.h>
> #include <linux/clk.h>
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 31/42] dt-bindings: wdt: Add ts72xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (29 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 30/42] input: keypad: ep93xx: add DT support for Cirrus EP93xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 11:18 ` Krzysztof Kozlowski
2023-09-15 8:11 ` [PATCH v4 32/42] wdt: ts72xx: add DT support for ts72xx Nikita Shubin via B4 Relay
` (12 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Wim Van Sebroeck, Guenter Roeck, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Nikita Shubin
Cc: linux-watchdog, devicetree, linux-kernel, Arnd Bergmann,
Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add DT binding for Technologic Systems TS-72xx watchdog.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
.../bindings/watchdog/technologic,ts7200-wdt.yaml | 45 ++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/technologic,ts7200-wdt.yaml b/Documentation/devicetree/bindings/watchdog/technologic,ts7200-wdt.yaml
new file mode 100644
index 000000000000..7e4bfef152f8
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/technologic,ts7200-wdt.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/technologic,ts7200-wdt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Technologic Systems TS-72xx based SBCs watchdog
+
+maintainers:
+ - Nikita Shubin <nikita.shubin@maquefel.me>
+
+allOf:
+ - $ref: watchdog.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: technologic,ts7200-wdt
+ - items:
+ - enum:
+ - technologic,ts7300-wdt
+ - technologic,ts7260-wdt
+ - technologic,ts7250-wdt
+ - const: technologic,ts7200-wdt
+
+ reg:
+ items:
+ - description: control register
+ - description: feed register
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ watchdog@23800000 {
+ compatible = "technologic,ts7200-wdt";
+ reg = <0x23800000 0x01>, <0x23c00000 0x01>;
+ timeout-sec = <30>;
+ };
+
+...
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 31/42] dt-bindings: wdt: Add ts72xx
2023-09-15 8:11 ` [PATCH v4 31/42] dt-bindings: wdt: Add ts72xx Nikita Shubin via B4 Relay
@ 2023-09-15 11:18 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 11:18 UTC (permalink / raw)
To: nikita.shubin, Wim Van Sebroeck, Guenter Roeck, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-watchdog, devicetree, linux-kernel, Arnd Bergmann,
Alexander Sverdlin
On 15/09/2023 10:11, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add DT binding for Technologic Systems TS-72xx watchdog.
>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 32/42] wdt: ts72xx: add DT support for ts72xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (30 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 31/42] dt-bindings: wdt: Add ts72xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:11 ` [PATCH v4 33/42] gpio: ep93xx: add DT support for gpio-ep93xx Nikita Shubin via B4 Relay
` (11 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Wim Van Sebroeck, Guenter Roeck
Cc: linux-watchdog, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add OF ID match table.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/watchdog/ts72xx_wdt.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/watchdog/ts72xx_wdt.c b/drivers/watchdog/ts72xx_wdt.c
index 3d57670befe1..ac709dc31a65 100644
--- a/drivers/watchdog/ts72xx_wdt.c
+++ b/drivers/watchdog/ts72xx_wdt.c
@@ -12,6 +12,7 @@
*/
#include <linux/platform_device.h>
+#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/watchdog.h>
#include <linux/io.h>
@@ -160,10 +161,17 @@ static int ts72xx_wdt_probe(struct platform_device *pdev)
return 0;
}
+static const struct of_device_id ts72xx_wdt_of_ids[] = {
+ { .compatible = "technologic,ts7200-wdt" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ts72xx_wdt_of_ids);
+
static struct platform_driver ts72xx_wdt_driver = {
.probe = ts72xx_wdt_probe,
.driver = {
.name = "ts72xx-wdt",
+ .of_match_table = ts72xx_wdt_of_ids,
},
};
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 33/42] gpio: ep93xx: add DT support for gpio-ep93xx
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (31 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 32/42] wdt: ts72xx: add DT support for ts72xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:11 ` [PATCH v4 34/42] ARM: dts: add Cirrus EP93XX SoC .dtsi Nikita Shubin via B4 Relay
` (10 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Linus Walleij, Bartosz Golaszewski, Andy Shevchenko
Cc: linux-gpio, linux-kernel, Arnd Bergmann, Alexander Sverdlin,
Andy Shevchenko, Bartosz Golaszewski
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add OF ID match table.
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
drivers/gpio/gpio-ep93xx.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c
index a55f635585f4..70997232257a 100644
--- a/drivers/gpio/gpio-ep93xx.c
+++ b/drivers/gpio/gpio-ep93xx.c
@@ -359,9 +359,15 @@ static int ep93xx_gpio_probe(struct platform_device *pdev)
return devm_gpiochip_add_data(&pdev->dev, gc, egc);
}
+static const struct of_device_id ep93xx_gpio_match[] = {
+ { .compatible = "cirrus,ep9301-gpio" },
+ { /* sentinel */ }
+};
+
static struct platform_driver ep93xx_gpio_driver = {
.driver = {
.name = "gpio-ep93xx",
+ .of_match_table = ep93xx_gpio_match,
},
.probe = ep93xx_gpio_probe,
};
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 34/42] ARM: dts: add Cirrus EP93XX SoC .dtsi
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (32 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 33/42] gpio: ep93xx: add DT support for gpio-ep93xx Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 11:24 ` Krzysztof Kozlowski
2023-09-15 8:11 ` [PATCH v4 35/42] ARM: dts: ep93xx: add ts7250 board Nikita Shubin via B4 Relay
` (9 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Nikita Shubin,
Alexander Sverdlin
Cc: devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add support for Cirrus Logic EP93XX SoC's family.
Co-developed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
arch/arm/boot/dts/cirrus/ep93xx.dtsi | 454 +++++++++++++++++++++++++++++++++++
1 file changed, 454 insertions(+)
diff --git a/arch/arm/boot/dts/cirrus/ep93xx.dtsi b/arch/arm/boot/dts/cirrus/ep93xx.dtsi
new file mode 100644
index 000000000000..11ca6d6a190d
--- /dev/null
+++ b/arch/arm/boot/dts/cirrus/ep93xx.dtsi
@@ -0,0 +1,454 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree file for Cirrus Logic systems EP93XX SoC
+ */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/clock/cirrus,ep9301-clk.h>
+/ {
+ soc: soc {
+ compatible = "simple-bus";
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ syscon: syscon@80930000 {
+ compatible = "cirrus,ep9301-syscon",
+ "syscon", "simple-mfd";
+ reg = <0x80930000 0x1000>;
+
+ eclk: clock-controller {
+ compatible = "cirrus,ep9301-clk";
+ #clock-cells = <1>;
+ clocks = <&xtali>;
+ };
+
+ pinctrl: pinctrl {
+ compatible = "cirrus,ep9301-pinctrl";
+
+ spi_default_pins: pins-spi {
+ function = "spi";
+ groups = "ssp";
+ };
+
+ ac97_default_pins: pins-ac97 {
+ function = "ac97";
+ groups = "ac97";
+ };
+
+ i2s_on_ssp_pins: pins-i2sonssp {
+ function = "i2s";
+ groups = "i2s_on_ssp";
+ };
+
+ i2s_on_ac97_pins: pins-i2sonac97 {
+ function = "i2s";
+ groups = "i2s_on_ac97";
+ };
+
+ gpio1_default_pins: pins-gpio1 {
+ function = "gpio";
+ groups = "gpio1agrp";
+ };
+
+ pwm1_default_pins: pins-pwm1 {
+ function = "pwm";
+ groups = "pwm1";
+ };
+
+ gpio2_default_pins: pins-gpio2 {
+ function = "gpio";
+ groups = "gpio2agrp";
+ };
+
+ gpio3_default_pins: pins-gpio3 {
+ function = "gpio";
+ groups = "gpio3agrp";
+ };
+
+ keypad_default_pins: pins-keypad {
+ function = "keypad";
+ groups = "keypadgrp";
+ };
+
+ gpio4_default_pins: pins-gpio4 {
+ function = "gpio";
+ groups = "gpio4agrp";
+ };
+
+ gpio6_default_pins: pins-gpio6 {
+ function = "gpio";
+ groups = "gpio6agrp";
+ };
+
+ gpio7_default_pins: pins-gpio7 {
+ function = "gpio";
+ groups = "gpio7agrp";
+ };
+
+ ide_default_pins: pins-ide {
+ function = "pata";
+ groups = "idegrp";
+ };
+
+ lcd_on_dram0_pins: pins-rasteronsdram0 {
+ function = "lcd";
+ groups = "rasteronsdram0grp";
+ };
+
+ lcd_on_dram3_pins: pins-rasteronsdram3 {
+ function = "lcd";
+ groups = "rasteronsdram3grp";
+ };
+ };
+
+ reboot {
+ compatible = "cirrus,ep9301-reboot";
+ };
+ };
+
+ adc: adc@80900000 {
+ compatible = "cirrus,ep9301-adc";
+ reg = <0x80900000 0x28>;
+ clocks = <&eclk EP93XX_CLK_ADC>;
+ interrupt-parent = <&vic0>;
+ interrupts = <30>;
+ status = "disabled";
+ };
+
+ /*
+ * The EP93XX expansion bus is a set of up to 7 each up to 16MB
+ * windows in the 256MB space from 0x50000000 to 0x5fffffff.
+ * But since we don't require to setup it in any way, we can
+ * represent it as a simple-bus.
+ */
+ ebi: bus@80080000 {
+ compatible = "simple-bus";
+ reg = <0x80080000 0x20>;
+ native-endian;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ };
+
+ dma0: dma-controller@80000000 {
+ compatible = "cirrus,ep9301-dma-m2p";
+ reg = <0x80000000 0x0040>,
+ <0x80000040 0x0040>,
+ <0x80000080 0x0040>,
+ <0x800000c0 0x0040>,
+ <0x80000240 0x0040>,
+ <0x80000200 0x0040>,
+ <0x800002c0 0x0040>,
+ <0x80000280 0x0040>,
+ <0x80000340 0x0040>,
+ <0x80000300 0x0040>;
+ clocks = <&eclk EP93XX_CLK_M2P0>,
+ <&eclk EP93XX_CLK_M2P1>,
+ <&eclk EP93XX_CLK_M2P2>,
+ <&eclk EP93XX_CLK_M2P3>,
+ <&eclk EP93XX_CLK_M2P4>,
+ <&eclk EP93XX_CLK_M2P5>,
+ <&eclk EP93XX_CLK_M2P6>,
+ <&eclk EP93XX_CLK_M2P7>,
+ <&eclk EP93XX_CLK_M2P8>,
+ <&eclk EP93XX_CLK_M2P9>;
+ clock-names = "m2p0", "m2p1",
+ "m2p2", "m2p3",
+ "m2p4", "m2p5",
+ "m2p6", "m2p7",
+ "m2p8", "m2p9";
+ interrupt-parent = <&vic0>;
+ interrupts = <7>, <8>, <9>, <10>, <11>,
+ <12>, <13>, <14>, <15>, <16>;
+ #dma-cells = <1>;
+ };
+
+ dma1: dma-controller@80000100 {
+ compatible = "cirrus,ep9301-dma-m2m";
+ reg = <0x80000100 0x0040>,
+ <0x80000140 0x0040>;
+ clocks = <&eclk EP93XX_CLK_M2M0>,
+ <&eclk EP93XX_CLK_M2M1>;
+ clock-names = "m2m0", "m2m1";
+ interrupt-parent = <&vic0>;
+ interrupts = <17>, <18>;
+ #dma-cells = <1>;
+ };
+
+ eth0: ethernet@80010000 {
+ compatible = "cirrus,ep9301-eth";
+ reg = <0x80010000 0x10000>;
+ interrupt-parent = <&vic1>;
+ interrupts = <7>;
+ mdio0: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ gpio0: gpio@80840000 {
+ compatible = "cirrus,ep9301-gpio";
+ reg = <0x80840000 0x04>,
+ <0x80840010 0x04>,
+ <0x80840090 0x1c>;
+ reg-names = "data", "dir", "intr";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&vic1>;
+ interrupts = <27>;
+ };
+
+ gpio1: gpio@80840004 {
+ compatible = "cirrus,ep9301-gpio";
+ reg = <0x80840004 0x04>,
+ <0x80840014 0x04>,
+ <0x808400ac 0x1c>;
+ reg-names = "data", "dir", "intr";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&vic1>;
+ interrupts = <27>;
+ };
+
+ gpio2: gpio@80840008 {
+ compatible = "cirrus,ep9301-gpio";
+ reg = <0x80840008 0x04>,
+ <0x80840018 0x04>;
+ reg-names = "data", "dir";
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio2_default_pins>;
+ status = "disabled";
+ };
+
+ gpio3: gpio@8084000c {
+ compatible = "cirrus,ep9301-gpio";
+ reg = <0x8084000c 0x04>,
+ <0x8084001c 0x04>;
+ reg-names = "data", "dir";
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio3_default_pins>;
+ status = "disabled";
+ };
+
+ gpio4: gpio@80840020 {
+ compatible = "cirrus,ep9301-gpio";
+ reg = <0x80840020 0x04>,
+ <0x80840024 0x04>;
+ reg-names = "data", "dir";
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio4_default_pins>;
+ status = "disabled";
+ };
+
+ gpio5: gpio@80840030 {
+ compatible = "cirrus,ep9301-gpio";
+ reg = <0x80840030 0x04>,
+ <0x80840034 0x04>,
+ <0x8084004c 0x1c>;
+ reg-names = "data", "dir", "intr";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ interrupts-extended = <&vic0 19>, <&vic0 20>,
+ <&vic0 21>, <&vic0 22>,
+ <&vic1 15>, <&vic1 16>,
+ <&vic1 17>, <&vic1 18>;
+ };
+
+ gpio6: gpio@80840038 {
+ compatible = "cirrus,ep9301-gpio";
+ reg = <0x80840038 0x04>,
+ <0x8084003c 0x04>;
+ reg-names = "data", "dir";
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio6_default_pins>;
+ status = "disabled";
+ };
+
+ gpio7: gpio@80840040 {
+ compatible = "cirrus,ep9301-gpio";
+ reg = <0x80840040 0x04>,
+ <0x80840044 0x04>;
+ reg-names = "data", "dir";
+ gpio-controller;
+ #gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio7_default_pins>;
+ status = "disabled";
+ };
+
+ i2s: i2s@80820000 {
+ compatible = "cirrus,ep9301-i2s";
+ reg = <0x80820000 0x100>;
+ #sound-dai-cells = <0>;
+ interrupt-parent = <&vic1>;
+ interrupts = <28>;
+ clocks = <&eclk EP93XX_CLK_I2S_MCLK>,
+ <&eclk EP93XX_CLK_I2S_SCLK>,
+ <&eclk EP93XX_CLK_I2S_LRCLK>;
+ clock-names = "mclk", "sclk", "lrclk";
+ status = "disabled";
+ };
+
+ ide: ide@800a0000 {
+ compatible = "cirrus,ep9312-pata";
+ reg = <0x800a0000 0x38>;
+ interrupt-parent = <&vic1>;
+ interrupts = <8>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ide_default_pins>;
+ status = "disabled";
+ };
+
+ vic0: interrupt-controller@800b0000 {
+ compatible = "arm,pl192-vic";
+ reg = <0x800b0000 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ valid-mask = <0x7ffffffc>;
+ valid-wakeup-mask = <0x0>;
+ };
+
+ vic1: interrupt-controller@800c0000 {
+ compatible = "arm,pl192-vic";
+ reg = <0x800c0000 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ valid-mask = <0x1fffffff>;
+ valid-wakeup-mask = <0x0>;
+ };
+
+ keypad: keypad@800f0000 {
+ compatible = "cirrus,ep9307-keypad";
+ reg = <0x800f0000 0x0c>;
+ interrupt-parent = <&vic0>;
+ interrupts = <29>;
+ clocks = <&eclk EP93XX_CLK_KEYPAD>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&keypad_default_pins>;
+ linux,keymap = <KEY_UP>,
+ <KEY_DOWN>,
+ <KEY_VOLUMEDOWN>,
+ <KEY_HOME>,
+ <KEY_RIGHT>,
+ <KEY_LEFT>,
+ <KEY_ENTER>,
+ <KEY_VOLUMEUP>,
+ <KEY_F6>,
+ <KEY_F8>,
+ <KEY_F9>,
+ <KEY_F10>,
+ <KEY_F1>,
+ <KEY_F2>,
+ <KEY_F3>,
+ <KEY_POWER>;
+ };
+
+ pwm0: pwm@80910000 {
+ compatible = "cirrus,ep9301-pwm";
+ reg = <0x80910000 0x10>;
+ clocks = <&eclk EP93XX_CLK_PWM>;
+ status = "disabled";
+ };
+
+ pwm1: pwm@80910020 {
+ compatible = "cirrus,ep9301-pwm";
+ reg = <0x80910020 0x10>;
+ clocks = <&eclk EP93XX_CLK_PWM>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_default_pins>;
+ status = "disabled";
+ };
+
+ rtc0: rtc@80920000 {
+ compatible = "cirrus,ep9301-rtc";
+ reg = <0x80920000 0x100>;
+ };
+
+ spi0: spi@808a0000 {
+ compatible = "cirrus,ep9301-spi";
+ reg = <0x808a0000 0x18>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&vic1>;
+ interrupts = <21>;
+ clocks = <&eclk EP93XX_CLK_SPI>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_default_pins>;
+ status = "disabled";
+ };
+
+ timer: timer@80810000 {
+ compatible = "cirrus,ep9301-timer";
+ reg = <0x80810000 0x100>;
+ interrupt-parent = <&vic1>;
+ interrupts = <19>;
+ };
+
+ uart0: serial@808c0000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x808c0000 0x1000>;
+ arm,primecell-periphid = <0x00041010>;
+ clocks = <&eclk EP93XX_CLK_UART1>, <&eclk EP93XX_CLK_UART>;
+ clock-names = "uartclk", "apb_pclk";
+ interrupt-parent = <&vic1>;
+ interrupts = <20>;
+ status = "disabled";
+ };
+
+ uart1: uart@808d0000 {
+ compatible = "arm,primecell";
+ reg = <0x808d0000 0x1000>;
+ arm,primecell-periphid = <0x00041010>;
+ clocks = <&eclk EP93XX_CLK_UART2>, <&eclk EP93XX_CLK_UART>;
+ clock-names = "apb:uart2", "apb_pclk";
+ interrupt-parent = <&vic1>;
+ interrupts = <22>;
+ status = "disabled";
+ };
+
+ uart2: uart@808b0000 {
+ compatible = "arm,primecell";
+ reg = <0x808b0000 0x1000>;
+ arm,primecell-periphid = <0x00041010>;
+ clocks = <&eclk EP93XX_CLK_UART3>, <&eclk EP93XX_CLK_UART>;
+ clock-names = "apb:uart3", "apb_pclk";
+ interrupt-parent = <&vic1>;
+ interrupts = <23>;
+ status = "disabled";
+ };
+
+ usb0: usb@80020000 {
+ compatible = "generic-ohci";
+ reg = <0x80020000 0x10000>;
+ interrupt-parent = <&vic1>;
+ interrupts = <24>;
+ clocks = <&eclk EP93XX_CLK_USB>;
+ status = "disabled";
+ };
+
+ watchdog0: watchdog@80940000 {
+ compatible = "cirrus,ep9301-wdt";
+ reg = <0x80940000 0x08>;
+ };
+ };
+
+ xtali: oscillator {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <14745600>;
+ clock-output-names = "xtali";
+ };
+};
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 34/42] ARM: dts: add Cirrus EP93XX SoC .dtsi
2023-09-15 8:11 ` [PATCH v4 34/42] ARM: dts: add Cirrus EP93XX SoC .dtsi Nikita Shubin via B4 Relay
@ 2023-09-15 11:24 ` Krzysztof Kozlowski
0 siblings, 0 replies; 78+ messages in thread
From: Krzysztof Kozlowski @ 2023-09-15 11:24 UTC (permalink / raw)
To: nikita.shubin, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Alexander Sverdlin
Cc: devicetree, linux-kernel, Arnd Bergmann
On 15/09/2023 10:11, Nikita Shubin via B4 Relay wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Add support for Cirrus Logic EP93XX SoC's family.
>
> Co-developed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
> ---
> arch/arm/boot/dts/cirrus/ep93xx.dtsi | 454 +++++++++++++++++++++++++++++++++++
> 1 file changed, 454 insertions(+)
>
> diff --git a/arch/arm/boot/dts/cirrus/ep93xx.dtsi b/arch/arm/boot/dts/cirrus/ep93xx.dtsi
> new file mode 100644
> index 000000000000..11ca6d6a190d
> --- /dev/null
> +++ b/arch/arm/boot/dts/cirrus/ep93xx.dtsi
> @@ -0,0 +1,454 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree file for Cirrus Logic systems EP93XX SoC
> + */
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/clock/cirrus,ep9301-clk.h>
> +/ {
> + soc: soc {
> + compatible = "simple-bus";
> + ranges;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + syscon: syscon@80930000 {
> + compatible = "cirrus,ep9301-syscon",
> + "syscon", "simple-mfd";
Odd indentation. Please align with opening "
> + reg = <0x80930000 0x1000>;
> +
> + eclk: clock-controller {
> + compatible = "cirrus,ep9301-clk";
> + #clock-cells = <1>;
> + clocks = <&xtali>;
> + };
> +
> + pinctrl: pinctrl {
> + compatible = "cirrus,ep9301-pinctrl";
> +
> + spi_default_pins: pins-spi {
> + function = "spi";
> + groups = "ssp";
Please include one such entry in your bindings example, so it will be
validated. It would also help you in review - you would not get a
comment that pinctrl node is not used :/
> + };
> +
> + ac97_default_pins: pins-ac97 {
> + function = "ac97";
> + groups = "ac97";
> + };
> +
> + i2s_on_ssp_pins: pins-i2sonssp {
> + function = "i2s";
> + groups = "i2s_on_ssp";
> + };
> +
> + i2s_on_ac97_pins: pins-i2sonac97 {
> + function = "i2s";
> + groups = "i2s_on_ac97";
> + };
> +
> + gpio1_default_pins: pins-gpio1 {
> + function = "gpio";
> + groups = "gpio1agrp";
> + };
> +
> + pwm1_default_pins: pins-pwm1 {
> + function = "pwm";
> + groups = "pwm1";
> + };
> +
> + gpio2_default_pins: pins-gpio2 {
> + function = "gpio";
> + groups = "gpio2agrp";
> + };
> +
> + gpio3_default_pins: pins-gpio3 {
> + function = "gpio";
> + groups = "gpio3agrp";
> + };
> +
> + keypad_default_pins: pins-keypad {
> + function = "keypad";
> + groups = "keypadgrp";
> + };
> +
> + gpio4_default_pins: pins-gpio4 {
> + function = "gpio";
> + groups = "gpio4agrp";
> + };
> +
> + gpio6_default_pins: pins-gpio6 {
> + function = "gpio";
> + groups = "gpio6agrp";
> + };
> +
> + gpio7_default_pins: pins-gpio7 {
> + function = "gpio";
> + groups = "gpio7agrp";
> + };
> +
> + ide_default_pins: pins-ide {
> + function = "pata";
> + groups = "idegrp";
> + };
> +
> + lcd_on_dram0_pins: pins-rasteronsdram0 {
> + function = "lcd";
> + groups = "rasteronsdram0grp";
> + };
> +
> + lcd_on_dram3_pins: pins-rasteronsdram3 {
> + function = "lcd";
> + groups = "rasteronsdram3grp";
> + };
> + };
> +
> + reboot {
> + compatible = "cirrus,ep9301-reboot";
> + };
> + };
> +
> + adc: adc@80900000 {
> + compatible = "cirrus,ep9301-adc";
> + reg = <0x80900000 0x28>;
> + clocks = <&eclk EP93XX_CLK_ADC>;
> + interrupt-parent = <&vic0>;
> + interrupts = <30>;
> + status = "disabled";
> + };
> +
> + /*
> + * The EP93XX expansion bus is a set of up to 7 each up to 16MB
> + * windows in the 256MB space from 0x50000000 to 0x5fffffff.
> + * But since we don't require to setup it in any way, we can
> + * represent it as a simple-bus.
> + */
> + ebi: bus@80080000 {
> + compatible = "simple-bus";
> + reg = <0x80080000 0x20>;
> + native-endian;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + };
> +
> + dma0: dma-controller@80000000 {
> + compatible = "cirrus,ep9301-dma-m2p";
> + reg = <0x80000000 0x0040>,
> + <0x80000040 0x0040>,
> + <0x80000080 0x0040>,
> + <0x800000c0 0x0040>,
> + <0x80000240 0x0040>,
> + <0x80000200 0x0040>,
> + <0x800002c0 0x0040>,
> + <0x80000280 0x0040>,
> + <0x80000340 0x0040>,
> + <0x80000300 0x0040>;
> + clocks = <&eclk EP93XX_CLK_M2P0>,
> + <&eclk EP93XX_CLK_M2P1>,
> + <&eclk EP93XX_CLK_M2P2>,
> + <&eclk EP93XX_CLK_M2P3>,
> + <&eclk EP93XX_CLK_M2P4>,
> + <&eclk EP93XX_CLK_M2P5>,
> + <&eclk EP93XX_CLK_M2P6>,
> + <&eclk EP93XX_CLK_M2P7>,
> + <&eclk EP93XX_CLK_M2P8>,
> + <&eclk EP93XX_CLK_M2P9>;
> + clock-names = "m2p0", "m2p1",
> + "m2p2", "m2p3",
> + "m2p4", "m2p5",
> + "m2p6", "m2p7",
> + "m2p8", "m2p9";
> + interrupt-parent = <&vic0>;
> + interrupts = <7>, <8>, <9>, <10>, <11>,
> + <12>, <13>, <14>, <15>, <16>;
> + #dma-cells = <1>;
> + };
> +
> + dma1: dma-controller@80000100 {
> + compatible = "cirrus,ep9301-dma-m2m";
> + reg = <0x80000100 0x0040>,
> + <0x80000140 0x0040>;
> + clocks = <&eclk EP93XX_CLK_M2M0>,
> + <&eclk EP93XX_CLK_M2M1>;
> + clock-names = "m2m0", "m2m1";
> + interrupt-parent = <&vic0>;
> + interrupts = <17>, <18>;
> + #dma-cells = <1>;
> + };
> +
> + eth0: ethernet@80010000 {
> + compatible = "cirrus,ep9301-eth";
> + reg = <0x80010000 0x10000>;
> + interrupt-parent = <&vic1>;
> + interrupts = <7>;
> + mdio0: mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> +
> + gpio0: gpio@80840000 {
> + compatible = "cirrus,ep9301-gpio";
> + reg = <0x80840000 0x04>,
> + <0x80840010 0x04>,
> + <0x80840090 0x1c>;
> + reg-names = "data", "dir", "intr";
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + interrupt-parent = <&vic1>;
> + interrupts = <27>;
> + };
> +
> + gpio1: gpio@80840004 {
> + compatible = "cirrus,ep9301-gpio";
> + reg = <0x80840004 0x04>,
> + <0x80840014 0x04>,
> + <0x808400ac 0x1c>;
> + reg-names = "data", "dir", "intr";
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + interrupt-parent = <&vic1>;
> + interrupts = <27>;
> + };
> +
> + gpio2: gpio@80840008 {
> + compatible = "cirrus,ep9301-gpio";
> + reg = <0x80840008 0x04>,
> + <0x80840018 0x04>;
> + reg-names = "data", "dir";
> + gpio-controller;
> + #gpio-cells = <2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&gpio2_default_pins>;
> + status = "disabled";
Why this node is disabled? Any dependencies/resources missing? Similar
questions to other gpio nodes.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 35/42] ARM: dts: ep93xx: add ts7250 board
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (33 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 34/42] ARM: dts: add Cirrus EP93XX SoC .dtsi Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:11 ` [PATCH v4 36/42] ARM: ep93xx: DT for the Cirrus ep93xx SoC platforms Nikita Shubin via B4 Relay
` (8 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Andre Przywara,
Nikita Shubin, Enric Balletbo i Serra, Shawn Guo,
Alexander Sverdlin
Cc: Geert Uytterhoeven, Heiko Stuebner, Rob Herring, devicetree,
linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add device tree file for Technologic Systems ts7250 board and
Liebherr bk3 board which have many in common, both are based on
ep9302 SoC variant.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
arch/arm/boot/dts/cirrus/Makefile | 3 +
arch/arm/boot/dts/cirrus/ep93xx-bk3.dts | 124 +++++++++++++++++++++++++
arch/arm/boot/dts/cirrus/ep93xx-ts7250.dts | 143 +++++++++++++++++++++++++++++
3 files changed, 270 insertions(+)
diff --git a/arch/arm/boot/dts/cirrus/Makefile b/arch/arm/boot/dts/cirrus/Makefile
index e944d3e2129d..211a7e2f2115 100644
--- a/arch/arm/boot/dts/cirrus/Makefile
+++ b/arch/arm/boot/dts/cirrus/Makefile
@@ -3,3 +3,6 @@ dtb-$(CONFIG_ARCH_CLPS711X) += \
ep7211-edb7211.dtb
dtb-$(CONFIG_ARCH_CLPS711X) += \
ep7211-edb7211.dtb
+dtb-$(CONFIG_ARCH_EP93XX) += \
+ ep93xx-bk3.dtb \
+ ep93xx-ts7250.dtb
diff --git a/arch/arm/boot/dts/cirrus/ep93xx-bk3.dts b/arch/arm/boot/dts/cirrus/ep93xx-bk3.dts
new file mode 100644
index 000000000000..35639fb58759
--- /dev/null
+++ b/arch/arm/boot/dts/cirrus/ep93xx-bk3.dts
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree file for Liebherr controller BK3.1 based on Cirrus EP9302 SoC
+ */
+/dts-v1/;
+#include "ep93xx.dtsi"
+
+/ {
+ model = "Liebherr controller BK3.1";
+ compatible = "liebherr,bk3", "cirrus,ep9301";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ };
+
+ memory@0 {
+ device_type = "memory";
+ /* should be set from ATAGS */
+ reg = <0x00000000 0x02000000>,
+ <0x000530c0 0x01fdd000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led-0 {
+ label = "grled";
+ gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ function = LED_FUNCTION_HEARTBEAT;
+ };
+
+ led-1 {
+ label = "rdled";
+ gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_FAULT;
+ };
+ };
+};
+
+&ebi {
+ nand-controller@60000000 {
+ compatible = "technologic,ts7200-nand";
+ reg = <0x60000000 0x8000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "System";
+ reg = <0x00000000 0x01e00000>;
+ read-only;
+ };
+
+ partition@1e00000 {
+ label = "Data";
+ reg = <0x01e00000 0x05f20000>;
+ };
+
+ partition@7d20000 {
+ label = "RedBoot";
+ reg = <0x07d20000 0x002e0000>;
+ read-only;
+ };
+ };
+ };
+ };
+};
+
+ð0 {
+ phy-handle = <&phy0>;
+};
+
+&i2s {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s_on_ac97_pins>;
+ status = "okay";
+};
+
+&gpio1 {
+ /* PWM */
+ gpio-ranges = <&pinctrl 6 163 1>;
+};
+
+&gpio4 {
+ gpio-ranges = <&pinctrl 0 97 2>;
+ status = "okay";
+};
+
+&gpio6 {
+ gpio-ranges = <&pinctrl 0 87 2>;
+ status = "okay";
+};
+
+&gpio7 {
+ gpio-ranges = <&pinctrl 2 199 4>;
+ status = "okay";
+};
+
+&mdio0 {
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/cirrus/ep93xx-ts7250.dts b/arch/arm/boot/dts/cirrus/ep93xx-ts7250.dts
new file mode 100644
index 000000000000..2a82e16c8ec4
--- /dev/null
+++ b/arch/arm/boot/dts/cirrus/ep93xx-ts7250.dts
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree file for Technologic Systems ts7250 board based on Cirrus EP9302 SoC
+ */
+/dts-v1/;
+#include "ep93xx.dtsi"
+#include <dt-bindings/dma/cirrus,ep93xx-dma.h>
+
+/ {
+ compatible = "technologic,ts7250", "cirrus,ep9301";
+ model = "TS-7250 SBC";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ };
+
+ memory@0 {
+ device_type = "memory";
+ /* should be set from ATAGS */
+ reg = <0x00000000 0x02000000>,
+ <0x000530c0 0x01fdd000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led-0 {
+ label = "grled";
+ gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ function = LED_FUNCTION_HEARTBEAT;
+ };
+
+ led-1 {
+ label = "rdled";
+ gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_FAULT;
+ };
+ };
+};
+
+&ebi {
+ nand-controller@60000000 {
+ compatible = "technologic,ts7200-nand";
+ reg = <0x60000000 0x8000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "TS-BOOTROM";
+ reg = <0x00000000 0x00020000>;
+ read-only;
+ };
+
+ partition@20000 {
+ label = "Linux";
+ reg = <0x00020000 0x07d00000>;
+ };
+
+ partition@7d20000 {
+ label = "RedBoot";
+ reg = <0x07d20000 0x002e0000>;
+ read-only;
+ };
+ };
+ };
+ };
+
+ rtc@10800000 {
+ compatible = "st,m48t86";
+ reg = <0x10800000 0x1>,
+ <0x11700000 0x1>;
+ };
+
+ watchdog@23800000 {
+ compatible = "technologic,ts7200-wdt";
+ reg = <0x23800000 0x01>,
+ <0x23c00000 0x01>;
+ timeout-sec = <30>;
+ };
+};
+
+ð0 {
+ phy-handle = <&phy0>;
+};
+
+&gpio1 {
+ /* PWM */
+ gpio-ranges = <&pinctrl 6 163 1>;
+};
+
+&gpio4 {
+ gpio-ranges = <&pinctrl 0 97 2>;
+ status = "okay";
+};
+
+&gpio6 {
+ gpio-ranges = <&pinctrl 0 87 2>;
+ status = "okay";
+};
+
+&gpio7 {
+ gpio-ranges = <&pinctrl 2 199 4>;
+ status = "okay";
+};
+
+&spi0 {
+ cs-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+ dmas = <&dma1 EP93XX_DMA_SSP>;
+ status = "okay";
+
+ tmp122: temperature-sensor@0 {
+ compatible = "ti,tmp122";
+ reg = <0>;
+ spi-max-frequency = <2000000>;
+ };
+};
+
+&mdio0 {
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 36/42] ARM: ep93xx: DT for the Cirrus ep93xx SoC platforms
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (34 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 35/42] ARM: dts: ep93xx: add ts7250 board Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:11 ` [PATCH v4 37/42] pwm: ep93xx: drop legacy pinctrl Nikita Shubin via B4 Relay
` (7 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Russell King, Hartley Sweeten, Alexander Sverdlin,
Russell King (Oracle),
Arnd Bergmann, Nick Desaulniers, Nathan Chancellor,
Masahiro Yamada, Nikita Shubin, Nicolas Saenz Julienne
Cc: Neil Armstrong, linux-arm-kernel, linux-kernel, Arnd Bergmann,
Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Add compulsory device tree support to the Cirrus ep93xx ARMv4 platform.
- select PINCTRL_EP93xx
- select COMMON_CLK_EP93XX, as clock driver moved out of platform code
- select ARCH_HAS_RESET_CONTROLLER
Select ARM_ATAG_DTB_COMPAT to update device tree with information
about memory passed from bootloader.
We have to leave all MACH options as they are used for board checking
before decomp, to turn off watchdog and ethernet DMA.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
arch/arm/Makefile | 1 -
arch/arm/mach-ep93xx/Kconfig | 20 ++++++++++----------
arch/arm/mach-ep93xx/Makefile | 11 -----------
3 files changed, 10 insertions(+), 22 deletions(-)
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 547e5856eaa0..0e3d637cae6c 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -179,7 +179,6 @@ machine-$(CONFIG_ARCH_CLPS711X) += clps711x
machine-$(CONFIG_ARCH_DAVINCI) += davinci
machine-$(CONFIG_ARCH_DIGICOLOR) += digicolor
machine-$(CONFIG_ARCH_DOVE) += dove
-machine-$(CONFIG_ARCH_EP93XX) += ep93xx
machine-$(CONFIG_ARCH_EXYNOS) += exynos
machine-$(CONFIG_ARCH_FOOTBRIDGE) += footbridge
machine-$(CONFIG_ARCH_GEMINI) += gemini
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index 703f3d232a60..812b71dcf60e 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -3,27 +3,27 @@ menuconfig ARCH_EP93XX
bool "EP93xx-based"
depends on ATAGS
depends on ARCH_MULTI_V4T
+ # CONFIG_ARCH_MULTI_V7 is not set
depends on CPU_LITTLE_ENDIAN
+ select ARCH_HAS_RESET_CONTROLLER
select ARCH_SPARSEMEM_ENABLE
select ARM_AMBA
select ARM_VIC
+ select ARM_APPENDED_DTB # Old Redboot bootloaders deployed
+ select ARM_ATAG_DTB_COMPAT # we need this to update dt memory node
+ select COMMON_CLK_EP93XX
+ select EP93XX_TIMER
select CLKSRC_MMIO
select CPU_ARM920T
select GPIOLIB
+ select PINCTRL
+ select PINCTRL_EP93XX
help
This enables support for the Cirrus EP93xx series of CPUs.
if ARCH_EP93XX
-menu "Cirrus EP93xx Implementation Options"
-
-config EP93XX_SOC_COMMON
- bool
- default y
- select SOC_BUS
- select LEDS_GPIO_REGISTER
-
-comment "EP93xx Platforms"
+# menu "EP93xx Platforms"
config MACH_BK3
bool "Support Liebherr BK3.1"
@@ -103,6 +103,6 @@ config MACH_VISION_EP9307
Say 'Y' here if you want your kernel to support the
Vision Engraving Systems EP9307 SoM.
-endmenu
+# endmenu
endif
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
deleted file mode 100644
index 62e37403df14..000000000000
--- a/arch/arm/mach-ep93xx/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# Makefile for the linux kernel.
-#
-obj-y := core.o clock.o timer-ep93xx.o
-
-obj-$(CONFIG_EP93XX_DMA) += dma.o
-
-obj-$(CONFIG_MACH_EDB93XX) += edb93xx.o
-obj-$(CONFIG_MACH_TS72XX) += ts72xx.o
-obj-$(CONFIG_MACH_VISION_EP9307)+= vision_ep9307.o
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 37/42] pwm: ep93xx: drop legacy pinctrl
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (35 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 36/42] ARM: ep93xx: DT for the Cirrus ep93xx SoC platforms Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:46 ` Linus Walleij
2023-09-15 8:11 ` [PATCH v4 38/42] ata: pata_ep93xx: remove legacy pinctrl use Nikita Shubin via B4 Relay
` (6 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Hartley Sweeten, Alexander Sverdlin, Russell King,
Thierry Reding, Uwe Kleine-König, Nikita Shubin,
Linus Walleij, Sergey Shtylyov, Damien Le Moal
Cc: linux-arm-kernel, linux-kernel, linux-pwm, Arnd Bergmann,
Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Drop legacy gpio request/free since we are using
pinctrl for this now.
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
arch/arm/mach-ep93xx/core.c | 42 ---------------------------------------
drivers/pwm/pwm-ep93xx.c | 18 -----------------
include/linux/soc/cirrus/ep93xx.h | 4 ----
3 files changed, 64 deletions(-)
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index c60a9d3632dd..9afc6095d1c1 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -576,48 +576,6 @@ void __init ep93xx_register_pwm(int pwm0, int pwm1)
platform_device_register(&ep93xx_pwm1_device);
}
-int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
-{
- int err;
-
- if (pdev->id == 0) {
- err = 0;
- } else if (pdev->id == 1) {
- err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
- dev_name(&pdev->dev));
- if (err)
- return err;
- err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
- if (err)
- goto fail;
-
- /* PWM 1 output on EGPIO[14] */
- ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
- } else {
- err = -ENODEV;
- }
-
- return err;
-
-fail:
- gpio_free(EP93XX_GPIO_LINE_EGPIO14);
- return err;
-}
-EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
-
-void ep93xx_pwm_release_gpio(struct platform_device *pdev)
-{
- if (pdev->id == 1) {
- gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
- gpio_free(EP93XX_GPIO_LINE_EGPIO14);
-
- /* EGPIO[14] used for GPIO */
- ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
- }
-}
-EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
-
-
/*************************************************************************
* EP93xx video peripheral handling
*************************************************************************/
diff --git a/drivers/pwm/pwm-ep93xx.c b/drivers/pwm/pwm-ep93xx.c
index 361984ef4c0b..ac08bd0e7572 100644
--- a/drivers/pwm/pwm-ep93xx.c
+++ b/drivers/pwm/pwm-ep93xx.c
@@ -27,8 +27,6 @@
#include <asm/div64.h>
-#include <linux/soc/cirrus/ep93xx.h> /* for ep93xx_pwm_{acquire,release}_gpio() */
-
#define EP93XX_PWMx_TERM_COUNT 0x00
#define EP93XX_PWMx_DUTY_CYCLE 0x04
#define EP93XX_PWMx_ENABLE 0x08
@@ -45,20 +43,6 @@ static inline struct ep93xx_pwm *to_ep93xx_pwm(struct pwm_chip *chip)
return container_of(chip, struct ep93xx_pwm, chip);
}
-static int ep93xx_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
-{
- struct platform_device *pdev = to_platform_device(chip->dev);
-
- return ep93xx_pwm_acquire_gpio(pdev);
-}
-
-static void ep93xx_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
-{
- struct platform_device *pdev = to_platform_device(chip->dev);
-
- ep93xx_pwm_release_gpio(pdev);
-}
-
static int ep93xx_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
const struct pwm_state *state)
{
@@ -157,8 +141,6 @@ static int ep93xx_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
}
static const struct pwm_ops ep93xx_pwm_ops = {
- .request = ep93xx_pwm_request,
- .free = ep93xx_pwm_free,
.apply = ep93xx_pwm_apply,
.owner = THIS_MODULE,
};
diff --git a/include/linux/soc/cirrus/ep93xx.h b/include/linux/soc/cirrus/ep93xx.h
index 4327f66b7cf5..0df0f3322487 100644
--- a/include/linux/soc/cirrus/ep93xx.h
+++ b/include/linux/soc/cirrus/ep93xx.h
@@ -12,8 +12,6 @@ struct regmap;
#define EP93XX_CHIP_REV_E2 7
#if defined(CONFIG_EP93XX_SOC_COMMON)
-int ep93xx_pwm_acquire_gpio(struct platform_device *pdev);
-void ep93xx_pwm_release_gpio(struct platform_device *pdev);
int ep93xx_ide_acquire_gpio(struct platform_device *pdev);
void ep93xx_ide_release_gpio(struct platform_device *pdev);
int ep93xx_i2s_acquire(void);
@@ -21,8 +19,6 @@ void ep93xx_i2s_release(void);
unsigned int ep93xx_chip_revision(void);
#else
-static inline int ep93xx_pwm_acquire_gpio(struct platform_device *pdev) { return 0; }
-static inline void ep93xx_pwm_release_gpio(struct platform_device *pdev) {}
static inline int ep93xx_ide_acquire_gpio(struct platform_device *pdev) { return 0; }
static inline void ep93xx_ide_release_gpio(struct platform_device *pdev) {}
static inline int ep93xx_i2s_acquire(void) { return 0; }
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 37/42] pwm: ep93xx: drop legacy pinctrl
2023-09-15 8:11 ` [PATCH v4 37/42] pwm: ep93xx: drop legacy pinctrl Nikita Shubin via B4 Relay
@ 2023-09-15 8:46 ` Linus Walleij
0 siblings, 0 replies; 78+ messages in thread
From: Linus Walleij @ 2023-09-15 8:46 UTC (permalink / raw)
To: nikita.shubin
Cc: Hartley Sweeten, Alexander Sverdlin, Russell King,
Thierry Reding, Uwe Kleine-König, Sergey Shtylyov,
Damien Le Moal, linux-arm-kernel, linux-kernel, linux-pwm,
Arnd Bergmann
On Fri, Sep 15, 2023 at 10:12 AM Nikita Shubin via B4 Relay
<devnull+nikita.shubin.maquefel.me@kernel.org> wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Drop legacy gpio request/free since we are using
> pinctrl for this now.
>
> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> Acked-by: Thierry Reding <thierry.reding@gmail.com>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 38/42] ata: pata_ep93xx: remove legacy pinctrl use
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (36 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 37/42] pwm: ep93xx: drop legacy pinctrl Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:47 ` Linus Walleij
2023-09-15 8:11 ` [PATCH v4 39/42] ARM: ep93xx: delete all boardfiles Nikita Shubin via B4 Relay
` (5 subsequent siblings)
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Hartley Sweeten, Alexander Sverdlin, Russell King,
Sergey Shtylyov, Damien Le Moal, Nikita Shubin, Dmitry Torokhov,
Thierry Reding, Linus Walleij
Cc: Uwe Kleine-König, linux-arm-kernel, linux-kernel, linux-ide,
Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Drop legacy acquire/release since we are using pinctrl for this now.
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Acked-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
arch/arm/mach-ep93xx/core.c | 72 ---------------------------------------
drivers/ata/pata_ep93xx.c | 25 ++++----------
include/linux/soc/cirrus/ep93xx.h | 4 ---
3 files changed, 6 insertions(+), 95 deletions(-)
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 9afc6095d1c1..66dba9b4a6f9 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -778,78 +778,6 @@ void __init ep93xx_register_ide(void)
platform_device_register(&ep93xx_ide_device);
}
-int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
-{
- int err;
- int i;
-
- err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
- if (err)
- return err;
- err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
- if (err)
- goto fail_egpio15;
- for (i = 2; i < 8; i++) {
- err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
- if (err)
- goto fail_gpio_e;
- }
- for (i = 4; i < 8; i++) {
- err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
- if (err)
- goto fail_gpio_g;
- }
- for (i = 0; i < 8; i++) {
- err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
- if (err)
- goto fail_gpio_h;
- }
-
- /* GPIO ports E[7:2], G[7:4] and H used by IDE */
- ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
- EP93XX_SYSCON_DEVCFG_GONIDE |
- EP93XX_SYSCON_DEVCFG_HONIDE);
- return 0;
-
-fail_gpio_h:
- for (--i; i >= 0; --i)
- gpio_free(EP93XX_GPIO_LINE_H(i));
- i = 8;
-fail_gpio_g:
- for (--i; i >= 4; --i)
- gpio_free(EP93XX_GPIO_LINE_G(i));
- i = 8;
-fail_gpio_e:
- for (--i; i >= 2; --i)
- gpio_free(EP93XX_GPIO_LINE_E(i));
- gpio_free(EP93XX_GPIO_LINE_EGPIO15);
-fail_egpio15:
- gpio_free(EP93XX_GPIO_LINE_EGPIO2);
- return err;
-}
-EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
-
-void ep93xx_ide_release_gpio(struct platform_device *pdev)
-{
- int i;
-
- for (i = 2; i < 8; i++)
- gpio_free(EP93XX_GPIO_LINE_E(i));
- for (i = 4; i < 8; i++)
- gpio_free(EP93XX_GPIO_LINE_G(i));
- for (i = 0; i < 8; i++)
- gpio_free(EP93XX_GPIO_LINE_H(i));
- gpio_free(EP93XX_GPIO_LINE_EGPIO15);
- gpio_free(EP93XX_GPIO_LINE_EGPIO2);
-
-
- /* GPIO ports E[7:2], G[7:4] and H used by GPIO */
- ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
- EP93XX_SYSCON_DEVCFG_GONIDE |
- EP93XX_SYSCON_DEVCFG_HONIDE);
-}
-EXPORT_SYMBOL(ep93xx_ide_release_gpio);
-
/*************************************************************************
* EP93xx ADC
*************************************************************************/
diff --git a/drivers/ata/pata_ep93xx.c b/drivers/ata/pata_ep93xx.c
index 47686dc1fed6..bcf90e46bad4 100644
--- a/drivers/ata/pata_ep93xx.c
+++ b/drivers/ata/pata_ep93xx.c
@@ -928,28 +928,18 @@ static int ep93xx_pata_probe(struct platform_device *pdev)
void __iomem *ide_base;
int err;
- err = ep93xx_ide_acquire_gpio(pdev);
- if (err)
- return err;
-
/* INT[3] (IRQ_EP93XX_EXT3) line connected as pull down */
irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
- err = irq;
- goto err_rel_gpio;
- }
+ if (irq < 0)
+ return irq;
ide_base = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
- if (IS_ERR(ide_base)) {
- err = PTR_ERR(ide_base);
- goto err_rel_gpio;
- }
+ if (IS_ERR(ide_base))
+ return PTR_ERR(ide_base);
drv_data = devm_kzalloc(&pdev->dev, sizeof(*drv_data), GFP_KERNEL);
- if (!drv_data) {
- err = -ENOMEM;
- goto err_rel_gpio;
- }
+ if (!drv_data)
+ return -ENOMEM;
drv_data->pdev = pdev;
drv_data->ide_base = ide_base;
@@ -1006,8 +996,6 @@ static int ep93xx_pata_probe(struct platform_device *pdev)
err_rel_dma:
ep93xx_pata_release_dma(drv_data);
-err_rel_gpio:
- ep93xx_ide_release_gpio(pdev);
return err;
}
@@ -1019,7 +1007,6 @@ static int ep93xx_pata_remove(struct platform_device *pdev)
ata_host_detach(host);
ep93xx_pata_release_dma(drv_data);
ep93xx_pata_clear_regs(drv_data->ide_base);
- ep93xx_ide_release_gpio(pdev);
return 0;
}
diff --git a/include/linux/soc/cirrus/ep93xx.h b/include/linux/soc/cirrus/ep93xx.h
index 0df0f3322487..3212a145ae0f 100644
--- a/include/linux/soc/cirrus/ep93xx.h
+++ b/include/linux/soc/cirrus/ep93xx.h
@@ -12,15 +12,11 @@ struct regmap;
#define EP93XX_CHIP_REV_E2 7
#if defined(CONFIG_EP93XX_SOC_COMMON)
-int ep93xx_ide_acquire_gpio(struct platform_device *pdev);
-void ep93xx_ide_release_gpio(struct platform_device *pdev);
int ep93xx_i2s_acquire(void);
void ep93xx_i2s_release(void);
unsigned int ep93xx_chip_revision(void);
#else
-static inline int ep93xx_ide_acquire_gpio(struct platform_device *pdev) { return 0; }
-static inline void ep93xx_ide_release_gpio(struct platform_device *pdev) {}
static inline int ep93xx_i2s_acquire(void) { return 0; }
static inline void ep93xx_i2s_release(void) {}
static inline unsigned int ep93xx_chip_revision(void) { return 0; }
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 38/42] ata: pata_ep93xx: remove legacy pinctrl use
2023-09-15 8:11 ` [PATCH v4 38/42] ata: pata_ep93xx: remove legacy pinctrl use Nikita Shubin via B4 Relay
@ 2023-09-15 8:47 ` Linus Walleij
0 siblings, 0 replies; 78+ messages in thread
From: Linus Walleij @ 2023-09-15 8:47 UTC (permalink / raw)
To: nikita.shubin
Cc: Hartley Sweeten, Alexander Sverdlin, Russell King,
Sergey Shtylyov, Damien Le Moal, Dmitry Torokhov, Thierry Reding,
Uwe Kleine-König, linux-arm-kernel, linux-kernel, linux-ide,
Arnd Bergmann
On Fri, Sep 15, 2023 at 10:12 AM Nikita Shubin via B4 Relay
<devnull+nikita.shubin.maquefel.me@kernel.org> wrote:
> From: Nikita Shubin <nikita.shubin@maquefel.me>
>
> Drop legacy acquire/release since we are using pinctrl for this now.
>
> Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
> Acked-by: Damien Le Moal <dlemoal@kernel.org>
> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH v4 39/42] ARM: ep93xx: delete all boardfiles
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (37 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 38/42] ata: pata_ep93xx: remove legacy pinctrl use Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:11 ` [PATCH v4 40/42] ARM: ep93xx: soc: drop defines Nikita Shubin via B4 Relay
` (4 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Hartley Sweeten, Alexander Sverdlin, Russell King, Lukasz Majewski
Cc: linux-arm-kernel, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Delete the ep93xx board files.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
arch/arm/mach-ep93xx/clock.c | 733 ---------------------------
arch/arm/mach-ep93xx/core.c | 954 -----------------------------------
arch/arm/mach-ep93xx/dma.c | 114 -----
arch/arm/mach-ep93xx/edb93xx.c | 344 -------------
arch/arm/mach-ep93xx/ep93xx-regs.h | 38 --
arch/arm/mach-ep93xx/gpio-ep93xx.h | 111 ----
arch/arm/mach-ep93xx/hardware.h | 25 -
arch/arm/mach-ep93xx/irqs.h | 76 ---
arch/arm/mach-ep93xx/platform.h | 42 --
arch/arm/mach-ep93xx/soc.h | 212 --------
arch/arm/mach-ep93xx/timer-ep93xx.c | 143 ------
arch/arm/mach-ep93xx/ts72xx.c | 422 ----------------
arch/arm/mach-ep93xx/ts72xx.h | 94 ----
arch/arm/mach-ep93xx/vision_ep9307.c | 311 ------------
14 files changed, 3619 deletions(-)
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
deleted file mode 100644
index 85a496ddc619..000000000000
--- a/arch/arm/mach-ep93xx/clock.c
+++ /dev/null
@@ -1,733 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * arch/arm/mach-ep93xx/clock.c
- * Clock control for Cirrus EP93xx chips.
- *
- * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
- */
-
-#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
-
-#include <linux/kernel.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/io.h>
-#include <linux/spinlock.h>
-#include <linux/clkdev.h>
-#include <linux/clk-provider.h>
-#include <linux/soc/cirrus/ep93xx.h>
-
-#include "hardware.h"
-
-#include <asm/div64.h>
-
-#include "soc.h"
-
-static DEFINE_SPINLOCK(clk_lock);
-
-static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
-static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
-static char pclk_divisors[] = { 1, 2, 4, 8 };
-
-static char adc_divisors[] = { 16, 4 };
-static char sclk_divisors[] = { 2, 4 };
-static char lrclk_divisors[] = { 32, 64, 128 };
-
-static const char * const mux_parents[] = {
- "xtali",
- "pll1",
- "pll2"
-};
-
-/*
- * PLL rate = 14.7456 MHz * (X1FBD + 1) * (X2FBD + 1) / (X2IPD + 1) / 2^PS
- */
-static unsigned long calc_pll_rate(unsigned long long rate, u32 config_word)
-{
- int i;
-
- rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */
- rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */
- do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */
- for (i = 0; i < ((config_word >> 16) & 3); i++) /* PS */
- rate >>= 1;
-
- return (unsigned long)rate;
-}
-
-struct clk_psc {
- struct clk_hw hw;
- void __iomem *reg;
- u8 bit_idx;
- u32 mask;
- u8 shift;
- u8 width;
- char *div;
- u8 num_div;
- spinlock_t *lock;
-};
-
-#define to_clk_psc(_hw) container_of(_hw, struct clk_psc, hw)
-
-static int ep93xx_clk_is_enabled(struct clk_hw *hw)
-{
- struct clk_psc *psc = to_clk_psc(hw);
- u32 val = readl(psc->reg);
-
- return (val & BIT(psc->bit_idx)) ? 1 : 0;
-}
-
-static int ep93xx_clk_enable(struct clk_hw *hw)
-{
- struct clk_psc *psc = to_clk_psc(hw);
- unsigned long flags = 0;
- u32 val;
-
- if (psc->lock)
- spin_lock_irqsave(psc->lock, flags);
-
- val = __raw_readl(psc->reg);
- val |= BIT(psc->bit_idx);
-
- ep93xx_syscon_swlocked_write(val, psc->reg);
-
- if (psc->lock)
- spin_unlock_irqrestore(psc->lock, flags);
-
- return 0;
-}
-
-static void ep93xx_clk_disable(struct clk_hw *hw)
-{
- struct clk_psc *psc = to_clk_psc(hw);
- unsigned long flags = 0;
- u32 val;
-
- if (psc->lock)
- spin_lock_irqsave(psc->lock, flags);
-
- val = __raw_readl(psc->reg);
- val &= ~BIT(psc->bit_idx);
-
- ep93xx_syscon_swlocked_write(val, psc->reg);
-
- if (psc->lock)
- spin_unlock_irqrestore(psc->lock, flags);
-}
-
-static const struct clk_ops clk_ep93xx_gate_ops = {
- .enable = ep93xx_clk_enable,
- .disable = ep93xx_clk_disable,
- .is_enabled = ep93xx_clk_is_enabled,
-};
-
-static struct clk_hw *ep93xx_clk_register_gate(const char *name,
- const char *parent_name,
- void __iomem *reg,
- u8 bit_idx)
-{
- struct clk_init_data init;
- struct clk_psc *psc;
- struct clk *clk;
-
- psc = kzalloc(sizeof(*psc), GFP_KERNEL);
- if (!psc)
- return ERR_PTR(-ENOMEM);
-
- init.name = name;
- init.ops = &clk_ep93xx_gate_ops;
- init.flags = CLK_SET_RATE_PARENT;
- init.parent_names = (parent_name ? &parent_name : NULL);
- init.num_parents = (parent_name ? 1 : 0);
-
- psc->reg = reg;
- psc->bit_idx = bit_idx;
- psc->hw.init = &init;
- psc->lock = &clk_lock;
-
- clk = clk_register(NULL, &psc->hw);
- if (IS_ERR(clk)) {
- kfree(psc);
- return ERR_CAST(clk);
- }
-
- return &psc->hw;
-}
-
-static u8 ep93xx_mux_get_parent(struct clk_hw *hw)
-{
- struct clk_psc *psc = to_clk_psc(hw);
- u32 val = __raw_readl(psc->reg);
-
- if (!(val & EP93XX_SYSCON_CLKDIV_ESEL))
- return 0;
-
- if (!(val & EP93XX_SYSCON_CLKDIV_PSEL))
- return 1;
-
- return 2;
-}
-
-static int ep93xx_mux_set_parent_lock(struct clk_hw *hw, u8 index)
-{
- struct clk_psc *psc = to_clk_psc(hw);
- unsigned long flags = 0;
- u32 val;
-
- if (index >= ARRAY_SIZE(mux_parents))
- return -EINVAL;
-
- if (psc->lock)
- spin_lock_irqsave(psc->lock, flags);
-
- val = __raw_readl(psc->reg);
- val &= ~(EP93XX_SYSCON_CLKDIV_ESEL | EP93XX_SYSCON_CLKDIV_PSEL);
-
-
- if (index != 0) {
- val |= EP93XX_SYSCON_CLKDIV_ESEL;
- val |= (index - 1) ? EP93XX_SYSCON_CLKDIV_PSEL : 0;
- }
-
- ep93xx_syscon_swlocked_write(val, psc->reg);
-
- if (psc->lock)
- spin_unlock_irqrestore(psc->lock, flags);
-
- return 0;
-}
-
-static bool is_best(unsigned long rate, unsigned long now,
- unsigned long best)
-{
- return abs(rate - now) < abs(rate - best);
-}
-
-static int ep93xx_mux_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
-{
- unsigned long rate = req->rate;
- struct clk *best_parent = NULL;
- unsigned long __parent_rate;
- unsigned long best_rate = 0, actual_rate, mclk_rate;
- unsigned long best_parent_rate;
- int __div = 0, __pdiv = 0;
- int i;
-
- /*
- * Try the two pll's and the external clock
- * Because the valid predividers are 2, 2.5 and 3, we multiply
- * all the clocks by 2 to avoid floating point math.
- *
- * This is based on the algorithm in the ep93xx raster guide:
- * http://be-a-maverick.com/en/pubs/appNote/AN269REV1.pdf
- *
- */
- for (i = 0; i < ARRAY_SIZE(mux_parents); i++) {
- struct clk *parent = clk_get_sys(mux_parents[i], NULL);
-
- __parent_rate = clk_get_rate(parent);
- mclk_rate = __parent_rate * 2;
-
- /* Try each predivider value */
- for (__pdiv = 4; __pdiv <= 6; __pdiv++) {
- __div = mclk_rate / (rate * __pdiv);
- if (__div < 2 || __div > 127)
- continue;
-
- actual_rate = mclk_rate / (__pdiv * __div);
- if (is_best(rate, actual_rate, best_rate)) {
- best_rate = actual_rate;
- best_parent_rate = __parent_rate;
- best_parent = parent;
- }
- }
- }
-
- if (!best_parent)
- return -EINVAL;
-
- req->best_parent_rate = best_parent_rate;
- req->best_parent_hw = __clk_get_hw(best_parent);
- req->rate = best_rate;
-
- return 0;
-}
-
-static unsigned long ep93xx_ddiv_recalc_rate(struct clk_hw *hw,
- unsigned long parent_rate)
-{
- struct clk_psc *psc = to_clk_psc(hw);
- unsigned long rate = 0;
- u32 val = __raw_readl(psc->reg);
- int __pdiv = ((val >> EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) & 0x03);
- int __div = val & 0x7f;
-
- if (__div > 0)
- rate = (parent_rate * 2) / ((__pdiv + 3) * __div);
-
- return rate;
-}
-
-static int ep93xx_ddiv_set_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long parent_rate)
-{
- struct clk_psc *psc = to_clk_psc(hw);
- int pdiv = 0, div = 0;
- unsigned long best_rate = 0, actual_rate, mclk_rate;
- int __div = 0, __pdiv = 0;
- u32 val;
-
- mclk_rate = parent_rate * 2;
-
- for (__pdiv = 4; __pdiv <= 6; __pdiv++) {
- __div = mclk_rate / (rate * __pdiv);
- if (__div < 2 || __div > 127)
- continue;
-
- actual_rate = mclk_rate / (__pdiv * __div);
- if (is_best(rate, actual_rate, best_rate)) {
- pdiv = __pdiv - 3;
- div = __div;
- best_rate = actual_rate;
- }
- }
-
- if (!best_rate)
- return -EINVAL;
-
- val = __raw_readl(psc->reg);
-
- /* Clear old dividers */
- val &= ~0x37f;
-
- /* Set the new pdiv and div bits for the new clock rate */
- val |= (pdiv << EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) | div;
- ep93xx_syscon_swlocked_write(val, psc->reg);
-
- return 0;
-}
-
-static const struct clk_ops clk_ddiv_ops = {
- .enable = ep93xx_clk_enable,
- .disable = ep93xx_clk_disable,
- .is_enabled = ep93xx_clk_is_enabled,
- .get_parent = ep93xx_mux_get_parent,
- .set_parent = ep93xx_mux_set_parent_lock,
- .determine_rate = ep93xx_mux_determine_rate,
- .recalc_rate = ep93xx_ddiv_recalc_rate,
- .set_rate = ep93xx_ddiv_set_rate,
-};
-
-static struct clk_hw *clk_hw_register_ddiv(const char *name,
- void __iomem *reg,
- u8 bit_idx)
-{
- struct clk_init_data init;
- struct clk_psc *psc;
- struct clk *clk;
-
- psc = kzalloc(sizeof(*psc), GFP_KERNEL);
- if (!psc)
- return ERR_PTR(-ENOMEM);
-
- init.name = name;
- init.ops = &clk_ddiv_ops;
- init.flags = 0;
- init.parent_names = mux_parents;
- init.num_parents = ARRAY_SIZE(mux_parents);
-
- psc->reg = reg;
- psc->bit_idx = bit_idx;
- psc->lock = &clk_lock;
- psc->hw.init = &init;
-
- clk = clk_register(NULL, &psc->hw);
- if (IS_ERR(clk)) {
- kfree(psc);
- return ERR_CAST(clk);
- }
- return &psc->hw;
-}
-
-static unsigned long ep93xx_div_recalc_rate(struct clk_hw *hw,
- unsigned long parent_rate)
-{
- struct clk_psc *psc = to_clk_psc(hw);
- u32 val = __raw_readl(psc->reg);
- u8 index = (val & psc->mask) >> psc->shift;
-
- if (index > psc->num_div)
- return 0;
-
- return DIV_ROUND_UP_ULL(parent_rate, psc->div[index]);
-}
-
-static long ep93xx_div_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *parent_rate)
-{
- struct clk_psc *psc = to_clk_psc(hw);
- unsigned long best = 0, now, maxdiv;
- int i;
-
- maxdiv = psc->div[psc->num_div - 1];
-
- for (i = 0; i < psc->num_div; i++) {
- if ((rate * psc->div[i]) == *parent_rate)
- return DIV_ROUND_UP_ULL((u64)*parent_rate, psc->div[i]);
-
- now = DIV_ROUND_UP_ULL((u64)*parent_rate, psc->div[i]);
-
- if (is_best(rate, now, best))
- best = now;
- }
-
- if (!best)
- best = DIV_ROUND_UP_ULL(*parent_rate, maxdiv);
-
- return best;
-}
-
-static int ep93xx_div_set_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long parent_rate)
-{
- struct clk_psc *psc = to_clk_psc(hw);
- u32 val = __raw_readl(psc->reg) & ~psc->mask;
- int i;
-
- for (i = 0; i < psc->num_div; i++)
- if (rate == parent_rate / psc->div[i]) {
- val |= i << psc->shift;
- break;
- }
-
- if (i == psc->num_div)
- return -EINVAL;
-
- ep93xx_syscon_swlocked_write(val, psc->reg);
-
- return 0;
-}
-
-static const struct clk_ops ep93xx_div_ops = {
- .enable = ep93xx_clk_enable,
- .disable = ep93xx_clk_disable,
- .is_enabled = ep93xx_clk_is_enabled,
- .recalc_rate = ep93xx_div_recalc_rate,
- .round_rate = ep93xx_div_round_rate,
- .set_rate = ep93xx_div_set_rate,
-};
-
-static struct clk_hw *clk_hw_register_div(const char *name,
- const char *parent_name,
- void __iomem *reg,
- u8 enable_bit,
- u8 shift,
- u8 width,
- char *clk_divisors,
- u8 num_div)
-{
- struct clk_init_data init;
- struct clk_psc *psc;
- struct clk *clk;
-
- psc = kzalloc(sizeof(*psc), GFP_KERNEL);
- if (!psc)
- return ERR_PTR(-ENOMEM);
-
- init.name = name;
- init.ops = &ep93xx_div_ops;
- init.flags = 0;
- init.parent_names = (parent_name ? &parent_name : NULL);
- init.num_parents = 1;
-
- psc->reg = reg;
- psc->bit_idx = enable_bit;
- psc->mask = GENMASK(shift + width - 1, shift);
- psc->shift = shift;
- psc->div = clk_divisors;
- psc->num_div = num_div;
- psc->lock = &clk_lock;
- psc->hw.init = &init;
-
- clk = clk_register(NULL, &psc->hw);
- if (IS_ERR(clk)) {
- kfree(psc);
- return ERR_CAST(clk);
- }
- return &psc->hw;
-}
-
-struct ep93xx_gate {
- unsigned int bit;
- const char *dev_id;
- const char *con_id;
-};
-
-static struct ep93xx_gate ep93xx_uarts[] = {
- {EP93XX_SYSCON_DEVCFG_U1EN, "apb:uart1", NULL},
- {EP93XX_SYSCON_DEVCFG_U2EN, "apb:uart2", NULL},
- {EP93XX_SYSCON_DEVCFG_U3EN, "apb:uart3", NULL},
-};
-
-static void __init ep93xx_uart_clock_init(void)
-{
- unsigned int i;
- struct clk_hw *hw;
- u32 value;
- unsigned int clk_uart_div;
-
- value = __raw_readl(EP93XX_SYSCON_PWRCNT);
- if (value & EP93XX_SYSCON_PWRCNT_UARTBAUD)
- clk_uart_div = 1;
- else
- clk_uart_div = 2;
-
- hw = clk_hw_register_fixed_factor(NULL, "uart", "xtali", 0, 1, clk_uart_div);
-
- /* parenting uart gate clocks to uart clock */
- for (i = 0; i < ARRAY_SIZE(ep93xx_uarts); i++) {
- hw = ep93xx_clk_register_gate(ep93xx_uarts[i].dev_id,
- "uart",
- EP93XX_SYSCON_DEVCFG,
- ep93xx_uarts[i].bit);
-
- clk_hw_register_clkdev(hw, NULL, ep93xx_uarts[i].dev_id);
- }
-}
-
-static struct ep93xx_gate ep93xx_dmas[] = {
- {EP93XX_SYSCON_PWRCNT_DMA_M2P0, NULL, "m2p0"},
- {EP93XX_SYSCON_PWRCNT_DMA_M2P1, NULL, "m2p1"},
- {EP93XX_SYSCON_PWRCNT_DMA_M2P2, NULL, "m2p2"},
- {EP93XX_SYSCON_PWRCNT_DMA_M2P3, NULL, "m2p3"},
- {EP93XX_SYSCON_PWRCNT_DMA_M2P4, NULL, "m2p4"},
- {EP93XX_SYSCON_PWRCNT_DMA_M2P5, NULL, "m2p5"},
- {EP93XX_SYSCON_PWRCNT_DMA_M2P6, NULL, "m2p6"},
- {EP93XX_SYSCON_PWRCNT_DMA_M2P7, NULL, "m2p7"},
- {EP93XX_SYSCON_PWRCNT_DMA_M2P8, NULL, "m2p8"},
- {EP93XX_SYSCON_PWRCNT_DMA_M2P9, NULL, "m2p9"},
- {EP93XX_SYSCON_PWRCNT_DMA_M2M0, NULL, "m2m0"},
- {EP93XX_SYSCON_PWRCNT_DMA_M2M1, NULL, "m2m1"},
-};
-
-static void __init ep93xx_dma_clock_init(void)
-{
- unsigned int i;
- struct clk_hw *hw;
- int ret;
-
- for (i = 0; i < ARRAY_SIZE(ep93xx_dmas); i++) {
- hw = clk_hw_register_gate(NULL, ep93xx_dmas[i].con_id,
- "hclk", 0,
- EP93XX_SYSCON_PWRCNT,
- ep93xx_dmas[i].bit,
- 0,
- &clk_lock);
-
- ret = clk_hw_register_clkdev(hw, ep93xx_dmas[i].con_id, NULL);
- if (ret)
- pr_err("%s: failed to register lookup %s\n",
- __func__, ep93xx_dmas[i].con_id);
- }
-}
-
-static int __init ep93xx_clock_init(void)
-{
- u32 value;
- struct clk_hw *hw;
- unsigned long clk_pll1_rate;
- unsigned long clk_f_rate;
- unsigned long clk_h_rate;
- unsigned long clk_p_rate;
- unsigned long clk_pll2_rate;
- unsigned int clk_f_div;
- unsigned int clk_h_div;
- unsigned int clk_p_div;
- unsigned int clk_usb_div;
- unsigned long clk_spi_div;
-
- hw = clk_hw_register_fixed_rate(NULL, "xtali", NULL, 0, EP93XX_EXT_CLK_RATE);
- clk_hw_register_clkdev(hw, NULL, "xtali");
-
- /* Determine the bootloader configured pll1 rate */
- value = __raw_readl(EP93XX_SYSCON_CLKSET1);
- if (!(value & EP93XX_SYSCON_CLKSET1_NBYP1))
- clk_pll1_rate = EP93XX_EXT_CLK_RATE;
- else
- clk_pll1_rate = calc_pll_rate(EP93XX_EXT_CLK_RATE, value);
-
- hw = clk_hw_register_fixed_rate(NULL, "pll1", "xtali", 0, clk_pll1_rate);
- clk_hw_register_clkdev(hw, NULL, "pll1");
-
- /* Initialize the pll1 derived clocks */
- clk_f_div = fclk_divisors[(value >> 25) & 0x7];
- clk_h_div = hclk_divisors[(value >> 20) & 0x7];
- clk_p_div = pclk_divisors[(value >> 18) & 0x3];
-
- hw = clk_hw_register_fixed_factor(NULL, "fclk", "pll1", 0, 1, clk_f_div);
- clk_f_rate = clk_get_rate(hw->clk);
- hw = clk_hw_register_fixed_factor(NULL, "hclk", "pll1", 0, 1, clk_h_div);
- clk_h_rate = clk_get_rate(hw->clk);
- hw = clk_hw_register_fixed_factor(NULL, "pclk", "hclk", 0, 1, clk_p_div);
- clk_p_rate = clk_get_rate(hw->clk);
-
- clk_hw_register_clkdev(hw, "apb_pclk", NULL);
-
- ep93xx_dma_clock_init();
-
- /* Determine the bootloader configured pll2 rate */
- value = __raw_readl(EP93XX_SYSCON_CLKSET2);
- if (!(value & EP93XX_SYSCON_CLKSET2_NBYP2))
- clk_pll2_rate = EP93XX_EXT_CLK_RATE;
- else if (value & EP93XX_SYSCON_CLKSET2_PLL2_EN)
- clk_pll2_rate = calc_pll_rate(EP93XX_EXT_CLK_RATE, value);
- else
- clk_pll2_rate = 0;
-
- hw = clk_hw_register_fixed_rate(NULL, "pll2", "xtali", 0, clk_pll2_rate);
- clk_hw_register_clkdev(hw, NULL, "pll2");
-
- /* Initialize the pll2 derived clocks */
- /*
- * These four bits set the divide ratio between the PLL2
- * output and the USB clock.
- * 0000 - Divide by 1
- * 0001 - Divide by 2
- * 0010 - Divide by 3
- * 0011 - Divide by 4
- * 0100 - Divide by 5
- * 0101 - Divide by 6
- * 0110 - Divide by 7
- * 0111 - Divide by 8
- * 1000 - Divide by 9
- * 1001 - Divide by 10
- * 1010 - Divide by 11
- * 1011 - Divide by 12
- * 1100 - Divide by 13
- * 1101 - Divide by 14
- * 1110 - Divide by 15
- * 1111 - Divide by 1
- * On power-on-reset these bits are reset to 0000b.
- */
- clk_usb_div = (((value >> 28) & 0xf) + 1);
- hw = clk_hw_register_fixed_factor(NULL, "usb_clk", "pll2", 0, 1, clk_usb_div);
- hw = clk_hw_register_gate(NULL, "ohci-platform",
- "usb_clk", 0,
- EP93XX_SYSCON_PWRCNT,
- EP93XX_SYSCON_PWRCNT_USH_EN,
- 0,
- &clk_lock);
- clk_hw_register_clkdev(hw, NULL, "ohci-platform");
-
- /*
- * EP93xx SSP clock rate was doubled in version E2. For more information
- * see:
- * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf
- */
- clk_spi_div = 1;
- if (ep93xx_chip_revision() < EP93XX_CHIP_REV_E2)
- clk_spi_div = 2;
- hw = clk_hw_register_fixed_factor(NULL, "ep93xx-spi.0", "xtali", 0, 1, clk_spi_div);
- clk_hw_register_clkdev(hw, NULL, "ep93xx-spi.0");
-
- /* pwm clock */
- hw = clk_hw_register_fixed_factor(NULL, "pwm_clk", "xtali", 0, 1, 1);
- clk_hw_register_clkdev(hw, "pwm_clk", NULL);
-
- pr_info("PLL1 running at %ld MHz, PLL2 at %ld MHz\n",
- clk_pll1_rate / 1000000, clk_pll2_rate / 1000000);
- pr_info("FCLK %ld MHz, HCLK %ld MHz, PCLK %ld MHz\n",
- clk_f_rate / 1000000, clk_h_rate / 1000000,
- clk_p_rate / 1000000);
-
- ep93xx_uart_clock_init();
-
- /* touchscreen/adc clock */
- hw = clk_hw_register_div("ep93xx-adc",
- "xtali",
- EP93XX_SYSCON_KEYTCHCLKDIV,
- EP93XX_SYSCON_KEYTCHCLKDIV_TSEN,
- EP93XX_SYSCON_KEYTCHCLKDIV_ADIV,
- 1,
- adc_divisors,
- ARRAY_SIZE(adc_divisors));
-
- clk_hw_register_clkdev(hw, NULL, "ep93xx-adc");
-
- /* keypad clock */
- hw = clk_hw_register_div("ep93xx-keypad",
- "xtali",
- EP93XX_SYSCON_KEYTCHCLKDIV,
- EP93XX_SYSCON_KEYTCHCLKDIV_KEN,
- EP93XX_SYSCON_KEYTCHCLKDIV_KDIV,
- 1,
- adc_divisors,
- ARRAY_SIZE(adc_divisors));
-
- clk_hw_register_clkdev(hw, NULL, "ep93xx-keypad");
-
- /* On reset PDIV and VDIV is set to zero, while PDIV zero
- * means clock disable, VDIV shouldn't be zero.
- * So i set both dividers to minimum.
- */
- /* ENA - Enable CLK divider. */
- /* PDIV - 00 - Disable clock */
- /* VDIV - at least 2 */
- /* Check and enable video clk registers */
- value = __raw_readl(EP93XX_SYSCON_VIDCLKDIV);
- value |= (1 << EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) | 2;
- ep93xx_syscon_swlocked_write(value, EP93XX_SYSCON_VIDCLKDIV);
-
- /* check and enable i2s clk registers */
- value = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
- value |= (1 << EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) | 2;
- ep93xx_syscon_swlocked_write(value, EP93XX_SYSCON_I2SCLKDIV);
-
- /* video clk */
- hw = clk_hw_register_ddiv("ep93xx-fb",
- EP93XX_SYSCON_VIDCLKDIV,
- EP93XX_SYSCON_CLKDIV_ENABLE);
-
- clk_hw_register_clkdev(hw, NULL, "ep93xx-fb");
-
- /* i2s clk */
- hw = clk_hw_register_ddiv("mclk",
- EP93XX_SYSCON_I2SCLKDIV,
- EP93XX_SYSCON_CLKDIV_ENABLE);
-
- clk_hw_register_clkdev(hw, "mclk", "ep93xx-i2s");
-
- /* i2s sclk */
-#define EP93XX_I2SCLKDIV_SDIV_SHIFT 16
-#define EP93XX_I2SCLKDIV_SDIV_WIDTH 1
- hw = clk_hw_register_div("sclk",
- "mclk",
- EP93XX_SYSCON_I2SCLKDIV,
- EP93XX_SYSCON_I2SCLKDIV_SENA,
- EP93XX_I2SCLKDIV_SDIV_SHIFT,
- EP93XX_I2SCLKDIV_SDIV_WIDTH,
- sclk_divisors,
- ARRAY_SIZE(sclk_divisors));
-
- clk_hw_register_clkdev(hw, "sclk", "ep93xx-i2s");
-
- /* i2s lrclk */
-#define EP93XX_I2SCLKDIV_LRDIV32_SHIFT 17
-#define EP93XX_I2SCLKDIV_LRDIV32_WIDTH 3
- hw = clk_hw_register_div("lrclk",
- "sclk",
- EP93XX_SYSCON_I2SCLKDIV,
- EP93XX_SYSCON_I2SCLKDIV_SENA,
- EP93XX_I2SCLKDIV_LRDIV32_SHIFT,
- EP93XX_I2SCLKDIV_LRDIV32_WIDTH,
- lrclk_divisors,
- ARRAY_SIZE(lrclk_divisors));
-
- clk_hw_register_clkdev(hw, "lrclk", "ep93xx-i2s");
-
- return 0;
-}
-postcore_initcall(ep93xx_clock_init);
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
deleted file mode 100644
index 66dba9b4a6f9..000000000000
--- a/arch/arm/mach-ep93xx/core.c
+++ /dev/null
@@ -1,954 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * arch/arm/mach-ep93xx/core.c
- * Core routines for Cirrus EP93xx chips.
- *
- * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
- * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
- *
- * Thanks go to Michael Burian and Ray Lehtiniemi for their key
- * role in the ep93xx linux community.
- */
-
-#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/interrupt.h>
-#include <linux/dma-mapping.h>
-#include <linux/sys_soc.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <linux/uaccess.h>
-#include <linux/termios.h>
-#include <linux/amba/bus.h>
-#include <linux/amba/serial.h>
-#include <linux/mtd/physmap.h>
-#include <linux/i2c.h>
-#include <linux/gpio/machine.h>
-#include <linux/spi/spi.h>
-#include <linux/export.h>
-#include <linux/irqchip/arm-vic.h>
-#include <linux/reboot.h>
-#include <linux/usb/ohci_pdriver.h>
-#include <linux/random.h>
-#include <linux/ioport.h>
-
-#include "hardware.h"
-#include <linux/platform_data/video-ep93xx.h>
-#include <linux/platform_data/keypad-ep93xx.h>
-#include <linux/platform_data/spi-ep93xx.h>
-#include <linux/soc/cirrus/ep93xx.h>
-
-#include "gpio-ep93xx.h"
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include "soc.h"
-#include "irqs.h"
-
-/*************************************************************************
- * Static I/O mappings that are needed for all EP93xx platforms
- *************************************************************************/
-static struct map_desc ep93xx_io_desc[] __initdata = {
- {
- .virtual = EP93XX_AHB_VIRT_BASE,
- .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
- .length = EP93XX_AHB_SIZE,
- .type = MT_DEVICE,
- }, {
- .virtual = EP93XX_APB_VIRT_BASE,
- .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
- .length = EP93XX_APB_SIZE,
- .type = MT_DEVICE,
- },
-};
-
-void __init ep93xx_map_io(void)
-{
- iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
-}
-
-/*************************************************************************
- * EP93xx IRQ handling
- *************************************************************************/
-void __init ep93xx_init_irq(void)
-{
- vic_init(EP93XX_VIC1_BASE, IRQ_EP93XX_VIC0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
- vic_init(EP93XX_VIC2_BASE, IRQ_EP93XX_VIC1, EP93XX_VIC2_VALID_IRQ_MASK, 0);
-}
-
-
-/*************************************************************************
- * EP93xx System Controller Software Locked register handling
- *************************************************************************/
-
-/*
- * syscon_swlock prevents anything else from writing to the syscon
- * block while a software locked register is being written.
- */
-static DEFINE_SPINLOCK(syscon_swlock);
-
-void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&syscon_swlock, flags);
-
- __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
- __raw_writel(val, reg);
-
- spin_unlock_irqrestore(&syscon_swlock, flags);
-}
-
-void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
-{
- unsigned long flags;
- unsigned int val;
-
- spin_lock_irqsave(&syscon_swlock, flags);
-
- val = __raw_readl(EP93XX_SYSCON_DEVCFG);
- val &= ~clear_bits;
- val |= set_bits;
- __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
- __raw_writel(val, EP93XX_SYSCON_DEVCFG);
-
- spin_unlock_irqrestore(&syscon_swlock, flags);
-}
-
-/**
- * ep93xx_chip_revision() - returns the EP93xx chip revision
- *
- * See "platform.h" for more information.
- */
-unsigned int ep93xx_chip_revision(void)
-{
- unsigned int v;
-
- v = __raw_readl(EP93XX_SYSCON_SYSCFG);
- v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
- v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
- return v;
-}
-EXPORT_SYMBOL_GPL(ep93xx_chip_revision);
-
-/*************************************************************************
- * EP93xx GPIO
- *************************************************************************/
-/* port A */
-static struct resource ep93xx_a_gpio_resources[] = {
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE, 0x04, "data"),
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x10, 0x04, "dir"),
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x90, 0x1c, "intr"),
- DEFINE_RES_IRQ(IRQ_EP93XX_GPIO_AB),
-};
-
-static struct platform_device ep93xx_a_gpio = {
- .name = "gpio-ep93xx",
- .id = 0,
- .num_resources = ARRAY_SIZE(ep93xx_a_gpio_resources),
- .resource = ep93xx_a_gpio_resources,
-};
-
-/* port B */
-static struct resource ep93xx_b_gpio_resources[] = {
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x04, 0x04, "data"),
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x14, 0x04, "dir"),
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0xac, 0x1c, "intr"),
- DEFINE_RES_IRQ(IRQ_EP93XX_GPIO_AB),
-};
-
-static struct platform_device ep93xx_b_gpio = {
- .name = "gpio-ep93xx",
- .id = 1,
- .num_resources = ARRAY_SIZE(ep93xx_b_gpio_resources),
- .resource = ep93xx_b_gpio_resources,
-};
-
-/* port C */
-static struct resource ep93xx_c_gpio_resources[] = {
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x08, 0x04, "data"),
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x18, 0x04, "dir"),
-};
-
-static struct platform_device ep93xx_c_gpio = {
- .name = "gpio-ep93xx",
- .id = 2,
- .num_resources = ARRAY_SIZE(ep93xx_c_gpio_resources),
- .resource = ep93xx_c_gpio_resources,
-};
-
-/* port D */
-static struct resource ep93xx_d_gpio_resources[] = {
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x0c, 0x04, "data"),
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x1c, 0x04, "dir"),
-};
-
-static struct platform_device ep93xx_d_gpio = {
- .name = "gpio-ep93xx",
- .id = 3,
- .num_resources = ARRAY_SIZE(ep93xx_d_gpio_resources),
- .resource = ep93xx_d_gpio_resources,
-};
-
-/* port E */
-static struct resource ep93xx_e_gpio_resources[] = {
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x20, 0x04, "data"),
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x24, 0x04, "dir"),
-};
-
-static struct platform_device ep93xx_e_gpio = {
- .name = "gpio-ep93xx",
- .id = 4,
- .num_resources = ARRAY_SIZE(ep93xx_e_gpio_resources),
- .resource = ep93xx_e_gpio_resources,
-};
-
-/* port F */
-static struct resource ep93xx_f_gpio_resources[] = {
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x30, 0x04, "data"),
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x34, 0x04, "dir"),
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x4c, 0x1c, "intr"),
- DEFINE_RES_IRQ(IRQ_EP93XX_GPIO0MUX),
- DEFINE_RES_IRQ(IRQ_EP93XX_GPIO1MUX),
- DEFINE_RES_IRQ(IRQ_EP93XX_GPIO2MUX),
- DEFINE_RES_IRQ(IRQ_EP93XX_GPIO3MUX),
- DEFINE_RES_IRQ(IRQ_EP93XX_GPIO4MUX),
- DEFINE_RES_IRQ(IRQ_EP93XX_GPIO5MUX),
- DEFINE_RES_IRQ(IRQ_EP93XX_GPIO6MUX),
- DEFINE_RES_IRQ(IRQ_EP93XX_GPIO7MUX),
-};
-
-static struct platform_device ep93xx_f_gpio = {
- .name = "gpio-ep93xx",
- .id = 5,
- .num_resources = ARRAY_SIZE(ep93xx_f_gpio_resources),
- .resource = ep93xx_f_gpio_resources,
-};
-
-/* port G */
-static struct resource ep93xx_g_gpio_resources[] = {
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x38, 0x04, "data"),
- DEFINE_RES_MEM_NAMED(EP93XX_GPIO_PHYS_BASE + 0x3c, 0x04, "dir"),
-};
-
-static struct platform_device ep93xx_g_gpio = {
- .name = "gpio-ep93xx",
- .id = 6,
- .num_resources = ARRAY_SIZE(ep93xx_g_gpio_resources),
- .resource = ep93xx_g_gpio_resources,
-};
-
-static struct platform_device *ep93xx_gpio_device[] __initdata = {
- &ep93xx_a_gpio,
- &ep93xx_b_gpio,
- &ep93xx_c_gpio,
- &ep93xx_d_gpio,
- &ep93xx_e_gpio,
- &ep93xx_f_gpio,
- &ep93xx_g_gpio,
-};
-
-/*************************************************************************
- * EP93xx peripheral handling
- *************************************************************************/
-#define EP93XX_UART_MCR_OFFSET (0x0100)
-
-static void ep93xx_uart_set_mctrl(struct amba_device *dev,
- void __iomem *base, unsigned int mctrl)
-{
- unsigned int mcr;
-
- mcr = 0;
- if (mctrl & TIOCM_RTS)
- mcr |= 2;
- if (mctrl & TIOCM_DTR)
- mcr |= 1;
-
- __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
-}
-
-static struct amba_pl010_data ep93xx_uart_data = {
- .set_mctrl = ep93xx_uart_set_mctrl,
-};
-
-static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
- { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
-
-static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
- { IRQ_EP93XX_UART2 }, NULL);
-
-static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
- { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
-
-static struct resource ep93xx_rtc_resource[] = {
- DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
-};
-
-static struct platform_device ep93xx_rtc_device = {
- .name = "ep93xx-rtc",
- .id = -1,
- .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
- .resource = ep93xx_rtc_resource,
-};
-
-/*************************************************************************
- * EP93xx OHCI USB Host
- *************************************************************************/
-
-static struct clk *ep93xx_ohci_host_clock;
-
-static int ep93xx_ohci_power_on(struct platform_device *pdev)
-{
- if (!ep93xx_ohci_host_clock) {
- ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(ep93xx_ohci_host_clock))
- return PTR_ERR(ep93xx_ohci_host_clock);
- }
-
- return clk_prepare_enable(ep93xx_ohci_host_clock);
-}
-
-static void ep93xx_ohci_power_off(struct platform_device *pdev)
-{
- clk_disable(ep93xx_ohci_host_clock);
-}
-
-static struct usb_ohci_pdata ep93xx_ohci_pdata = {
- .power_on = ep93xx_ohci_power_on,
- .power_off = ep93xx_ohci_power_off,
- .power_suspend = ep93xx_ohci_power_off,
-};
-
-static struct resource ep93xx_ohci_resources[] = {
- DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
- DEFINE_RES_IRQ(IRQ_EP93XX_USB),
-};
-
-static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32);
-
-static struct platform_device ep93xx_ohci_device = {
- .name = "ohci-platform",
- .id = -1,
- .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
- .resource = ep93xx_ohci_resources,
- .dev = {
- .dma_mask = &ep93xx_ohci_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &ep93xx_ohci_pdata,
- },
-};
-
-/*************************************************************************
- * EP93xx physmap'ed flash
- *************************************************************************/
-static struct physmap_flash_data ep93xx_flash_data;
-
-static struct resource ep93xx_flash_resource = {
- .flags = IORESOURCE_MEM,
-};
-
-static struct platform_device ep93xx_flash = {
- .name = "physmap-flash",
- .id = 0,
- .dev = {
- .platform_data = &ep93xx_flash_data,
- },
- .num_resources = 1,
- .resource = &ep93xx_flash_resource,
-};
-
-/**
- * ep93xx_register_flash() - Register the external flash device.
- * @width: bank width in octets
- * @start: resource start address
- * @size: resource size
- */
-void __init ep93xx_register_flash(unsigned int width,
- resource_size_t start, resource_size_t size)
-{
- ep93xx_flash_data.width = width;
-
- ep93xx_flash_resource.start = start;
- ep93xx_flash_resource.end = start + size - 1;
-
- platform_device_register(&ep93xx_flash);
-}
-
-
-/*************************************************************************
- * EP93xx ethernet peripheral handling
- *************************************************************************/
-static struct ep93xx_eth_data ep93xx_eth_data;
-
-static struct resource ep93xx_eth_resource[] = {
- DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
- DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
-};
-
-static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
-
-static struct platform_device ep93xx_eth_device = {
- .name = "ep93xx-eth",
- .id = -1,
- .dev = {
- .platform_data = &ep93xx_eth_data,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .dma_mask = &ep93xx_eth_dma_mask,
- },
- .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
- .resource = ep93xx_eth_resource,
-};
-
-/**
- * ep93xx_register_eth - Register the built-in ethernet platform device.
- * @data: platform specific ethernet configuration (__initdata)
- * @copy_addr: flag indicating that the MAC address should be copied
- * from the IndAd registers (as programmed by the bootloader)
- */
-void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
-{
- if (copy_addr)
- memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
-
- ep93xx_eth_data = *data;
- platform_device_register(&ep93xx_eth_device);
-}
-
-
-/*************************************************************************
- * EP93xx i2c peripheral handling
- *************************************************************************/
-
-/* All EP93xx devices use the same two GPIO pins for I2C bit-banging */
-static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = {
- .dev_id = "i2c-gpio.0",
- .table = {
- /* Use local offsets on gpiochip/port "G" */
- GPIO_LOOKUP_IDX("gpio-ep93xx.6", 1, NULL, 0,
- GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
- GPIO_LOOKUP_IDX("gpio-ep93xx.6", 0, NULL, 1,
- GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
- },
-};
-
-static struct platform_device ep93xx_i2c_device = {
- .name = "i2c-gpio",
- .id = 0,
- .dev = {
- .platform_data = NULL,
- },
-};
-
-/**
- * ep93xx_register_i2c - Register the i2c platform device.
- * @devices: platform specific i2c bus device information (__initdata)
- * @num: the number of devices on the i2c bus
- */
-void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num)
-{
- /*
- * FIXME: this just sets the two pins as non-opendrain, as no
- * platforms tries to do that anyway. Flag the applicable lines
- * as open drain in the GPIO_LOOKUP above and the driver or
- * gpiolib will handle open drain/open drain emulation as need
- * be. Right now i2c-gpio emulates open drain which is not
- * optimal.
- */
- __raw_writel((0 << 1) | (0 << 0),
- EP93XX_GPIO_EEDRIVE);
-
- i2c_register_board_info(0, devices, num);
- gpiod_add_lookup_table(&ep93xx_i2c_gpiod_table);
- platform_device_register(&ep93xx_i2c_device);
-}
-
-/*************************************************************************
- * EP93xx SPI peripheral handling
- *************************************************************************/
-static struct ep93xx_spi_info ep93xx_spi_master_data;
-
-static struct resource ep93xx_spi_resources[] = {
- DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
- DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
-};
-
-static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
-
-static struct platform_device ep93xx_spi_device = {
- .name = "ep93xx-spi",
- .id = 0,
- .dev = {
- .platform_data = &ep93xx_spi_master_data,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .dma_mask = &ep93xx_spi_dma_mask,
- },
- .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
- .resource = ep93xx_spi_resources,
-};
-
-/**
- * ep93xx_register_spi() - registers spi platform device
- * @info: ep93xx board specific spi master info (__initdata)
- * @devices: SPI devices to register (__initdata)
- * @num: number of SPI devices to register
- *
- * This function registers platform device for the EP93xx SPI controller and
- * also makes sure that SPI pins are muxed so that I2S is not using those pins.
- */
-void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
- struct spi_board_info *devices, int num)
-{
- /*
- * When SPI is used, we need to make sure that I2S is muxed off from
- * SPI pins.
- */
- ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
-
- ep93xx_spi_master_data = *info;
- spi_register_board_info(devices, num);
- platform_device_register(&ep93xx_spi_device);
-}
-
-/*************************************************************************
- * EP93xx LEDs
- *************************************************************************/
-static const struct gpio_led ep93xx_led_pins[] __initconst = {
- {
- .name = "platform:grled",
- }, {
- .name = "platform:rdled",
- },
-};
-
-static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
- .num_leds = ARRAY_SIZE(ep93xx_led_pins),
- .leds = ep93xx_led_pins,
-};
-
-static struct gpiod_lookup_table ep93xx_leds_gpio_table = {
- .dev_id = "leds-gpio",
- .table = {
- /* Use local offsets on gpiochip/port "E" */
- GPIO_LOOKUP_IDX("gpio-ep93xx.4", 0, NULL, 0, GPIO_ACTIVE_HIGH),
- GPIO_LOOKUP_IDX("gpio-ep93xx.4", 1, NULL, 1, GPIO_ACTIVE_HIGH),
- { }
- },
-};
-
-/*************************************************************************
- * EP93xx pwm peripheral handling
- *************************************************************************/
-static struct resource ep93xx_pwm0_resource[] = {
- DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
-};
-
-static struct platform_device ep93xx_pwm0_device = {
- .name = "ep93xx-pwm",
- .id = 0,
- .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
- .resource = ep93xx_pwm0_resource,
-};
-
-static struct resource ep93xx_pwm1_resource[] = {
- DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
-};
-
-static struct platform_device ep93xx_pwm1_device = {
- .name = "ep93xx-pwm",
- .id = 1,
- .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
- .resource = ep93xx_pwm1_resource,
-};
-
-void __init ep93xx_register_pwm(int pwm0, int pwm1)
-{
- if (pwm0)
- platform_device_register(&ep93xx_pwm0_device);
-
- /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
- if (pwm1)
- platform_device_register(&ep93xx_pwm1_device);
-}
-
-/*************************************************************************
- * EP93xx video peripheral handling
- *************************************************************************/
-static struct ep93xxfb_mach_info ep93xxfb_data;
-
-static struct resource ep93xx_fb_resource[] = {
- DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
-};
-
-static struct platform_device ep93xx_fb_device = {
- .name = "ep93xx-fb",
- .id = -1,
- .dev = {
- .platform_data = &ep93xxfb_data,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
- },
- .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
- .resource = ep93xx_fb_resource,
-};
-
-/* The backlight use a single register in the framebuffer's register space */
-#define EP93XX_RASTER_REG_BRIGHTNESS 0x20
-
-static struct resource ep93xx_bl_resources[] = {
- DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
- EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
-};
-
-static struct platform_device ep93xx_bl_device = {
- .name = "ep93xx-bl",
- .id = -1,
- .num_resources = ARRAY_SIZE(ep93xx_bl_resources),
- .resource = ep93xx_bl_resources,
-};
-
-/**
- * ep93xx_register_fb - Register the framebuffer platform device.
- * @data: platform specific framebuffer configuration (__initdata)
- */
-void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
-{
- ep93xxfb_data = *data;
- platform_device_register(&ep93xx_fb_device);
- platform_device_register(&ep93xx_bl_device);
-}
-
-
-/*************************************************************************
- * EP93xx matrix keypad peripheral handling
- *************************************************************************/
-static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
-
-static struct resource ep93xx_keypad_resource[] = {
- DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
- DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
-};
-
-static struct platform_device ep93xx_keypad_device = {
- .name = "ep93xx-keypad",
- .id = -1,
- .dev = {
- .platform_data = &ep93xx_keypad_data,
- },
- .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
- .resource = ep93xx_keypad_resource,
-};
-
-/**
- * ep93xx_register_keypad - Register the keypad platform device.
- * @data: platform specific keypad configuration (__initdata)
- */
-void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
-{
- ep93xx_keypad_data = *data;
- platform_device_register(&ep93xx_keypad_device);
-}
-
-/*************************************************************************
- * EP93xx I2S audio peripheral handling
- *************************************************************************/
-static struct resource ep93xx_i2s_resource[] = {
- DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
- DEFINE_RES_IRQ(IRQ_EP93XX_SAI),
-};
-
-static struct platform_device ep93xx_i2s_device = {
- .name = "ep93xx-i2s",
- .id = -1,
- .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
- .resource = ep93xx_i2s_resource,
-};
-
-static struct platform_device ep93xx_pcm_device = {
- .name = "ep93xx-pcm-audio",
- .id = -1,
-};
-
-void __init ep93xx_register_i2s(void)
-{
- platform_device_register(&ep93xx_i2s_device);
- platform_device_register(&ep93xx_pcm_device);
-}
-
-#define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
- EP93XX_SYSCON_DEVCFG_I2SONAC97)
-
-#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
- EP93XX_SYSCON_I2SCLKDIV_SPOL)
-
-int ep93xx_i2s_acquire(void)
-{
- unsigned val;
-
- ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
- EP93XX_SYSCON_DEVCFG_I2S_MASK);
-
- /*
- * This is potentially racy with the clock api for i2s_mclk, sclk and
- * lrclk. Since the i2s driver is the only user of those clocks we
- * rely on it to prevent parallel use of this function and the
- * clock api for the i2s clocks.
- */
- val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
- val &= ~EP93XX_I2SCLKDIV_MASK;
- val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
- ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
-
- return 0;
-}
-EXPORT_SYMBOL(ep93xx_i2s_acquire);
-
-void ep93xx_i2s_release(void)
-{
- ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
-}
-EXPORT_SYMBOL(ep93xx_i2s_release);
-
-/*************************************************************************
- * EP93xx AC97 audio peripheral handling
- *************************************************************************/
-static struct resource ep93xx_ac97_resources[] = {
- DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
- DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
-};
-
-static struct platform_device ep93xx_ac97_device = {
- .name = "ep93xx-ac97",
- .id = -1,
- .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
- .resource = ep93xx_ac97_resources,
-};
-
-void __init ep93xx_register_ac97(void)
-{
- /*
- * Make sure that the AC97 pins are not used by I2S.
- */
- ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
-
- platform_device_register(&ep93xx_ac97_device);
- platform_device_register(&ep93xx_pcm_device);
-}
-
-/*************************************************************************
- * EP93xx Watchdog
- *************************************************************************/
-static struct resource ep93xx_wdt_resources[] = {
- DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
-};
-
-static struct platform_device ep93xx_wdt_device = {
- .name = "ep93xx-wdt",
- .id = -1,
- .num_resources = ARRAY_SIZE(ep93xx_wdt_resources),
- .resource = ep93xx_wdt_resources,
-};
-
-/*************************************************************************
- * EP93xx IDE
- *************************************************************************/
-static struct resource ep93xx_ide_resources[] = {
- DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
- DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
-};
-
-static struct platform_device ep93xx_ide_device = {
- .name = "ep93xx-ide",
- .id = -1,
- .dev = {
- .dma_mask = &ep93xx_ide_device.dev.coherent_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
- .num_resources = ARRAY_SIZE(ep93xx_ide_resources),
- .resource = ep93xx_ide_resources,
-};
-
-void __init ep93xx_register_ide(void)
-{
- platform_device_register(&ep93xx_ide_device);
-}
-
-/*************************************************************************
- * EP93xx ADC
- *************************************************************************/
-static struct resource ep93xx_adc_resources[] = {
- DEFINE_RES_MEM(EP93XX_ADC_PHYS_BASE, 0x28),
- DEFINE_RES_IRQ(IRQ_EP93XX_TOUCH),
-};
-
-static struct platform_device ep93xx_adc_device = {
- .name = "ep93xx-adc",
- .id = -1,
- .num_resources = ARRAY_SIZE(ep93xx_adc_resources),
- .resource = ep93xx_adc_resources,
-};
-
-void __init ep93xx_register_adc(void)
-{
- /* Power up ADC, deactivate Touch Screen Controller */
- ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_TIN,
- EP93XX_SYSCON_DEVCFG_ADCPD);
-
- platform_device_register(&ep93xx_adc_device);
-}
-
-/*************************************************************************
- * EP93xx Security peripheral
- *************************************************************************/
-
-/*
- * The Maverick Key is 256 bits of micro fuses blown at the factory during
- * manufacturing to uniquely identify a part.
- *
- * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key
- */
-#define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x))
-#define EP93XX_SECURITY_SECFLG EP93XX_SECURITY_REG(0x2400)
-#define EP93XX_SECURITY_FUSEFLG EP93XX_SECURITY_REG(0x2410)
-#define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440)
-#define EP93XX_SECURITY_UNIQCHK EP93XX_SECURITY_REG(0x2450)
-#define EP93XX_SECURITY_UNIQVAL EP93XX_SECURITY_REG(0x2460)
-#define EP93XX_SECURITY_SECID1 EP93XX_SECURITY_REG(0x2500)
-#define EP93XX_SECURITY_SECID2 EP93XX_SECURITY_REG(0x2504)
-#define EP93XX_SECURITY_SECCHK1 EP93XX_SECURITY_REG(0x2520)
-#define EP93XX_SECURITY_SECCHK2 EP93XX_SECURITY_REG(0x2524)
-#define EP93XX_SECURITY_UNIQID2 EP93XX_SECURITY_REG(0x2700)
-#define EP93XX_SECURITY_UNIQID3 EP93XX_SECURITY_REG(0x2704)
-#define EP93XX_SECURITY_UNIQID4 EP93XX_SECURITY_REG(0x2708)
-#define EP93XX_SECURITY_UNIQID5 EP93XX_SECURITY_REG(0x270c)
-
-static char ep93xx_soc_id[33];
-
-static const char __init *ep93xx_get_soc_id(void)
-{
- unsigned int id, id2, id3, id4, id5;
-
- if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1)
- return "bad Hamming code";
-
- id = __raw_readl(EP93XX_SECURITY_UNIQID);
- id2 = __raw_readl(EP93XX_SECURITY_UNIQID2);
- id3 = __raw_readl(EP93XX_SECURITY_UNIQID3);
- id4 = __raw_readl(EP93XX_SECURITY_UNIQID4);
- id5 = __raw_readl(EP93XX_SECURITY_UNIQID5);
-
- if (id != id2)
- return "invalid";
-
- /* Toss the unique ID into the entropy pool */
- add_device_randomness(&id2, 4);
- add_device_randomness(&id3, 4);
- add_device_randomness(&id4, 4);
- add_device_randomness(&id5, 4);
-
- snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id),
- "%08x%08x%08x%08x", id2, id3, id4, id5);
-
- return ep93xx_soc_id;
-}
-
-static const char __init *ep93xx_get_soc_rev(void)
-{
- int rev = ep93xx_chip_revision();
-
- switch (rev) {
- case EP93XX_CHIP_REV_D0:
- return "D0";
- case EP93XX_CHIP_REV_D1:
- return "D1";
- case EP93XX_CHIP_REV_E0:
- return "E0";
- case EP93XX_CHIP_REV_E1:
- return "E1";
- case EP93XX_CHIP_REV_E2:
- return "E2";
- default:
- return "unknown";
- }
-}
-
-static const char __init *ep93xx_get_machine_name(void)
-{
- return kasprintf(GFP_KERNEL,"%s", machine_desc->name);
-}
-
-static struct device __init *ep93xx_init_soc(void)
-{
- struct soc_device_attribute *soc_dev_attr;
- struct soc_device *soc_dev;
-
- soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
- if (!soc_dev_attr)
- return NULL;
-
- soc_dev_attr->machine = ep93xx_get_machine_name();
- soc_dev_attr->family = "Cirrus Logic EP93xx";
- soc_dev_attr->revision = ep93xx_get_soc_rev();
- soc_dev_attr->soc_id = ep93xx_get_soc_id();
-
- soc_dev = soc_device_register(soc_dev_attr);
- if (IS_ERR(soc_dev)) {
- kfree(soc_dev_attr->machine);
- kfree(soc_dev_attr);
- return NULL;
- }
-
- return soc_device_to_device(soc_dev);
-}
-
-struct device __init *ep93xx_init_devices(void)
-{
- struct device *parent;
- unsigned int i;
-
- /* Disallow access to MaverickCrunch initially */
- ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
-
- /* Default all ports to GPIO */
- ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
- EP93XX_SYSCON_DEVCFG_GONK |
- EP93XX_SYSCON_DEVCFG_EONIDE |
- EP93XX_SYSCON_DEVCFG_GONIDE |
- EP93XX_SYSCON_DEVCFG_HONIDE);
-
- parent = ep93xx_init_soc();
-
- /* Get the GPIO working early, other devices need it */
- for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_device); i++)
- platform_device_register(ep93xx_gpio_device[i]);
-
- amba_device_register(&uart1_device, &iomem_resource);
- amba_device_register(&uart2_device, &iomem_resource);
- amba_device_register(&uart3_device, &iomem_resource);
-
- platform_device_register(&ep93xx_rtc_device);
- platform_device_register(&ep93xx_ohci_device);
- platform_device_register(&ep93xx_wdt_device);
-
- gpiod_add_lookup_table(&ep93xx_leds_gpio_table);
- gpio_led_register_device(-1, &ep93xx_led_data);
-
- return parent;
-}
-
-void ep93xx_restart(enum reboot_mode mode, const char *cmd)
-{
- /*
- * Set then clear the SWRST bit to initiate a software reset
- */
- ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
- ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
-
- while (1)
- ;
-}
diff --git a/arch/arm/mach-ep93xx/dma.c b/arch/arm/mach-ep93xx/dma.c
deleted file mode 100644
index 74515acab8ef..000000000000
--- a/arch/arm/mach-ep93xx/dma.c
+++ /dev/null
@@ -1,114 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * arch/arm/mach-ep93xx/dma.c
- *
- * Platform support code for the EP93xx dmaengine driver.
- *
- * Copyright (C) 2011 Mika Westerberg
- *
- * This work is based on the original dma-m2p implementation with
- * following copyrights:
- *
- * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
- * Copyright (C) 2006 Applied Data Systems
- * Copyright (C) 2009 Ryan Mallon <rmallon@gmail.com>
- */
-
-#include <linux/dmaengine.h>
-#include <linux/dma-mapping.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-
-#include <linux/platform_data/dma-ep93xx.h>
-#include "hardware.h"
-
-#include "soc.h"
-
-#define DMA_CHANNEL(_name, _base, _irq) \
- { .name = (_name), .base = (_base), .irq = (_irq) }
-
-/*
- * DMA M2P channels.
- *
- * On the EP93xx chip the following peripherals my be allocated to the 10
- * Memory to Internal Peripheral (M2P) channels (5 transmit + 5 receive).
- *
- * I2S contains 3 Tx and 3 Rx DMA Channels
- * AAC contains 3 Tx and 3 Rx DMA Channels
- * UART1 contains 1 Tx and 1 Rx DMA Channels
- * UART2 contains 1 Tx and 1 Rx DMA Channels
- * UART3 contains 1 Tx and 1 Rx DMA Channels
- * IrDA contains 1 Tx and 1 Rx DMA Channels
- *
- * Registers are mapped statically in ep93xx_map_io().
- */
-static struct ep93xx_dma_chan_data ep93xx_dma_m2p_channels[] = {
- DMA_CHANNEL("m2p0", EP93XX_DMA_BASE + 0x0000, IRQ_EP93XX_DMAM2P0),
- DMA_CHANNEL("m2p1", EP93XX_DMA_BASE + 0x0040, IRQ_EP93XX_DMAM2P1),
- DMA_CHANNEL("m2p2", EP93XX_DMA_BASE + 0x0080, IRQ_EP93XX_DMAM2P2),
- DMA_CHANNEL("m2p3", EP93XX_DMA_BASE + 0x00c0, IRQ_EP93XX_DMAM2P3),
- DMA_CHANNEL("m2p4", EP93XX_DMA_BASE + 0x0240, IRQ_EP93XX_DMAM2P4),
- DMA_CHANNEL("m2p5", EP93XX_DMA_BASE + 0x0200, IRQ_EP93XX_DMAM2P5),
- DMA_CHANNEL("m2p6", EP93XX_DMA_BASE + 0x02c0, IRQ_EP93XX_DMAM2P6),
- DMA_CHANNEL("m2p7", EP93XX_DMA_BASE + 0x0280, IRQ_EP93XX_DMAM2P7),
- DMA_CHANNEL("m2p8", EP93XX_DMA_BASE + 0x0340, IRQ_EP93XX_DMAM2P8),
- DMA_CHANNEL("m2p9", EP93XX_DMA_BASE + 0x0300, IRQ_EP93XX_DMAM2P9),
-};
-
-static struct ep93xx_dma_platform_data ep93xx_dma_m2p_data = {
- .channels = ep93xx_dma_m2p_channels,
- .num_channels = ARRAY_SIZE(ep93xx_dma_m2p_channels),
-};
-
-static u64 ep93xx_dma_m2p_mask = DMA_BIT_MASK(32);
-
-static struct platform_device ep93xx_dma_m2p_device = {
- .name = "ep93xx-dma-m2p",
- .id = -1,
- .dev = {
- .platform_data = &ep93xx_dma_m2p_data,
- .dma_mask = &ep93xx_dma_m2p_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-/*
- * DMA M2M channels.
- *
- * There are 2 M2M channels which support memcpy/memset and in addition simple
- * hardware requests from/to SSP and IDE. We do not implement an external
- * hardware requests.
- *
- * Registers are mapped statically in ep93xx_map_io().
- */
-static struct ep93xx_dma_chan_data ep93xx_dma_m2m_channels[] = {
- DMA_CHANNEL("m2m0", EP93XX_DMA_BASE + 0x0100, IRQ_EP93XX_DMAM2M0),
- DMA_CHANNEL("m2m1", EP93XX_DMA_BASE + 0x0140, IRQ_EP93XX_DMAM2M1),
-};
-
-static struct ep93xx_dma_platform_data ep93xx_dma_m2m_data = {
- .channels = ep93xx_dma_m2m_channels,
- .num_channels = ARRAY_SIZE(ep93xx_dma_m2m_channels),
-};
-
-static u64 ep93xx_dma_m2m_mask = DMA_BIT_MASK(32);
-
-static struct platform_device ep93xx_dma_m2m_device = {
- .name = "ep93xx-dma-m2m",
- .id = -1,
- .dev = {
- .platform_data = &ep93xx_dma_m2m_data,
- .dma_mask = &ep93xx_dma_m2m_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-static int __init ep93xx_dma_init(void)
-{
- platform_device_register(&ep93xx_dma_m2p_device);
- platform_device_register(&ep93xx_dma_m2m_device);
- return 0;
-}
-arch_initcall(ep93xx_dma_init);
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
deleted file mode 100644
index c1e880946f72..000000000000
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ /dev/null
@@ -1,344 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * arch/arm/mach-ep93xx/edb93xx.c
- * Cirrus Logic EDB93xx Development Board support.
- *
- * EDB93XX, EDB9301, EDB9307A
- * Copyright (C) 2008-2009 H Hartley Sweeten <hsweeten@visionengravers.com>
- *
- * EDB9302
- * Copyright (C) 2006 George Kashperko <george@chas.com.ua>
- *
- * EDB9302A, EDB9315, EDB9315A
- * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
- *
- * EDB9307
- * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
- *
- * EDB9312
- * Copyright (C) 2006 Infosys Technologies Limited
- * Toufeeq Hussain <toufeeq_hussain@infosys.com>
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/i2c.h>
-#include <linux/spi/spi.h>
-#include <linux/gpio/machine.h>
-
-#include <sound/cs4271.h>
-
-#include "hardware.h"
-#include <linux/platform_data/video-ep93xx.h>
-#include <linux/platform_data/spi-ep93xx.h>
-#include "gpio-ep93xx.h"
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-
-#include "soc.h"
-
-static void __init edb93xx_register_flash(void)
-{
- if (machine_is_edb9307() || machine_is_edb9312() ||
- machine_is_edb9315()) {
- ep93xx_register_flash(4, EP93XX_CS6_PHYS_BASE, SZ_32M);
- } else {
- ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
- }
-}
-
-static struct ep93xx_eth_data __initdata edb93xx_eth_data = {
- .phy_id = 1,
-};
-
-
-/*************************************************************************
- * EDB93xx i2c peripheral handling
- *************************************************************************/
-
-static struct i2c_board_info __initdata edb93xxa_i2c_board_info[] = {
- {
- I2C_BOARD_INFO("isl1208", 0x6f),
- },
-};
-
-static struct i2c_board_info __initdata edb93xx_i2c_board_info[] = {
- {
- I2C_BOARD_INFO("ds1337", 0x68),
- },
-};
-
-static void __init edb93xx_register_i2c(void)
-{
- if (machine_is_edb9302a() || machine_is_edb9307a() ||
- machine_is_edb9315a()) {
- ep93xx_register_i2c(edb93xxa_i2c_board_info,
- ARRAY_SIZE(edb93xxa_i2c_board_info));
- } else if (machine_is_edb9302() || machine_is_edb9307()
- || machine_is_edb9312() || machine_is_edb9315()) {
- ep93xx_register_i2c(edb93xx_i2c_board_info,
- ARRAY_SIZE(edb93xx_i2c_board_info));
- }
-}
-
-
-/*************************************************************************
- * EDB93xx SPI peripheral handling
- *************************************************************************/
-static struct cs4271_platform_data edb93xx_cs4271_data = {
- .gpio_nreset = -EINVAL, /* filled in later */
-};
-
-static struct spi_board_info edb93xx_spi_board_info[] __initdata = {
- {
- .modalias = "cs4271",
- .platform_data = &edb93xx_cs4271_data,
- .max_speed_hz = 6000000,
- .bus_num = 0,
- .chip_select = 0,
- .mode = SPI_MODE_3,
- },
-};
-
-static struct gpiod_lookup_table edb93xx_spi_cs_gpio_table = {
- .dev_id = "spi0",
- .table = {
- GPIO_LOOKUP("gpio-ep93xx.0", 6, "cs", GPIO_ACTIVE_LOW),
- { },
- },
-};
-
-static struct ep93xx_spi_info edb93xx_spi_info __initdata = {
- /* Intentionally left blank */
-};
-
-static void __init edb93xx_register_spi(void)
-{
- if (machine_is_edb9301() || machine_is_edb9302())
- edb93xx_cs4271_data.gpio_nreset = EP93XX_GPIO_LINE_EGPIO1;
- else if (machine_is_edb9302a() || machine_is_edb9307a())
- edb93xx_cs4271_data.gpio_nreset = EP93XX_GPIO_LINE_H(2);
- else if (machine_is_edb9315a())
- edb93xx_cs4271_data.gpio_nreset = EP93XX_GPIO_LINE_EGPIO14;
-
- gpiod_add_lookup_table(&edb93xx_spi_cs_gpio_table);
- ep93xx_register_spi(&edb93xx_spi_info, edb93xx_spi_board_info,
- ARRAY_SIZE(edb93xx_spi_board_info));
-}
-
-
-/*************************************************************************
- * EDB93xx I2S
- *************************************************************************/
-static struct platform_device edb93xx_audio_device = {
- .name = "edb93xx-audio",
- .id = -1,
-};
-
-static int __init edb93xx_has_audio(void)
-{
- return (machine_is_edb9301() || machine_is_edb9302() ||
- machine_is_edb9302a() || machine_is_edb9307a() ||
- machine_is_edb9315a());
-}
-
-static void __init edb93xx_register_i2s(void)
-{
- if (edb93xx_has_audio()) {
- ep93xx_register_i2s();
- platform_device_register(&edb93xx_audio_device);
- }
-}
-
-
-/*************************************************************************
- * EDB93xx pwm
- *************************************************************************/
-static void __init edb93xx_register_pwm(void)
-{
- if (machine_is_edb9301() ||
- machine_is_edb9302() || machine_is_edb9302a()) {
- /* EP9301 and EP9302 only have pwm.1 (EGPIO14) */
- ep93xx_register_pwm(0, 1);
- } else if (machine_is_edb9307() || machine_is_edb9307a()) {
- /* EP9307 only has pwm.0 (PWMOUT) */
- ep93xx_register_pwm(1, 0);
- } else {
- /* EP9312 and EP9315 have both */
- ep93xx_register_pwm(1, 1);
- }
-}
-
-
-/*************************************************************************
- * EDB93xx framebuffer
- *************************************************************************/
-static struct ep93xxfb_mach_info __initdata edb93xxfb_info = {
- .flags = 0,
-};
-
-static int __init edb93xx_has_fb(void)
-{
- /* These platforms have an ep93xx with video capability */
- return machine_is_edb9307() || machine_is_edb9307a() ||
- machine_is_edb9312() || machine_is_edb9315() ||
- machine_is_edb9315a();
-}
-
-static void __init edb93xx_register_fb(void)
-{
- if (!edb93xx_has_fb())
- return;
-
- if (machine_is_edb9307a() || machine_is_edb9315a())
- edb93xxfb_info.flags |= EP93XXFB_USE_SDCSN0;
- else
- edb93xxfb_info.flags |= EP93XXFB_USE_SDCSN3;
-
- ep93xx_register_fb(&edb93xxfb_info);
-}
-
-
-/*************************************************************************
- * EDB93xx IDE
- *************************************************************************/
-static int __init edb93xx_has_ide(void)
-{
- /*
- * Although EDB9312 and EDB9315 do have IDE capability, they have
- * INTRQ line wired as pull-up, which makes using IDE interface
- * problematic.
- */
- return machine_is_edb9312() || machine_is_edb9315() ||
- machine_is_edb9315a();
-}
-
-static void __init edb93xx_register_ide(void)
-{
- if (!edb93xx_has_ide())
- return;
-
- ep93xx_register_ide();
-}
-
-
-static void __init edb93xx_init_machine(void)
-{
- ep93xx_init_devices();
- edb93xx_register_flash();
- ep93xx_register_eth(&edb93xx_eth_data, 1);
- edb93xx_register_i2c();
- edb93xx_register_spi();
- edb93xx_register_i2s();
- edb93xx_register_pwm();
- edb93xx_register_fb();
- edb93xx_register_ide();
- ep93xx_register_adc();
-}
-
-
-#ifdef CONFIG_MACH_EDB9301
-MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
- /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
- .atag_offset = 0x100,
- .nr_irqs = NR_EP93XX_IRQS,
- .map_io = ep93xx_map_io,
- .init_irq = ep93xx_init_irq,
- .init_time = ep93xx_timer_init,
- .init_machine = edb93xx_init_machine,
- .restart = ep93xx_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_EDB9302
-MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
- /* Maintainer: George Kashperko <george@chas.com.ua> */
- .atag_offset = 0x100,
- .nr_irqs = NR_EP93XX_IRQS,
- .map_io = ep93xx_map_io,
- .init_irq = ep93xx_init_irq,
- .init_time = ep93xx_timer_init,
- .init_machine = edb93xx_init_machine,
- .restart = ep93xx_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_EDB9302A
-MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
- /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
- .atag_offset = 0x100,
- .nr_irqs = NR_EP93XX_IRQS,
- .map_io = ep93xx_map_io,
- .init_irq = ep93xx_init_irq,
- .init_time = ep93xx_timer_init,
- .init_machine = edb93xx_init_machine,
- .restart = ep93xx_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_EDB9307
-MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
- /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */
- .atag_offset = 0x100,
- .nr_irqs = NR_EP93XX_IRQS,
- .map_io = ep93xx_map_io,
- .init_irq = ep93xx_init_irq,
- .init_time = ep93xx_timer_init,
- .init_machine = edb93xx_init_machine,
- .restart = ep93xx_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_EDB9307A
-MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
- /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
- .atag_offset = 0x100,
- .nr_irqs = NR_EP93XX_IRQS,
- .map_io = ep93xx_map_io,
- .init_irq = ep93xx_init_irq,
- .init_time = ep93xx_timer_init,
- .init_machine = edb93xx_init_machine,
- .restart = ep93xx_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_EDB9312
-MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
- /* Maintainer: Toufeeq Hussain <toufeeq_hussain@infosys.com> */
- .atag_offset = 0x100,
- .nr_irqs = NR_EP93XX_IRQS,
- .map_io = ep93xx_map_io,
- .init_irq = ep93xx_init_irq,
- .init_time = ep93xx_timer_init,
- .init_machine = edb93xx_init_machine,
- .restart = ep93xx_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_EDB9315
-MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
- /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
- .atag_offset = 0x100,
- .nr_irqs = NR_EP93XX_IRQS,
- .map_io = ep93xx_map_io,
- .init_irq = ep93xx_init_irq,
- .init_time = ep93xx_timer_init,
- .init_machine = edb93xx_init_machine,
- .restart = ep93xx_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_EDB9315A
-MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
- /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
- .atag_offset = 0x100,
- .nr_irqs = NR_EP93XX_IRQS,
- .map_io = ep93xx_map_io,
- .init_irq = ep93xx_init_irq,
- .init_time = ep93xx_timer_init,
- .init_machine = edb93xx_init_machine,
- .restart = ep93xx_restart,
-MACHINE_END
-#endif
diff --git a/arch/arm/mach-ep93xx/ep93xx-regs.h b/arch/arm/mach-ep93xx/ep93xx-regs.h
deleted file mode 100644
index 8fa3646de0a4..000000000000
--- a/arch/arm/mach-ep93xx/ep93xx-regs.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_ARCH_EP93XX_REGS_H
-#define __ASM_ARCH_EP93XX_REGS_H
-
-/*
- * EP93xx linux memory map:
- *
- * virt phys size
- * fe800000 5M per-platform mappings
- * fed00000 80800000 2M APB
- * fef00000 80000000 1M AHB
- */
-
-#define EP93XX_AHB_PHYS_BASE 0x80000000
-#define EP93XX_AHB_VIRT_BASE 0xfef00000
-#define EP93XX_AHB_SIZE 0x00100000
-
-#define EP93XX_AHB_PHYS(x) (EP93XX_AHB_PHYS_BASE + (x))
-#define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x))
-
-#define EP93XX_APB_PHYS_BASE 0x80800000
-#define EP93XX_APB_VIRT_BASE 0xfed00000
-#define EP93XX_APB_SIZE 0x00200000
-
-#define EP93XX_APB_PHYS(x) (EP93XX_APB_PHYS_BASE + (x))
-#define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x))
-
-/* APB UARTs */
-#define EP93XX_UART1_PHYS_BASE EP93XX_APB_PHYS(0x000c0000)
-#define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000)
-
-#define EP93XX_UART2_PHYS_BASE EP93XX_APB_PHYS(0x000d0000)
-#define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000)
-
-#define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000)
-#define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000)
-
-#endif
diff --git a/arch/arm/mach-ep93xx/gpio-ep93xx.h b/arch/arm/mach-ep93xx/gpio-ep93xx.h
deleted file mode 100644
index 7b46eb7e5507..000000000000
--- a/arch/arm/mach-ep93xx/gpio-ep93xx.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/* Include file for the EP93XX GPIO controller machine specifics */
-
-#ifndef __GPIO_EP93XX_H
-#define __GPIO_EP93XX_H
-
-#include "ep93xx-regs.h"
-
-#define EP93XX_GPIO_PHYS_BASE EP93XX_APB_PHYS(0x00040000)
-#define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000)
-#define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x))
-#define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c)
-#define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0)
-#define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc)
-#define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8)
-
-/* GPIO port A. */
-#define EP93XX_GPIO_LINE_A(x) ((x) + 0)
-#define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0)
-#define EP93XX_GPIO_LINE_EGPIO1 EP93XX_GPIO_LINE_A(1)
-#define EP93XX_GPIO_LINE_EGPIO2 EP93XX_GPIO_LINE_A(2)
-#define EP93XX_GPIO_LINE_EGPIO3 EP93XX_GPIO_LINE_A(3)
-#define EP93XX_GPIO_LINE_EGPIO4 EP93XX_GPIO_LINE_A(4)
-#define EP93XX_GPIO_LINE_EGPIO5 EP93XX_GPIO_LINE_A(5)
-#define EP93XX_GPIO_LINE_EGPIO6 EP93XX_GPIO_LINE_A(6)
-#define EP93XX_GPIO_LINE_EGPIO7 EP93XX_GPIO_LINE_A(7)
-
-/* GPIO port B. */
-#define EP93XX_GPIO_LINE_B(x) ((x) + 8)
-#define EP93XX_GPIO_LINE_EGPIO8 EP93XX_GPIO_LINE_B(0)
-#define EP93XX_GPIO_LINE_EGPIO9 EP93XX_GPIO_LINE_B(1)
-#define EP93XX_GPIO_LINE_EGPIO10 EP93XX_GPIO_LINE_B(2)
-#define EP93XX_GPIO_LINE_EGPIO11 EP93XX_GPIO_LINE_B(3)
-#define EP93XX_GPIO_LINE_EGPIO12 EP93XX_GPIO_LINE_B(4)
-#define EP93XX_GPIO_LINE_EGPIO13 EP93XX_GPIO_LINE_B(5)
-#define EP93XX_GPIO_LINE_EGPIO14 EP93XX_GPIO_LINE_B(6)
-#define EP93XX_GPIO_LINE_EGPIO15 EP93XX_GPIO_LINE_B(7)
-
-/* GPIO port C. */
-#define EP93XX_GPIO_LINE_C(x) ((x) + 40)
-#define EP93XX_GPIO_LINE_ROW0 EP93XX_GPIO_LINE_C(0)
-#define EP93XX_GPIO_LINE_ROW1 EP93XX_GPIO_LINE_C(1)
-#define EP93XX_GPIO_LINE_ROW2 EP93XX_GPIO_LINE_C(2)
-#define EP93XX_GPIO_LINE_ROW3 EP93XX_GPIO_LINE_C(3)
-#define EP93XX_GPIO_LINE_ROW4 EP93XX_GPIO_LINE_C(4)
-#define EP93XX_GPIO_LINE_ROW5 EP93XX_GPIO_LINE_C(5)
-#define EP93XX_GPIO_LINE_ROW6 EP93XX_GPIO_LINE_C(6)
-#define EP93XX_GPIO_LINE_ROW7 EP93XX_GPIO_LINE_C(7)
-
-/* GPIO port D. */
-#define EP93XX_GPIO_LINE_D(x) ((x) + 24)
-#define EP93XX_GPIO_LINE_COL0 EP93XX_GPIO_LINE_D(0)
-#define EP93XX_GPIO_LINE_COL1 EP93XX_GPIO_LINE_D(1)
-#define EP93XX_GPIO_LINE_COL2 EP93XX_GPIO_LINE_D(2)
-#define EP93XX_GPIO_LINE_COL3 EP93XX_GPIO_LINE_D(3)
-#define EP93XX_GPIO_LINE_COL4 EP93XX_GPIO_LINE_D(4)
-#define EP93XX_GPIO_LINE_COL5 EP93XX_GPIO_LINE_D(5)
-#define EP93XX_GPIO_LINE_COL6 EP93XX_GPIO_LINE_D(6)
-#define EP93XX_GPIO_LINE_COL7 EP93XX_GPIO_LINE_D(7)
-
-/* GPIO port E. */
-#define EP93XX_GPIO_LINE_E(x) ((x) + 32)
-#define EP93XX_GPIO_LINE_GRLED EP93XX_GPIO_LINE_E(0)
-#define EP93XX_GPIO_LINE_RDLED EP93XX_GPIO_LINE_E(1)
-#define EP93XX_GPIO_LINE_DIORn EP93XX_GPIO_LINE_E(2)
-#define EP93XX_GPIO_LINE_IDECS1n EP93XX_GPIO_LINE_E(3)
-#define EP93XX_GPIO_LINE_IDECS2n EP93XX_GPIO_LINE_E(4)
-#define EP93XX_GPIO_LINE_IDEDA0 EP93XX_GPIO_LINE_E(5)
-#define EP93XX_GPIO_LINE_IDEDA1 EP93XX_GPIO_LINE_E(6)
-#define EP93XX_GPIO_LINE_IDEDA2 EP93XX_GPIO_LINE_E(7)
-
-/* GPIO port F. */
-#define EP93XX_GPIO_LINE_F(x) ((x) + 16)
-#define EP93XX_GPIO_LINE_WP EP93XX_GPIO_LINE_F(0)
-#define EP93XX_GPIO_LINE_MCCD1 EP93XX_GPIO_LINE_F(1)
-#define EP93XX_GPIO_LINE_MCCD2 EP93XX_GPIO_LINE_F(2)
-#define EP93XX_GPIO_LINE_MCBVD1 EP93XX_GPIO_LINE_F(3)
-#define EP93XX_GPIO_LINE_MCBVD2 EP93XX_GPIO_LINE_F(4)
-#define EP93XX_GPIO_LINE_VS1 EP93XX_GPIO_LINE_F(5)
-#define EP93XX_GPIO_LINE_READY EP93XX_GPIO_LINE_F(6)
-#define EP93XX_GPIO_LINE_VS2 EP93XX_GPIO_LINE_F(7)
-
-/* GPIO port G. */
-#define EP93XX_GPIO_LINE_G(x) ((x) + 48)
-#define EP93XX_GPIO_LINE_EECLK EP93XX_GPIO_LINE_G(0)
-#define EP93XX_GPIO_LINE_EEDAT EP93XX_GPIO_LINE_G(1)
-#define EP93XX_GPIO_LINE_SLA0 EP93XX_GPIO_LINE_G(2)
-#define EP93XX_GPIO_LINE_SLA1 EP93XX_GPIO_LINE_G(3)
-#define EP93XX_GPIO_LINE_DD12 EP93XX_GPIO_LINE_G(4)
-#define EP93XX_GPIO_LINE_DD13 EP93XX_GPIO_LINE_G(5)
-#define EP93XX_GPIO_LINE_DD14 EP93XX_GPIO_LINE_G(6)
-#define EP93XX_GPIO_LINE_DD15 EP93XX_GPIO_LINE_G(7)
-
-/* GPIO port H. */
-#define EP93XX_GPIO_LINE_H(x) ((x) + 56)
-#define EP93XX_GPIO_LINE_DD0 EP93XX_GPIO_LINE_H(0)
-#define EP93XX_GPIO_LINE_DD1 EP93XX_GPIO_LINE_H(1)
-#define EP93XX_GPIO_LINE_DD2 EP93XX_GPIO_LINE_H(2)
-#define EP93XX_GPIO_LINE_DD3 EP93XX_GPIO_LINE_H(3)
-#define EP93XX_GPIO_LINE_DD4 EP93XX_GPIO_LINE_H(4)
-#define EP93XX_GPIO_LINE_DD5 EP93XX_GPIO_LINE_H(5)
-#define EP93XX_GPIO_LINE_DD6 EP93XX_GPIO_LINE_H(6)
-#define EP93XX_GPIO_LINE_DD7 EP93XX_GPIO_LINE_H(7)
-
-/* maximum value for gpio line identifiers */
-#define EP93XX_GPIO_LINE_MAX EP93XX_GPIO_LINE_H(7)
-
-/* maximum value for irq capable line identifiers */
-#define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7)
-
-#endif /* __GPIO_EP93XX_H */
diff --git a/arch/arm/mach-ep93xx/hardware.h b/arch/arm/mach-ep93xx/hardware.h
deleted file mode 100644
index e7d850e04782..000000000000
--- a/arch/arm/mach-ep93xx/hardware.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * arch/arm/mach-ep93xx/include/mach/hardware.h
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-#include "platform.h"
-
-/*
- * The EP93xx has two external crystal oscillators. To generate the
- * required high-frequency clocks, the processor uses two phase-locked-
- * loops (PLLs) to multiply the incoming external clock signal to much
- * higher frequencies that are then divided down by programmable dividers
- * to produce the needed clocks. The PLLs operate independently of one
- * another.
- */
-#define EP93XX_EXT_CLK_RATE 14745600
-#define EP93XX_EXT_RTC_RATE 32768
-
-#define EP93XX_KEYTCHCLK_DIV4 (EP93XX_EXT_CLK_RATE / 4)
-#define EP93XX_KEYTCHCLK_DIV16 (EP93XX_EXT_CLK_RATE / 16)
-
-#endif
diff --git a/arch/arm/mach-ep93xx/irqs.h b/arch/arm/mach-ep93xx/irqs.h
deleted file mode 100644
index 353201b90c66..000000000000
--- a/arch/arm/mach-ep93xx/irqs.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H
-
-#define IRQ_EP93XX_VIC0 1
-
-#define IRQ_EP93XX_COMMRX (IRQ_EP93XX_VIC0 + 2)
-#define IRQ_EP93XX_COMMTX (IRQ_EP93XX_VIC0 + 3)
-#define IRQ_EP93XX_TIMER1 (IRQ_EP93XX_VIC0 + 4)
-#define IRQ_EP93XX_TIMER2 (IRQ_EP93XX_VIC0 + 5)
-#define IRQ_EP93XX_AACINTR (IRQ_EP93XX_VIC0 + 6)
-#define IRQ_EP93XX_DMAM2P0 (IRQ_EP93XX_VIC0 + 7)
-#define IRQ_EP93XX_DMAM2P1 (IRQ_EP93XX_VIC0 + 8)
-#define IRQ_EP93XX_DMAM2P2 (IRQ_EP93XX_VIC0 + 9)
-#define IRQ_EP93XX_DMAM2P3 (IRQ_EP93XX_VIC0 + 10)
-#define IRQ_EP93XX_DMAM2P4 (IRQ_EP93XX_VIC0 + 11)
-#define IRQ_EP93XX_DMAM2P5 (IRQ_EP93XX_VIC0 + 12)
-#define IRQ_EP93XX_DMAM2P6 (IRQ_EP93XX_VIC0 + 13)
-#define IRQ_EP93XX_DMAM2P7 (IRQ_EP93XX_VIC0 + 14)
-#define IRQ_EP93XX_DMAM2P8 (IRQ_EP93XX_VIC0 + 15)
-#define IRQ_EP93XX_DMAM2P9 (IRQ_EP93XX_VIC0 + 16)
-#define IRQ_EP93XX_DMAM2M0 (IRQ_EP93XX_VIC0 + 17)
-#define IRQ_EP93XX_DMAM2M1 (IRQ_EP93XX_VIC0 + 18)
-#define IRQ_EP93XX_GPIO0MUX (IRQ_EP93XX_VIC0 + 19)
-#define IRQ_EP93XX_GPIO1MUX (IRQ_EP93XX_VIC0 + 20)
-#define IRQ_EP93XX_GPIO2MUX (IRQ_EP93XX_VIC0 + 21)
-#define IRQ_EP93XX_GPIO3MUX (IRQ_EP93XX_VIC0 + 22)
-#define IRQ_EP93XX_UART1RX (IRQ_EP93XX_VIC0 + 23)
-#define IRQ_EP93XX_UART1TX (IRQ_EP93XX_VIC0 + 24)
-#define IRQ_EP93XX_UART2RX (IRQ_EP93XX_VIC0 + 25)
-#define IRQ_EP93XX_UART2TX (IRQ_EP93XX_VIC0 + 26)
-#define IRQ_EP93XX_UART3RX (IRQ_EP93XX_VIC0 + 27)
-#define IRQ_EP93XX_UART3TX (IRQ_EP93XX_VIC0 + 28)
-#define IRQ_EP93XX_KEY (IRQ_EP93XX_VIC0 + 29)
-#define IRQ_EP93XX_TOUCH (IRQ_EP93XX_VIC0 + 30)
-#define EP93XX_VIC1_VALID_IRQ_MASK 0x7ffffffc
-
-#define IRQ_EP93XX_VIC1 (IRQ_EP93XX_VIC0 + 32)
-
-#define IRQ_EP93XX_EXT0 (IRQ_EP93XX_VIC1 + 0)
-#define IRQ_EP93XX_EXT1 (IRQ_EP93XX_VIC1 + 1)
-#define IRQ_EP93XX_EXT2 (IRQ_EP93XX_VIC1 + 2)
-#define IRQ_EP93XX_64HZ (IRQ_EP93XX_VIC1 + 3)
-#define IRQ_EP93XX_WATCHDOG (IRQ_EP93XX_VIC1 + 4)
-#define IRQ_EP93XX_RTC (IRQ_EP93XX_VIC1 + 5)
-#define IRQ_EP93XX_IRDA (IRQ_EP93XX_VIC1 + 6)
-#define IRQ_EP93XX_ETHERNET (IRQ_EP93XX_VIC1 + 7)
-#define IRQ_EP93XX_EXT3 (IRQ_EP93XX_VIC1 + 8)
-#define IRQ_EP93XX_PROG (IRQ_EP93XX_VIC1 + 9)
-#define IRQ_EP93XX_1HZ (IRQ_EP93XX_VIC1 + 10)
-#define IRQ_EP93XX_VSYNC (IRQ_EP93XX_VIC1 + 11)
-#define IRQ_EP93XX_VIDEO_FIFO (IRQ_EP93XX_VIC1 + 12)
-#define IRQ_EP93XX_SSP1RX (IRQ_EP93XX_VIC1 + 13)
-#define IRQ_EP93XX_SSP1TX (IRQ_EP93XX_VIC1 + 14)
-#define IRQ_EP93XX_GPIO4MUX (IRQ_EP93XX_VIC1 + 15)
-#define IRQ_EP93XX_GPIO5MUX (IRQ_EP93XX_VIC1 + 16)
-#define IRQ_EP93XX_GPIO6MUX (IRQ_EP93XX_VIC1 + 17)
-#define IRQ_EP93XX_GPIO7MUX (IRQ_EP93XX_VIC1 + 18)
-#define IRQ_EP93XX_TIMER3 (IRQ_EP93XX_VIC1 + 19)
-#define IRQ_EP93XX_UART1 (IRQ_EP93XX_VIC1 + 20)
-#define IRQ_EP93XX_SSP (IRQ_EP93XX_VIC1 + 21)
-#define IRQ_EP93XX_UART2 (IRQ_EP93XX_VIC1 + 22)
-#define IRQ_EP93XX_UART3 (IRQ_EP93XX_VIC1 + 23)
-#define IRQ_EP93XX_USB (IRQ_EP93XX_VIC1 + 24)
-#define IRQ_EP93XX_ETHERNET_PME (IRQ_EP93XX_VIC1 + 25)
-#define IRQ_EP93XX_DSP (IRQ_EP93XX_VIC1 + 26)
-#define IRQ_EP93XX_GPIO_AB (IRQ_EP93XX_VIC1 + 27)
-#define IRQ_EP93XX_SAI (IRQ_EP93XX_VIC1 + 28)
-#define EP93XX_VIC2_VALID_IRQ_MASK 0x1fffffff
-
-#define NR_EP93XX_IRQS (IRQ_EP93XX_VIC1 + 32 + 24)
-
-#define EP93XX_BOARD_IRQ(x) (NR_EP93XX_IRQS + (x))
-#define EP93XX_BOARD_IRQS 32
-
-#endif
diff --git a/arch/arm/mach-ep93xx/platform.h b/arch/arm/mach-ep93xx/platform.h
deleted file mode 100644
index 5fb1b919133f..000000000000
--- a/arch/arm/mach-ep93xx/platform.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * arch/arm/mach-ep93xx/include/mach/platform.h
- */
-
-#ifndef __ASSEMBLY__
-
-#include <linux/platform_data/eth-ep93xx.h>
-#include <linux/reboot.h>
-
-struct device;
-struct i2c_board_info;
-struct spi_board_info;
-struct platform_device;
-struct ep93xxfb_mach_info;
-struct ep93xx_keypad_platform_data;
-struct ep93xx_spi_info;
-
-void ep93xx_map_io(void);
-void ep93xx_init_irq(void);
-
-void ep93xx_register_flash(unsigned int width,
- resource_size_t start, resource_size_t size);
-
-void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
-void ep93xx_register_i2c(struct i2c_board_info *devices, int num);
-void ep93xx_register_spi(struct ep93xx_spi_info *info,
- struct spi_board_info *devices, int num);
-void ep93xx_register_fb(struct ep93xxfb_mach_info *data);
-void ep93xx_register_pwm(int pwm0, int pwm1);
-void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data);
-void ep93xx_register_i2s(void);
-void ep93xx_register_ac97(void);
-void ep93xx_register_ide(void);
-void ep93xx_register_adc(void);
-
-struct device *ep93xx_init_devices(void);
-extern void ep93xx_timer_init(void);
-
-void ep93xx_restart(enum reboot_mode, const char *);
-
-#endif
diff --git a/arch/arm/mach-ep93xx/soc.h b/arch/arm/mach-ep93xx/soc.h
deleted file mode 100644
index 3245ebbd5069..000000000000
--- a/arch/arm/mach-ep93xx/soc.h
+++ /dev/null
@@ -1,212 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * arch/arm/mach-ep93xx/soc.h
- *
- * Copyright (C) 2012 Open Kernel Labs <www.ok-labs.com>
- * Copyright (C) 2012 Ryan Mallon <rmallon@gmail.com>
- */
-
-#ifndef _EP93XX_SOC_H
-#define _EP93XX_SOC_H
-
-#include "ep93xx-regs.h"
-#include "irqs.h"
-
-/*
- * EP93xx Physical Memory Map:
- *
- * The ASDO pin is sampled at system reset to select a synchronous or
- * asynchronous boot configuration. When ASDO is "1" (i.e. pulled-up)
- * the synchronous boot mode is selected. When ASDO is "0" (i.e
- * pulled-down) the asynchronous boot mode is selected.
- *
- * In synchronous boot mode nSDCE3 is decoded starting at physical address
- * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous
- * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3
- * decoded at 0xf0000000.
- *
- * There is known errata for the EP93xx dealing with External Memory
- * Configurations. Please refer to "AN273: EP93xx Silicon Rev E Design
- * Guidelines" for more information. This document can be found at:
- *
- * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf
- */
-
-#define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */
-#define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */
-#define EP93XX_CS1_PHYS_BASE 0x10000000
-#define EP93XX_CS2_PHYS_BASE 0x20000000
-#define EP93XX_CS3_PHYS_BASE 0x30000000
-#define EP93XX_PCMCIA_PHYS_BASE 0x40000000
-#define EP93XX_CS6_PHYS_BASE 0x60000000
-#define EP93XX_CS7_PHYS_BASE 0x70000000
-#define EP93XX_SDCE0_PHYS_BASE 0xc0000000
-#define EP93XX_SDCE1_PHYS_BASE 0xd0000000
-#define EP93XX_SDCE2_PHYS_BASE 0xe0000000
-#define EP93XX_SDCE3_PHYS_BASE_ASYNC 0xf0000000 /* ASDO Pin = 0 */
-#define EP93XX_CS0_PHYS_BASE_SYNC 0xf0000000 /* ASDO Pin = 1 */
-
-/* AHB peripherals */
-#define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000)
-
-#define EP93XX_ETHERNET_PHYS_BASE EP93XX_AHB_PHYS(0x00010000)
-#define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000)
-
-#define EP93XX_USB_PHYS_BASE EP93XX_AHB_PHYS(0x00020000)
-#define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000)
-
-#define EP93XX_RASTER_PHYS_BASE EP93XX_AHB_PHYS(0x00030000)
-#define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000)
-
-#define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000)
-
-#define EP93XX_SDRAM_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00060000)
-
-#define EP93XX_PCMCIA_CONTROLLER_BASE EP93XX_AHB_IOMEM(0x00080000)
-
-#define EP93XX_BOOT_ROM_BASE EP93XX_AHB_IOMEM(0x00090000)
-
-#define EP93XX_IDE_PHYS_BASE EP93XX_AHB_PHYS(0x000a0000)
-#define EP93XX_IDE_BASE EP93XX_AHB_IOMEM(0x000a0000)
-
-#define EP93XX_VIC1_BASE EP93XX_AHB_IOMEM(0x000b0000)
-
-#define EP93XX_VIC2_BASE EP93XX_AHB_IOMEM(0x000c0000)
-
-/* APB peripherals */
-#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000)
-
-#define EP93XX_I2S_PHYS_BASE EP93XX_APB_PHYS(0x00020000)
-#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000)
-
-#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000)
-
-#define EP93XX_AAC_PHYS_BASE EP93XX_APB_PHYS(0x00080000)
-#define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000)
-
-#define EP93XX_SPI_PHYS_BASE EP93XX_APB_PHYS(0x000a0000)
-#define EP93XX_SPI_BASE EP93XX_APB_IOMEM(0x000a0000)
-
-#define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000)
-
-#define EP93XX_KEY_MATRIX_PHYS_BASE EP93XX_APB_PHYS(0x000f0000)
-#define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000)
-
-#define EP93XX_ADC_PHYS_BASE EP93XX_APB_PHYS(0x00100000)
-#define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000)
-#define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000)
-
-#define EP93XX_PWM_PHYS_BASE EP93XX_APB_PHYS(0x00110000)
-#define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000)
-
-#define EP93XX_RTC_PHYS_BASE EP93XX_APB_PHYS(0x00120000)
-#define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000)
-
-#define EP93XX_WATCHDOG_PHYS_BASE EP93XX_APB_PHYS(0x00140000)
-#define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000)
-
-/* System controller */
-#define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000)
-#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x))
-#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00)
-#define EP93XX_SYSCON_PWRCNT EP93XX_SYSCON_REG(0x04)
-#define EP93XX_SYSCON_PWRCNT_FIR_EN (1<<31)
-#define EP93XX_SYSCON_PWRCNT_UARTBAUD (1<<29)
-#define EP93XX_SYSCON_PWRCNT_USH_EN 28
-#define EP93XX_SYSCON_PWRCNT_DMA_M2M1 27
-#define EP93XX_SYSCON_PWRCNT_DMA_M2M0 26
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P8 25
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P9 24
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P6 23
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P7 22
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P4 21
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P5 20
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P2 19
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P3 18
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P0 17
-#define EP93XX_SYSCON_PWRCNT_DMA_M2P1 16
-#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08)
-#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c)
-#define EP93XX_SYSCON_CLKSET1 EP93XX_SYSCON_REG(0x20)
-#define EP93XX_SYSCON_CLKSET1_NBYP1 (1<<23)
-#define EP93XX_SYSCON_CLKSET2 EP93XX_SYSCON_REG(0x24)
-#define EP93XX_SYSCON_CLKSET2_NBYP2 (1<<19)
-#define EP93XX_SYSCON_CLKSET2_PLL2_EN (1<<18)
-#define EP93XX_SYSCON_DEVCFG EP93XX_SYSCON_REG(0x80)
-#define EP93XX_SYSCON_DEVCFG_SWRST (1<<31)
-#define EP93XX_SYSCON_DEVCFG_D1ONG (1<<30)
-#define EP93XX_SYSCON_DEVCFG_D0ONG (1<<29)
-#define EP93XX_SYSCON_DEVCFG_IONU2 (1<<28)
-#define EP93XX_SYSCON_DEVCFG_GONK (1<<27)
-#define EP93XX_SYSCON_DEVCFG_TONG (1<<26)
-#define EP93XX_SYSCON_DEVCFG_MONG (1<<25)
-#define EP93XX_SYSCON_DEVCFG_U3EN 24
-#define EP93XX_SYSCON_DEVCFG_CPENA (1<<23)
-#define EP93XX_SYSCON_DEVCFG_A2ONG (1<<22)
-#define EP93XX_SYSCON_DEVCFG_A1ONG (1<<21)
-#define EP93XX_SYSCON_DEVCFG_U2EN 20
-#define EP93XX_SYSCON_DEVCFG_EXVC (1<<19)
-#define EP93XX_SYSCON_DEVCFG_U1EN 18
-#define EP93XX_SYSCON_DEVCFG_TIN (1<<17)
-#define EP93XX_SYSCON_DEVCFG_HC3IN (1<<15)
-#define EP93XX_SYSCON_DEVCFG_HC3EN (1<<14)
-#define EP93XX_SYSCON_DEVCFG_HC1IN (1<<13)
-#define EP93XX_SYSCON_DEVCFG_HC1EN (1<<12)
-#define EP93XX_SYSCON_DEVCFG_HONIDE (1<<11)
-#define EP93XX_SYSCON_DEVCFG_GONIDE (1<<10)
-#define EP93XX_SYSCON_DEVCFG_PONG (1<<9)
-#define EP93XX_SYSCON_DEVCFG_EONIDE (1<<8)
-#define EP93XX_SYSCON_DEVCFG_I2SONSSP (1<<7)
-#define EP93XX_SYSCON_DEVCFG_I2SONAC97 (1<<6)
-#define EP93XX_SYSCON_DEVCFG_RASONP3 (1<<4)
-#define EP93XX_SYSCON_DEVCFG_RAS (1<<3)
-#define EP93XX_SYSCON_DEVCFG_ADCPD (1<<2)
-#define EP93XX_SYSCON_DEVCFG_KEYS (1<<1)
-#define EP93XX_SYSCON_DEVCFG_SHENA (1<<0)
-#define EP93XX_SYSCON_VIDCLKDIV EP93XX_SYSCON_REG(0x84)
-#define EP93XX_SYSCON_CLKDIV_ENABLE 15
-#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14)
-#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13)
-#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
-#define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c)
-#define EP93XX_SYSCON_I2SCLKDIV_SENA 31
-#define EP93XX_SYSCON_I2SCLKDIV_ORIDE (1<<29)
-#define EP93XX_SYSCON_I2SCLKDIV_SPOL (1<<19)
-#define EP93XX_I2SCLKDIV_SDIV (1 << 16)
-#define EP93XX_I2SCLKDIV_LRDIV32 (0 << 17)
-#define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17)
-#define EP93XX_I2SCLKDIV_LRDIV128 (2 << 17)
-#define EP93XX_I2SCLKDIV_LRDIV_MASK (3 << 17)
-#define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90)
-#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN 31
-#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV 16
-#define EP93XX_SYSCON_KEYTCHCLKDIV_KEN 15
-#define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0)
-#define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c)
-#define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000)
-#define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28)
-#define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8)
-#define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7)
-#define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6)
-#define EP93XX_SYSCON_SYSCFG_LASDO (1<<5)
-#define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4)
-#define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3)
-#define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1)
-#define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0)
-#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
-
-/* EP93xx System Controller software locked register write */
-void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg);
-void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits);
-
-static inline void ep93xx_devcfg_set_bits(unsigned int bits)
-{
- ep93xx_devcfg_set_clear(bits, 0x00);
-}
-
-static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
-{
- ep93xx_devcfg_set_clear(0x00, bits);
-}
-
-#endif /* _EP93XX_SOC_H */
diff --git a/arch/arm/mach-ep93xx/timer-ep93xx.c b/arch/arm/mach-ep93xx/timer-ep93xx.c
deleted file mode 100644
index a9efa7bc2fa1..000000000000
--- a/arch/arm/mach-ep93xx/timer-ep93xx.c
+++ /dev/null
@@ -1,143 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/clocksource.h>
-#include <linux/clockchips.h>
-#include <linux/sched_clock.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <asm/mach/time.h>
-#include "soc.h"
-#include "platform.h"
-
-/*************************************************************************
- * Timer handling for EP93xx
- *************************************************************************
- * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
- * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
- * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
- * is free-running, and can't generate interrupts.
- *
- * The 508 kHz timers are ideal for use for the timer interrupt, as the
- * most common values of HZ divide 508 kHz nicely. We pick the 32 bit
- * timer (timer 3) to get as long sleep intervals as possible when using
- * CONFIG_NO_HZ.
- *
- * The higher clock rate of timer 4 makes it a better choice than the
- * other timers for use as clock source and for sched_clock(), providing
- * a stable 40 bit time base.
- *************************************************************************
- */
-#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
-#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
-#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
-#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
-#define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
-#define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
-#define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
-#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
-#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
-#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
-#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
-#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
-#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
-#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
-#define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
-#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
-#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
-#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
-#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
-
-#define EP93XX_TIMER123_RATE 508469
-#define EP93XX_TIMER4_RATE 983040
-
-static u64 notrace ep93xx_read_sched_clock(void)
-{
- u64 ret;
-
- ret = readl(EP93XX_TIMER4_VALUE_LOW);
- ret |= ((u64) (readl(EP93XX_TIMER4_VALUE_HIGH) & 0xff) << 32);
- return ret;
-}
-
-static u64 ep93xx_clocksource_read(struct clocksource *c)
-{
- u64 ret;
-
- ret = readl(EP93XX_TIMER4_VALUE_LOW);
- ret |= ((u64) (readl(EP93XX_TIMER4_VALUE_HIGH) & 0xff) << 32);
- return (u64) ret;
-}
-
-static int ep93xx_clkevt_set_next_event(unsigned long next,
- struct clock_event_device *evt)
-{
- /* Default mode: periodic, off, 508 kHz */
- u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
- EP93XX_TIMER123_CONTROL_CLKSEL;
-
- /* Clear timer */
- writel(tmode, EP93XX_TIMER3_CONTROL);
-
- /* Set next event */
- writel(next, EP93XX_TIMER3_LOAD);
- writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
- EP93XX_TIMER3_CONTROL);
- return 0;
-}
-
-
-static int ep93xx_clkevt_shutdown(struct clock_event_device *evt)
-{
- /* Disable timer */
- writel(0, EP93XX_TIMER3_CONTROL);
-
- return 0;
-}
-
-static struct clock_event_device ep93xx_clockevent = {
- .name = "timer1",
- .features = CLOCK_EVT_FEAT_ONESHOT,
- .set_state_shutdown = ep93xx_clkevt_shutdown,
- .set_state_oneshot = ep93xx_clkevt_shutdown,
- .tick_resume = ep93xx_clkevt_shutdown,
- .set_next_event = ep93xx_clkevt_set_next_event,
- .rating = 300,
-};
-
-static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
-{
- struct clock_event_device *evt = dev_id;
-
- /* Writing any value clears the timer interrupt */
- writel(1, EP93XX_TIMER3_CLEAR);
-
- evt->event_handler(evt);
-
- return IRQ_HANDLED;
-}
-
-void __init ep93xx_timer_init(void)
-{
- int irq = IRQ_EP93XX_TIMER3;
- unsigned long flags = IRQF_TIMER | IRQF_IRQPOLL;
-
- /* Enable and register clocksource and sched_clock on timer 4 */
- writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
- EP93XX_TIMER4_VALUE_HIGH);
- clocksource_mmio_init(NULL, "timer4",
- EP93XX_TIMER4_RATE, 200, 40,
- ep93xx_clocksource_read);
- sched_clock_register(ep93xx_read_sched_clock, 40,
- EP93XX_TIMER4_RATE);
-
- /* Set up clockevent on timer 3 */
- if (request_irq(irq, ep93xx_timer_interrupt, flags, "ep93xx timer",
- &ep93xx_clockevent))
- pr_err("Failed to request irq %d (ep93xx timer)\n", irq);
- clockevents_config_and_register(&ep93xx_clockevent,
- EP93XX_TIMER123_RATE,
- 1,
- 0xffffffffU);
-}
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
deleted file mode 100644
index 0bbdf587c685..000000000000
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ /dev/null
@@ -1,422 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * arch/arm/mach-ep93xx/ts72xx.c
- * Technologic Systems TS72xx SBC support.
- *
- * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
- */
-
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/mtd/platnand.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/flash.h>
-#include <linux/spi/mmc_spi.h>
-#include <linux/mmc/host.h>
-#include <linux/platform_data/spi-ep93xx.h>
-#include <linux/gpio/machine.h>
-
-#include "gpio-ep93xx.h"
-#include "hardware.h"
-
-#include <asm/mach-types.h>
-#include <asm/mach/map.h>
-#include <asm/mach/arch.h>
-
-#include "soc.h"
-#include "ts72xx.h"
-
-/*************************************************************************
- * IO map
- *************************************************************************/
-static struct map_desc ts72xx_io_desc[] __initdata = {
- {
- .virtual = (unsigned long)TS72XX_MODEL_VIRT_BASE,
- .pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
- .length = TS72XX_MODEL_SIZE,
- .type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
- .pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
- .length = TS72XX_OPTIONS_SIZE,
- .type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
- .pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
- .length = TS72XX_OPTIONS2_SIZE,
- .type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
- .pfn = __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
- .length = TS72XX_CPLDVER_SIZE,
- .type = MT_DEVICE,
- }
-};
-
-static void __init ts72xx_map_io(void)
-{
- ep93xx_map_io();
- iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
-}
-
-
-/*************************************************************************
- * NAND flash
- *************************************************************************/
-#define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */
-#define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */
-
-static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
- int cmd, unsigned int ctrl)
-{
- if (ctrl & NAND_CTRL_CHANGE) {
- void __iomem *addr = chip->legacy.IO_ADDR_R;
- unsigned char bits;
-
- addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
-
- bits = __raw_readb(addr) & ~0x07;
- bits |= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */
- bits |= (ctrl & NAND_CLE); /* bit 1 -> bit 1 */
- bits |= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */
-
- __raw_writeb(bits, addr);
- }
-
- if (cmd != NAND_CMD_NONE)
- __raw_writeb(cmd, chip->legacy.IO_ADDR_W);
-}
-
-static int ts72xx_nand_device_ready(struct nand_chip *chip)
-{
- void __iomem *addr = chip->legacy.IO_ADDR_R;
-
- addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
-
- return !!(__raw_readb(addr) & 0x20);
-}
-
-#define TS72XX_BOOTROM_PART_SIZE (SZ_16K)
-#define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M)
-
-static struct mtd_partition ts72xx_nand_parts[] = {
- {
- .name = "TS-BOOTROM",
- .offset = 0,
- .size = TS72XX_BOOTROM_PART_SIZE,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- }, {
- .name = "Linux",
- .offset = MTDPART_OFS_RETAIN,
- .size = TS72XX_REDBOOT_PART_SIZE,
- /* leave so much for last partition */
- }, {
- .name = "RedBoot",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- },
-};
-
-static struct platform_nand_data ts72xx_nand_data = {
- .chip = {
- .nr_chips = 1,
- .chip_offset = 0,
- .chip_delay = 15,
- },
- .ctrl = {
- .cmd_ctrl = ts72xx_nand_hwcontrol,
- .dev_ready = ts72xx_nand_device_ready,
- },
-};
-
-static struct resource ts72xx_nand_resource[] = {
- {
- .start = 0, /* filled in later */
- .end = 0, /* filled in later */
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device ts72xx_nand_flash = {
- .name = "gen_nand",
- .id = -1,
- .dev.platform_data = &ts72xx_nand_data,
- .resource = ts72xx_nand_resource,
- .num_resources = ARRAY_SIZE(ts72xx_nand_resource),
-};
-
-static void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
- resource_size_t start)
-{
- /*
- * TS7200 has NOR flash all other TS72xx board have NAND flash.
- */
- if (board_is_ts7200()) {
- ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
- } else {
- ts72xx_nand_resource[0].start = start;
- ts72xx_nand_resource[0].end = start + SZ_16M - 1;
-
- ts72xx_nand_data.chip.partitions = parts;
- ts72xx_nand_data.chip.nr_partitions = n;
-
- platform_device_register(&ts72xx_nand_flash);
- }
-}
-
-/*************************************************************************
- * RTC M48T86
- *************************************************************************/
-#define TS72XX_RTC_INDEX_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x00800000)
-#define TS72XX_RTC_DATA_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x01700000)
-
-static struct resource ts72xx_rtc_resources[] = {
- DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
- DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
-};
-
-static struct platform_device ts72xx_rtc_device = {
- .name = "rtc-m48t86",
- .id = -1,
- .resource = ts72xx_rtc_resources,
- .num_resources = ARRAY_SIZE(ts72xx_rtc_resources),
-};
-
-/*************************************************************************
- * Watchdog (in CPLD)
- *************************************************************************/
-#define TS72XX_WDT_CONTROL_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03800000)
-#define TS72XX_WDT_FEED_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03c00000)
-
-static struct resource ts72xx_wdt_resources[] = {
- DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
- DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
-};
-
-static struct platform_device ts72xx_wdt_device = {
- .name = "ts72xx-wdt",
- .id = -1,
- .resource = ts72xx_wdt_resources,
- .num_resources = ARRAY_SIZE(ts72xx_wdt_resources),
-};
-
-/*************************************************************************
- * ETH
- *************************************************************************/
-static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
- .phy_id = 1,
-};
-
-/*************************************************************************
- * SPI SD/MMC host
- *************************************************************************/
-#define BK3_EN_SDCARD_PHYS_BASE 0x12400000
-#define BK3_EN_SDCARD_PWR 0x0
-#define BK3_DIS_SDCARD_PWR 0x0C
-static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
-{
- void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);
-
- if (!pwr_sd) {
- pr_err("Failed to enable SD card power!");
- return;
- }
-
- pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
- !!vdd ? "ON" : "OFF", vdd);
-
- if (!!vdd)
- __raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
- else
- __raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);
-
- iounmap(pwr_sd);
-}
-
-static struct mmc_spi_platform_data bk3_spi_mmc_data = {
- .detect_delay = 500,
- .powerup_msecs = 100,
- .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
- .caps = MMC_CAP_NONREMOVABLE,
- .setpower = bk3_mmc_spi_setpower,
-};
-
-/*************************************************************************
- * SPI Bus - SD card access
- *************************************************************************/
-static struct spi_board_info bk3_spi_board_info[] __initdata = {
- {
- .modalias = "mmc_spi",
- .platform_data = &bk3_spi_mmc_data,
- .max_speed_hz = 7.4E6,
- .bus_num = 0,
- .chip_select = 0,
- .mode = SPI_MODE_0,
- },
-};
-
-/*
- * This is a stub -> the FGPIO[3] pin is not connected on the schematic
- * The all work is performed automatically by !SPI_FRAME (SFRM1) and
- * goes through CPLD
- */
-static struct gpiod_lookup_table bk3_spi_cs_gpio_table = {
- .dev_id = "spi0",
- .table = {
- GPIO_LOOKUP("gpio-ep93xx.5", 3, "cs", GPIO_ACTIVE_LOW),
- { },
- },
-};
-
-static struct ep93xx_spi_info bk3_spi_master __initdata = {
- .use_dma = 1,
-};
-
-/*************************************************************************
- * TS72XX support code
- *************************************************************************/
-#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
-
-/* Relative to EP93XX_CS1_PHYS_BASE */
-#define TS73XX_FPGA_LOADER_BASE 0x03c00000
-
-static struct resource ts73xx_fpga_resources[] = {
- {
- .start = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
- .end = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device ts73xx_fpga_device = {
- .name = "ts73xx-fpga-mgr",
- .id = -1,
- .resource = ts73xx_fpga_resources,
- .num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
-};
-
-#endif
-
-/*************************************************************************
- * SPI Bus
- *************************************************************************/
-static struct spi_board_info ts72xx_spi_devices[] __initdata = {
- {
- .modalias = "tmp122",
- .max_speed_hz = 2 * 1000 * 1000,
- .bus_num = 0,
- .chip_select = 0,
- },
-};
-
-static struct gpiod_lookup_table ts72xx_spi_cs_gpio_table = {
- .dev_id = "spi0",
- .table = {
- /* DIO_17 */
- GPIO_LOOKUP("gpio-ep93xx.5", 2, "cs", GPIO_ACTIVE_LOW),
- { },
- },
-};
-
-static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
- /* Intentionally left blank */
-};
-
-static void __init ts72xx_init_machine(void)
-{
- ep93xx_init_devices();
- ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
- is_ts9420_installed() ?
- EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
- platform_device_register(&ts72xx_rtc_device);
- platform_device_register(&ts72xx_wdt_device);
-
- ep93xx_register_eth(&ts72xx_eth_data, 1);
-#if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
- if (board_is_ts7300())
- platform_device_register(&ts73xx_fpga_device);
-#endif
- gpiod_add_lookup_table(&ts72xx_spi_cs_gpio_table);
- ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
- ARRAY_SIZE(ts72xx_spi_devices));
-}
-
-MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
- /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
- .atag_offset = 0x100,
- .nr_irqs = NR_EP93XX_IRQS,
- .map_io = ts72xx_map_io,
- .init_irq = ep93xx_init_irq,
- .init_time = ep93xx_timer_init,
- .init_machine = ts72xx_init_machine,
- .restart = ep93xx_restart,
-MACHINE_END
-
-/*************************************************************************
- * EP93xx I2S audio peripheral handling
- *************************************************************************/
-static struct resource ep93xx_i2s_resource[] = {
- DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
- DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
-};
-
-static struct platform_device ep93xx_i2s_device = {
- .name = "ep93xx-spilink-i2s",
- .id = -1,
- .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
- .resource = ep93xx_i2s_resource,
-};
-
-/*************************************************************************
- * BK3 support code
- *************************************************************************/
-static struct mtd_partition bk3_nand_parts[] = {
- {
- .name = "System",
- .offset = 0x00000000,
- .size = 0x01e00000,
- }, {
- .name = "Data",
- .offset = 0x01e00000,
- .size = 0x05f20000
- }, {
- .name = "RedBoot",
- .offset = 0x07d20000,
- .size = 0x002e0000,
- .mask_flags = MTD_WRITEABLE, /* force RO */
- },
-};
-
-static void __init bk3_init_machine(void)
-{
- ep93xx_init_devices();
-
- ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
- EP93XX_CS6_PHYS_BASE);
-
- ep93xx_register_eth(&ts72xx_eth_data, 1);
-
- gpiod_add_lookup_table(&bk3_spi_cs_gpio_table);
- ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
- ARRAY_SIZE(bk3_spi_board_info));
-
- /* Configure ep93xx's I2S to use AC97 pins */
- ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
- platform_device_register(&ep93xx_i2s_device);
-}
-
-MACHINE_START(BK3, "Liebherr controller BK3.1")
- /* Maintainer: Lukasz Majewski <lukma@denx.de> */
- .atag_offset = 0x100,
- .nr_irqs = NR_EP93XX_IRQS,
- .map_io = ts72xx_map_io,
- .init_irq = ep93xx_init_irq,
- .init_time = ep93xx_timer_init,
- .init_machine = bk3_init_machine,
- .restart = ep93xx_restart,
-MACHINE_END
diff --git a/arch/arm/mach-ep93xx/ts72xx.h b/arch/arm/mach-ep93xx/ts72xx.h
deleted file mode 100644
index 00b4941d29c9..000000000000
--- a/arch/arm/mach-ep93xx/ts72xx.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * arch/arm/mach-ep93xx/include/mach/ts72xx.h
- */
-
-/*
- * TS72xx memory map:
- *
- * virt phys size
- * febff000 22000000 4K model number register (bits 0-2)
- * febfe000 22400000 4K options register
- * febfd000 22800000 4K options register #2
- * febfc000 23400000 4K CPLD version register
- */
-
-#ifndef __TS72XX_H_
-#define __TS72XX_H_
-
-#define TS72XX_MODEL_PHYS_BASE 0x22000000
-#define TS72XX_MODEL_VIRT_BASE IOMEM(0xfebff000)
-#define TS72XX_MODEL_SIZE 0x00001000
-
-#define TS72XX_MODEL_TS7200 0x00
-#define TS72XX_MODEL_TS7250 0x01
-#define TS72XX_MODEL_TS7260 0x02
-#define TS72XX_MODEL_TS7300 0x03
-#define TS72XX_MODEL_TS7400 0x04
-#define TS72XX_MODEL_MASK 0x07
-
-
-#define TS72XX_OPTIONS_PHYS_BASE 0x22400000
-#define TS72XX_OPTIONS_VIRT_BASE IOMEM(0xfebfe000)
-#define TS72XX_OPTIONS_SIZE 0x00001000
-
-#define TS72XX_OPTIONS_COM2_RS485 0x02
-#define TS72XX_OPTIONS_MAX197 0x01
-
-
-#define TS72XX_OPTIONS2_PHYS_BASE 0x22800000
-#define TS72XX_OPTIONS2_VIRT_BASE IOMEM(0xfebfd000)
-#define TS72XX_OPTIONS2_SIZE 0x00001000
-
-#define TS72XX_OPTIONS2_TS9420 0x04
-#define TS72XX_OPTIONS2_TS9420_BOOT 0x02
-
-#define TS72XX_CPLDVER_PHYS_BASE 0x23400000
-#define TS72XX_CPLDVER_VIRT_BASE IOMEM(0xfebfc000)
-#define TS72XX_CPLDVER_SIZE 0x00001000
-
-#ifndef __ASSEMBLY__
-
-static inline int ts72xx_model(void)
-{
- return __raw_readb(TS72XX_MODEL_VIRT_BASE) & TS72XX_MODEL_MASK;
-}
-
-static inline int board_is_ts7200(void)
-{
- return ts72xx_model() == TS72XX_MODEL_TS7200;
-}
-
-static inline int board_is_ts7250(void)
-{
- return ts72xx_model() == TS72XX_MODEL_TS7250;
-}
-
-static inline int board_is_ts7260(void)
-{
- return ts72xx_model() == TS72XX_MODEL_TS7260;
-}
-
-static inline int board_is_ts7300(void)
-{
- return ts72xx_model() == TS72XX_MODEL_TS7300;
-}
-
-static inline int board_is_ts7400(void)
-{
- return ts72xx_model() == TS72XX_MODEL_TS7400;
-}
-
-static inline int is_max197_installed(void)
-{
- return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) &
- TS72XX_OPTIONS_MAX197);
-}
-
-static inline int is_ts9420_installed(void)
-{
- return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) &
- TS72XX_OPTIONS2_TS9420);
-}
-#endif
-#endif /* __TS72XX_H_ */
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
deleted file mode 100644
index 020223b0be2b..000000000000
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ /dev/null
@@ -1,311 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * arch/arm/mach-ep93xx/vision_ep9307.c
- * Vision Engraving Systems EP9307 SoM support.
- *
- * Copyright (C) 2008-2011 Vision Engraving Systems
- * H Hartley Sweeten <hsweeten@visionengravers.com>
- */
-
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/irq.h>
-#include <linux/gpio.h>
-#include <linux/gpio/machine.h>
-#include <linux/fb.h>
-#include <linux/io.h>
-#include <linux/mtd/partitions.h>
-#include <linux/i2c.h>
-#include <linux/platform_data/pca953x.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/flash.h>
-#include <linux/spi/mmc_spi.h>
-#include <linux/mmc/host.h>
-
-#include <sound/cs4271.h>
-
-#include "hardware.h"
-#include <linux/platform_data/video-ep93xx.h>
-#include <linux/platform_data/spi-ep93xx.h>
-#include "gpio-ep93xx.h"
-
-#include <asm/mach-types.h>
-#include <asm/mach/map.h>
-#include <asm/mach/arch.h>
-
-#include "soc.h"
-
-/*************************************************************************
- * Static I/O mappings for the FPGA
- *************************************************************************/
-#define VISION_PHYS_BASE EP93XX_CS7_PHYS_BASE
-#define VISION_VIRT_BASE 0xfebff000
-
-static struct map_desc vision_io_desc[] __initdata = {
- {
- .virtual = VISION_VIRT_BASE,
- .pfn = __phys_to_pfn(VISION_PHYS_BASE),
- .length = SZ_4K,
- .type = MT_DEVICE,
- },
-};
-
-static void __init vision_map_io(void)
-{
- ep93xx_map_io();
-
- iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc));
-}
-
-/*************************************************************************
- * Ethernet
- *************************************************************************/
-static struct ep93xx_eth_data vision_eth_data __initdata = {
- .phy_id = 1,
-};
-
-/*************************************************************************
- * Framebuffer
- *************************************************************************/
-#define VISION_LCD_ENABLE EP93XX_GPIO_LINE_EGPIO1
-
-static int vision_lcd_setup(struct platform_device *pdev)
-{
- int err;
-
- err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH,
- dev_name(&pdev->dev));
- if (err)
- return err;
-
- ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS |
- EP93XX_SYSCON_DEVCFG_RASONP3 |
- EP93XX_SYSCON_DEVCFG_EXVC);
-
- return 0;
-}
-
-static void vision_lcd_teardown(struct platform_device *pdev)
-{
- gpio_free(VISION_LCD_ENABLE);
-}
-
-static void vision_lcd_blank(int blank_mode, struct fb_info *info)
-{
- if (blank_mode)
- gpio_set_value(VISION_LCD_ENABLE, 0);
- else
- gpio_set_value(VISION_LCD_ENABLE, 1);
-}
-
-static struct ep93xxfb_mach_info ep93xxfb_info __initdata = {
- .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING,
- .setup = vision_lcd_setup,
- .teardown = vision_lcd_teardown,
- .blank = vision_lcd_blank,
-};
-
-
-/*************************************************************************
- * GPIO Expanders
- *************************************************************************/
-#define PCA9539_74_GPIO_BASE (EP93XX_GPIO_LINE_MAX + 1)
-#define PCA9539_75_GPIO_BASE (PCA9539_74_GPIO_BASE + 16)
-#define PCA9539_76_GPIO_BASE (PCA9539_75_GPIO_BASE + 16)
-#define PCA9539_77_GPIO_BASE (PCA9539_76_GPIO_BASE + 16)
-
-static struct pca953x_platform_data pca953x_74_gpio_data = {
- .gpio_base = PCA9539_74_GPIO_BASE,
- .irq_base = EP93XX_BOARD_IRQ(0),
-};
-
-static struct pca953x_platform_data pca953x_75_gpio_data = {
- .gpio_base = PCA9539_75_GPIO_BASE,
- .irq_base = -1,
-};
-
-static struct pca953x_platform_data pca953x_76_gpio_data = {
- .gpio_base = PCA9539_76_GPIO_BASE,
- .irq_base = -1,
-};
-
-static struct pca953x_platform_data pca953x_77_gpio_data = {
- .gpio_base = PCA9539_77_GPIO_BASE,
- .irq_base = -1,
-};
-
-/*************************************************************************
- * I2C Bus
- *************************************************************************/
-
-static struct i2c_board_info vision_i2c_info[] __initdata = {
- {
- I2C_BOARD_INFO("isl1208", 0x6f),
- .irq = IRQ_EP93XX_EXT1,
- }, {
- I2C_BOARD_INFO("pca9539", 0x74),
- .platform_data = &pca953x_74_gpio_data,
- }, {
- I2C_BOARD_INFO("pca9539", 0x75),
- .platform_data = &pca953x_75_gpio_data,
- }, {
- I2C_BOARD_INFO("pca9539", 0x76),
- .platform_data = &pca953x_76_gpio_data,
- }, {
- I2C_BOARD_INFO("pca9539", 0x77),
- .platform_data = &pca953x_77_gpio_data,
- },
-};
-
-/*************************************************************************
- * SPI CS4271 Audio Codec
- *************************************************************************/
-static struct cs4271_platform_data vision_cs4271_data = {
- .gpio_nreset = EP93XX_GPIO_LINE_H(2),
-};
-
-/*************************************************************************
- * SPI Flash
- *************************************************************************/
-static struct mtd_partition vision_spi_flash_partitions[] = {
- {
- .name = "SPI bootstrap",
- .offset = 0,
- .size = SZ_4K,
- }, {
- .name = "Bootstrap config",
- .offset = MTDPART_OFS_APPEND,
- .size = SZ_4K,
- }, {
- .name = "System config",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- },
-};
-
-static struct flash_platform_data vision_spi_flash_data = {
- .name = "SPI Flash",
- .parts = vision_spi_flash_partitions,
- .nr_parts = ARRAY_SIZE(vision_spi_flash_partitions),
-};
-
-/*************************************************************************
- * SPI SD/MMC host
- *************************************************************************/
-static struct mmc_spi_platform_data vision_spi_mmc_data = {
- .detect_delay = 100,
- .powerup_msecs = 100,
- .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
- .caps2 = MMC_CAP2_RO_ACTIVE_HIGH,
-};
-
-static struct gpiod_lookup_table vision_spi_mmc_gpio_table = {
- .dev_id = "mmc_spi.2", /* "mmc_spi @ CS2 */
- .table = {
- /* Card detect */
- GPIO_LOOKUP_IDX("gpio-ep93xx.1", 7, NULL, 0, GPIO_ACTIVE_LOW),
- /* Write protect */
- GPIO_LOOKUP_IDX("gpio-ep93xx.5", 0, NULL, 1, GPIO_ACTIVE_HIGH),
- { },
- },
-};
-
-/*************************************************************************
- * SPI Bus
- *************************************************************************/
-static struct spi_board_info vision_spi_board_info[] __initdata = {
- {
- .modalias = "cs4271",
- .platform_data = &vision_cs4271_data,
- .max_speed_hz = 6000000,
- .bus_num = 0,
- .chip_select = 0,
- .mode = SPI_MODE_3,
- }, {
- .modalias = "sst25l",
- .platform_data = &vision_spi_flash_data,
- .max_speed_hz = 20000000,
- .bus_num = 0,
- .chip_select = 1,
- .mode = SPI_MODE_3,
- }, {
- .modalias = "mmc_spi",
- .platform_data = &vision_spi_mmc_data,
- .max_speed_hz = 20000000,
- .bus_num = 0,
- .chip_select = 2,
- .mode = SPI_MODE_3,
- },
-};
-
-static struct gpiod_lookup_table vision_spi_cs_gpio_table = {
- .dev_id = "spi0",
- .table = {
- GPIO_LOOKUP_IDX("gpio-ep93xx.0", 6, "cs", 0, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("gpio-ep93xx.0", 7, "cs", 1, GPIO_ACTIVE_LOW),
- GPIO_LOOKUP_IDX("gpio-ep93xx.6", 2, "cs", 2, GPIO_ACTIVE_LOW),
- { },
- },
-};
-
-static struct ep93xx_spi_info vision_spi_master __initdata = {
- .use_dma = 1,
-};
-
-/*************************************************************************
- * I2S Audio
- *************************************************************************/
-static struct platform_device vision_audio_device = {
- .name = "edb93xx-audio",
- .id = -1,
-};
-
-static void __init vision_register_i2s(void)
-{
- ep93xx_register_i2s();
- platform_device_register(&vision_audio_device);
-}
-
-/*************************************************************************
- * Machine Initialization
- *************************************************************************/
-static void __init vision_init_machine(void)
-{
- ep93xx_init_devices();
- ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M);
- ep93xx_register_eth(&vision_eth_data, 1);
- ep93xx_register_fb(&ep93xxfb_info);
- ep93xx_register_pwm(1, 0);
-
- /*
- * Request the gpio expander's interrupt gpio line now to prevent
- * the kernel from doing a WARN in gpiolib:gpio_ensure_requested().
- */
- if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN,
- "pca9539:74"))
- pr_warn("cannot request interrupt gpio for pca9539:74\n");
-
- vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7));
-
- ep93xx_register_i2c(vision_i2c_info,
- ARRAY_SIZE(vision_i2c_info));
- gpiod_add_lookup_table(&vision_spi_mmc_gpio_table);
- gpiod_add_lookup_table(&vision_spi_cs_gpio_table);
- ep93xx_register_spi(&vision_spi_master, vision_spi_board_info,
- ARRAY_SIZE(vision_spi_board_info));
- vision_register_i2s();
-}
-
-MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
- /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
- .atag_offset = 0x100,
- .nr_irqs = NR_EP93XX_IRQS + EP93XX_BOARD_IRQS,
- .map_io = vision_map_io,
- .init_irq = ep93xx_init_irq,
- .init_time = ep93xx_timer_init,
- .init_machine = vision_init_machine,
- .restart = ep93xx_restart,
-MACHINE_END
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 40/42] ARM: ep93xx: soc: drop defines
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (38 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 39/42] ARM: ep93xx: delete all boardfiles Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:11 ` [PATCH v4 41/42] ARM: dts: ep93xx: Add EDB9302 DT Nikita Shubin via B4 Relay
` (3 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Nikita Shubin, Damien Le Moal, Linus Walleij,
Uwe Kleine-König, Dmitry Torokhov
Cc: Alexander Sverdlin, Sergey Shtylyov, linux-kernel, Arnd Bergmann,
Alexander Sverdlin
From: Nikita Shubin <nikita.shubin@maquefel.me>
Remove unnecessary defines, as we dropped board files.
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
include/linux/platform_data/eth-ep93xx.h | 10 ---------
include/linux/platform_data/keypad-ep93xx.h | 32 -----------------------------
include/linux/soc/cirrus/ep93xx.h | 12 -----------
3 files changed, 54 deletions(-)
diff --git a/include/linux/platform_data/eth-ep93xx.h b/include/linux/platform_data/eth-ep93xx.h
deleted file mode 100644
index 8eef637a804d..000000000000
--- a/include/linux/platform_data/eth-ep93xx.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef _LINUX_PLATFORM_DATA_ETH_EP93XX
-#define _LINUX_PLATFORM_DATA_ETH_EP93XX
-
-struct ep93xx_eth_data {
- unsigned char dev_addr[6];
- unsigned char phy_id;
-};
-
-#endif
diff --git a/include/linux/platform_data/keypad-ep93xx.h b/include/linux/platform_data/keypad-ep93xx.h
deleted file mode 100644
index 3054fced8509..000000000000
--- a/include/linux/platform_data/keypad-ep93xx.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __KEYPAD_EP93XX_H
-#define __KEYPAD_EP93XX_H
-
-struct matrix_keymap_data;
-
-/* flags for the ep93xx_keypad driver */
-#define EP93XX_KEYPAD_DISABLE_3_KEY (1<<0) /* disable 3-key reset */
-#define EP93XX_KEYPAD_DIAG_MODE (1<<1) /* diagnostic mode */
-#define EP93XX_KEYPAD_BACK_DRIVE (1<<2) /* back driving mode */
-#define EP93XX_KEYPAD_TEST_MODE (1<<3) /* scan only column 0 */
-#define EP93XX_KEYPAD_AUTOREPEAT (1<<4) /* enable key autorepeat */
-
-/**
- * struct ep93xx_keypad_platform_data - platform specific device structure
- * @keymap_data: pointer to &matrix_keymap_data
- * @debounce: debounce start count; terminal count is 0xff
- * @prescale: row/column counter pre-scaler load value
- * @flags: see above
- */
-struct ep93xx_keypad_platform_data {
- struct matrix_keymap_data *keymap_data;
- unsigned int debounce;
- unsigned int prescale;
- unsigned int flags;
- unsigned int clk_rate;
-};
-
-#define EP93XX_MATRIX_ROWS (8)
-#define EP93XX_MATRIX_COLS (8)
-
-#endif /* __KEYPAD_EP93XX_H */
diff --git a/include/linux/soc/cirrus/ep93xx.h b/include/linux/soc/cirrus/ep93xx.h
index 3212a145ae0f..c5ac75ee2d2b 100644
--- a/include/linux/soc/cirrus/ep93xx.h
+++ b/include/linux/soc/cirrus/ep93xx.h
@@ -2,7 +2,6 @@
#ifndef _SOC_EP93XX_H
#define _SOC_EP93XX_H
-struct platform_device;
struct regmap;
#define EP93XX_CHIP_REV_D0 3
@@ -11,16 +10,6 @@ struct regmap;
#define EP93XX_CHIP_REV_E1 6
#define EP93XX_CHIP_REV_E2 7
-#if defined(CONFIG_EP93XX_SOC_COMMON)
-int ep93xx_i2s_acquire(void);
-void ep93xx_i2s_release(void);
-unsigned int ep93xx_chip_revision(void);
-
-#else
-static inline int ep93xx_i2s_acquire(void) { return 0; }
-static inline void ep93xx_i2s_release(void) {}
-static inline unsigned int ep93xx_chip_revision(void) { return 0; }
-
#if defined(CONFIG_EP93XX_SOC)
void ep93xx_regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
void ep93xx_regmap_update_bits(struct regmap *map, unsigned int reg,
@@ -32,7 +21,6 @@ static inline void ep93xx_regmap_update_bits(struct regmap *map, unsigned int re
unsigned int mask, unsigned int val)
{ }
-#endif
#endif
#endif
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 41/42] ARM: dts: ep93xx: Add EDB9302 DT
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (39 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 40/42] ARM: ep93xx: soc: drop defines Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 8:11 ` [PATCH v4 42/42] ASoC: cirrus: edb93xx: Delete driver Nikita Shubin via B4 Relay
` (2 subsequent siblings)
43 siblings, 0 replies; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Nikita Shubin,
Andre Przywara, Sudeep Holla, Paul Barker, Alexander Sverdlin
Cc: Romain Perier, Baruch Siach, Michal Simek, Rob Herring,
devicetree, linux-kernel, Arnd Bergmann, Alexander Sverdlin
From: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Add device tree for Cirrus EDB9302.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
arch/arm/boot/dts/cirrus/Makefile | 1 +
arch/arm/boot/dts/cirrus/ep93xx-edb9302.dts | 180 ++++++++++++++++++++++++++++
2 files changed, 181 insertions(+)
diff --git a/arch/arm/boot/dts/cirrus/Makefile b/arch/arm/boot/dts/cirrus/Makefile
index 211a7e2f2115..e6015983e464 100644
--- a/arch/arm/boot/dts/cirrus/Makefile
+++ b/arch/arm/boot/dts/cirrus/Makefile
@@ -4,5 +4,6 @@ dtb-$(CONFIG_ARCH_CLPS711X) += \
dtb-$(CONFIG_ARCH_CLPS711X) += \
ep7211-edb7211.dtb
dtb-$(CONFIG_ARCH_EP93XX) += \
+ ep93xx-edb9302.dtb \
ep93xx-bk3.dtb \
ep93xx-ts7250.dtb
diff --git a/arch/arm/boot/dts/cirrus/ep93xx-edb9302.dts b/arch/arm/boot/dts/cirrus/ep93xx-edb9302.dts
new file mode 100644
index 000000000000..9fa932972300
--- /dev/null
+++ b/arch/arm/boot/dts/cirrus/ep93xx-edb9302.dts
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+/*
+ * Device Tree file for Cirrus Logic EDB9302 board based on EP9302 SoC
+ */
+/dts-v1/;
+#include "ep93xx.dtsi"
+#include <dt-bindings/dma/cirrus,ep93xx-dma.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cirrus,edb9302", "cirrus,ep9301";
+ model = "cirrus,edb9302";
+
+ chosen {
+ };
+
+ memory@0 {
+ device_type = "memory";
+ /* should be set from ATAGS */
+ reg = <0x0000000 0x800000>,
+ <0x1000000 0x800000>,
+ <0x4000000 0x800000>,
+ <0x5000000 0x800000>;
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "EDB93XX";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,convert-channels = <2>;
+ simple-audio-card,convert-sample-format = "s32_le";
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s>;
+ system-clock-direction-out;
+ frame-master;
+ bitclock-master;
+ dai-sample-format = "s32_le";
+ dai-channels = <2>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&cs4271>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ led-0 {
+ label = "grled";
+ gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ function = LED_FUNCTION_HEARTBEAT;
+ };
+
+ led-1 {
+ label = "rdled";
+ gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
+ function = LED_FUNCTION_FAULT;
+ };
+ };
+};
+
+&adc {
+ status = "okay";
+};
+
+&ebi {
+ flash@60000000 {
+ compatible = "cfi-flash";
+ reg = <0x60000000 0x1000000>;
+ bank-width = <2>;
+ };
+};
+
+ð0 {
+ phy-handle = <&phy0>;
+};
+
+&gpio0 {
+ gpio-ranges = <&pinctrl 0 153 1>,
+ <&pinctrl 1 152 1>,
+ <&pinctrl 2 151 1>,
+ <&pinctrl 3 148 1>,
+ <&pinctrl 4 147 1>,
+ <&pinctrl 5 146 1>,
+ <&pinctrl 6 145 1>,
+ <&pinctrl 7 144 1>;
+};
+
+&gpio1 {
+ gpio-ranges = <&pinctrl 0 143 1>,
+ <&pinctrl 1 142 1>,
+ <&pinctrl 2 141 1>,
+ <&pinctrl 3 140 1>,
+ <&pinctrl 4 165 1>,
+ <&pinctrl 5 164 1>,
+ <&pinctrl 6 163 1>,
+ <&pinctrl 7 160 1>;
+};
+
+&gpio2 {
+ gpio-ranges = <&pinctrl 0 115 1>;
+ status = "okay";
+};
+
+&gpio4 {
+ gpio-ranges = <&pinctrl 0 97 2>;
+ status = "okay";
+};
+
+&gpio5 {
+ gpio-ranges = <&pinctrl 1 170 1>,
+ <&pinctrl 2 169 1>,
+ <&pinctrl 3 168 1>;
+};
+
+&gpio6 {
+ gpio-ranges = <&pinctrl 0 87 2>;
+ status = "okay";
+};
+
+&gpio7 {
+ gpio-ranges = <&pinctrl 2 199 4>;
+ status = "okay";
+};
+
+&i2s {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s_on_ac97_pins>;
+ status = "okay";
+};
+
+&mdio0 {
+ phy0: ethernet-phy@1 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+};
+
+&spi0 {
+ cs-gpios = <&gpio0 6 GPIO_ACTIVE_LOW
+ &gpio0 7 GPIO_ACTIVE_LOW>;
+ dmas = <&dma1 EP93XX_DMA_SSP>;
+ status = "okay";
+
+ cs4271: codec@0 {
+ compatible = "cirrus,cs4271";
+ reg = <0>;
+ #sound-dai-cells = <0>;
+ spi-max-frequency = <6000000>;
+ spi-cpol;
+ spi-cpha;
+ reset-gpio = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ at25f1024: eeprom@1 {
+ compatible = "atmel,at25";
+ reg = <1>;
+ address-width = <8>;
+ size = <0x20000>;
+ pagesize = <256>;
+ spi-max-frequency = <20000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* [PATCH v4 42/42] ASoC: cirrus: edb93xx: Delete driver
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (40 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 41/42] ARM: dts: ep93xx: Add EDB9302 DT Nikita Shubin via B4 Relay
@ 2023-09-15 8:11 ` Nikita Shubin via B4 Relay
2023-09-15 12:26 ` Mark Brown
2023-09-18 7:39 ` [PATCH v4 00/42] ep93xx device tree conversion Andy Shevchenko
2023-10-15 21:17 ` (subset) " Alexandre Belloni
43 siblings, 1 reply; 78+ messages in thread
From: Nikita Shubin via B4 Relay @ 2023-09-15 8:11 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown, Jaroslav Kysela, Takashi Iwai,
Alexander Sverdlin, Nikita Shubin, Arnd Bergmann,
Uwe Kleine-König
Cc: Takashi Iwai, linux-kernel, alsa-devel, Arnd Bergmann,
Alexander Sverdlin
From: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Can be replaced with "simple-audio-card" for the rates up to 50kHz, refer
to commit "ARM: dts: ep93xx: Add EDB9302 DT".
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me>
---
sound/soc/cirrus/Kconfig | 9 ----
sound/soc/cirrus/Makefile | 4 --
sound/soc/cirrus/edb93xx.c | 117 ---------------------------------------------
3 files changed, 130 deletions(-)
diff --git a/sound/soc/cirrus/Kconfig b/sound/soc/cirrus/Kconfig
index 38a83c4dcc2d..97def4e53fbc 100644
--- a/sound/soc/cirrus/Kconfig
+++ b/sound/soc/cirrus/Kconfig
@@ -31,12 +31,3 @@ config SND_EP93XX_SOC_I2S_WATCHDOG
endif # if SND_EP93XX_SOC_I2S
-config SND_EP93XX_SOC_EDB93XX
- tristate "SoC Audio support for Cirrus Logic EDB93xx boards"
- depends on SND_EP93XX_SOC && (MACH_EDB9301 || MACH_EDB9302 || MACH_EDB9302A || MACH_EDB9307A || MACH_EDB9315A)
- select SND_EP93XX_SOC_I2S
- select SND_SOC_CS4271_I2C if I2C
- select SND_SOC_CS4271_SPI if SPI_MASTER
- help
- Say Y or M here if you want to add support for I2S audio on the
- Cirrus Logic EDB93xx boards.
diff --git a/sound/soc/cirrus/Makefile b/sound/soc/cirrus/Makefile
index 19a86daad660..5916c03888cb 100644
--- a/sound/soc/cirrus/Makefile
+++ b/sound/soc/cirrus/Makefile
@@ -6,7 +6,3 @@ snd-soc-ep93xx-i2s-objs := ep93xx-i2s.o
obj-$(CONFIG_SND_EP93XX_SOC) += snd-soc-ep93xx.o
obj-$(CONFIG_SND_EP93XX_SOC_I2S) += snd-soc-ep93xx-i2s.o
-# EP93XX Machine Support
-snd-soc-edb93xx-objs := edb93xx.o
-
-obj-$(CONFIG_SND_EP93XX_SOC_EDB93XX) += snd-soc-edb93xx.o
diff --git a/sound/soc/cirrus/edb93xx.c b/sound/soc/cirrus/edb93xx.c
deleted file mode 100644
index f49caab21a25..000000000000
--- a/sound/soc/cirrus/edb93xx.c
+++ /dev/null
@@ -1,117 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * SoC audio for EDB93xx
- *
- * Copyright (c) 2010 Alexander Sverdlin <subaparts@yandex.ru>
- *
- * This driver support CS4271 codec being master or slave, working
- * in control port mode, connected either via SPI or I2C.
- * The data format accepted is I2S or left-justified.
- * DAPM support not implemented.
- */
-
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/module.h>
-#include <linux/soc/cirrus/ep93xx.h>
-#include <sound/core.h>
-#include <sound/pcm.h>
-#include <sound/soc.h>
-#include <asm/mach-types.h>
-
-static int edb93xx_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
-{
- struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
- struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
- struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
- int err;
- unsigned int mclk_rate;
- unsigned int rate = params_rate(params);
-
- /*
- * According to CS4271 datasheet we use MCLK/LRCK=256 for
- * rates below 50kHz and 128 for higher sample rates
- */
- if (rate < 50000)
- mclk_rate = rate * 64 * 4;
- else
- mclk_rate = rate * 64 * 2;
-
- err = snd_soc_dai_set_sysclk(codec_dai, 0, mclk_rate,
- SND_SOC_CLOCK_IN);
- if (err)
- return err;
-
- return snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_rate,
- SND_SOC_CLOCK_OUT);
-}
-
-static const struct snd_soc_ops edb93xx_ops = {
- .hw_params = edb93xx_hw_params,
-};
-
-SND_SOC_DAILINK_DEFS(hifi,
- DAILINK_COMP_ARRAY(COMP_CPU("ep93xx-i2s")),
- DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "cs4271-hifi")),
- DAILINK_COMP_ARRAY(COMP_PLATFORM("ep93xx-i2s")));
-
-static struct snd_soc_dai_link edb93xx_dai = {
- .name = "CS4271",
- .stream_name = "CS4271 HiFi",
- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
- SND_SOC_DAIFMT_CBC_CFC,
- .ops = &edb93xx_ops,
- SND_SOC_DAILINK_REG(hifi),
-};
-
-static struct snd_soc_card snd_soc_edb93xx = {
- .name = "EDB93XX",
- .owner = THIS_MODULE,
- .dai_link = &edb93xx_dai,
- .num_links = 1,
-};
-
-static int edb93xx_probe(struct platform_device *pdev)
-{
- struct snd_soc_card *card = &snd_soc_edb93xx;
- int ret;
-
- ret = ep93xx_i2s_acquire();
- if (ret)
- return ret;
-
- card->dev = &pdev->dev;
-
- ret = snd_soc_register_card(card);
- if (ret) {
- dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
- ret);
- ep93xx_i2s_release();
- }
-
- return ret;
-}
-
-static void edb93xx_remove(struct platform_device *pdev)
-{
- struct snd_soc_card *card = platform_get_drvdata(pdev);
-
- snd_soc_unregister_card(card);
- ep93xx_i2s_release();
-}
-
-static struct platform_driver edb93xx_driver = {
- .driver = {
- .name = "edb93xx-audio",
- },
- .probe = edb93xx_probe,
- .remove_new = edb93xx_remove,
-};
-
-module_platform_driver(edb93xx_driver);
-
-MODULE_AUTHOR("Alexander Sverdlin <subaparts@yandex.ru>");
-MODULE_DESCRIPTION("ALSA SoC EDB93xx");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:edb93xx-audio");
--
2.39.2
^ permalink raw reply related [flat|nested] 78+ messages in thread* Re: [PATCH v4 42/42] ASoC: cirrus: edb93xx: Delete driver
2023-09-15 8:11 ` [PATCH v4 42/42] ASoC: cirrus: edb93xx: Delete driver Nikita Shubin via B4 Relay
@ 2023-09-15 12:26 ` Mark Brown
0 siblings, 0 replies; 78+ messages in thread
From: Mark Brown @ 2023-09-15 12:26 UTC (permalink / raw)
To: nikita.shubin
Cc: Liam Girdwood, Jaroslav Kysela, Takashi Iwai, Alexander Sverdlin,
Arnd Bergmann, Uwe Kleine-König, Takashi Iwai, linux-kernel,
alsa-devel
[-- Attachment #1: Type: text/plain, Size: 350 bytes --]
On Fri, Sep 15, 2023 at 11:11:24AM +0300, Nikita Shubin via B4 Relay wrote:
> From: Alexander Sverdlin <alexander.sverdlin@gmail.com>
>
> Can be replaced with "simple-audio-card" for the rates up to 50kHz, refer
> to commit "ARM: dts: ep93xx: Add EDB9302 DT".
Please use audio-graph-card2 for new systems, it's a more flexible
replacement.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH v4 00/42] ep93xx device tree conversion
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (41 preceding siblings ...)
2023-09-15 8:11 ` [PATCH v4 42/42] ASoC: cirrus: edb93xx: Delete driver Nikita Shubin via B4 Relay
@ 2023-09-18 7:39 ` Andy Shevchenko
2023-10-15 21:17 ` (subset) " Alexandre Belloni
43 siblings, 0 replies; 78+ messages in thread
From: Andy Shevchenko @ 2023-09-18 7:39 UTC (permalink / raw)
To: nikita.shubin
Cc: Hartley Sweeten, Alexander Sverdlin, Russell King,
Lukasz Majewski, Linus Walleij, Bartosz Golaszewski,
Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Sebastian Reichel,
Daniel Lezcano, Thomas Gleixner, Alessandro Zummo,
Alexandre Belloni, Wim Van Sebroeck, Guenter Roeck,
Thierry Reding, Uwe Kleine-König, Mark Brown,
David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Vinod Koul, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, Damien Le Moal, Sergey Shtylyov,
Dmitry Torokhov, Liam Girdwood, Jaroslav Kysela, Takashi Iwai,
linux-arm-kernel, linux-kernel, linux-gpio, linux-clk,
devicetree, linux-pm, linux-rtc, linux-watchdog, linux-pwm,
linux-spi, netdev, dmaengine, linux-mtd, linux-ide, linux-input,
alsa-devel, Arnd Bergmann, Bartosz Golaszewski,
Krzysztof Kozlowski, Andrew Lunn
On Fri, Sep 15, 2023 at 11:10:42AM +0300, Nikita Shubin via B4 Relay wrote:
> This series aims to convert ep93xx from platform to full device tree support.
>
> The main goal is to receive ACK's to take it via Arnd's arm-soc branch.
>
> Major changes:
> - drop newline at the end from each YAML files
> - rename dma and clk bindings headers to match first compatible
> - shrink SoC exported functions number to only 2
> - dropped some ep93xx_pata fixes from these series
> - dropped m48t86 stuff from these series
>
> Bit thanks to Andy Shevchenko for thorough review.
You are welcome!
Dunno if you have used --patience when formatted the patches, but I think
you should, if hadn't, for the next version. It will help a lot in reviewing
and understanding the changes.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 78+ messages in thread* Re: (subset) [PATCH v4 00/42] ep93xx device tree conversion
2023-09-15 8:10 [PATCH v4 00/42] ep93xx device tree conversion Nikita Shubin via B4 Relay
` (42 preceding siblings ...)
2023-09-18 7:39 ` [PATCH v4 00/42] ep93xx device tree conversion Andy Shevchenko
@ 2023-10-15 21:17 ` Alexandre Belloni
43 siblings, 0 replies; 78+ messages in thread
From: Alexandre Belloni @ 2023-10-15 21:17 UTC (permalink / raw)
To: Hartley Sweeten, Alexander Sverdlin, Russell King,
Lukasz Majewski, Linus Walleij, Bartosz Golaszewski,
Andy Shevchenko, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Sebastian Reichel,
Daniel Lezcano, Thomas Gleixner, Alessandro Zummo,
Wim Van Sebroeck, Guenter Roeck, Thierry Reding,
Uwe Kleine-König, Mark Brown, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Vinod Koul, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra, Damien Le Moal,
Sergey Shtylyov, Dmitry Torokhov, Liam Girdwood, Jaroslav Kysela,
Takashi Iwai, Nikita Shubin
Cc: linux-arm-kernel, linux-kernel, linux-gpio, linux-clk,
devicetree, linux-pm, linux-rtc, linux-watchdog, linux-pwm,
linux-spi, netdev, dmaengine, linux-mtd, linux-ide, linux-input,
alsa-devel, Arnd Bergmann, Bartosz Golaszewski,
Krzysztof Kozlowski, Andy Shevchenko, Andrew Lunn
On Fri, 15 Sep 2023 11:10:42 +0300, Nikita Shubin wrote:
> This series aims to convert ep93xx from platform to full device tree support.
>
> The main goal is to receive ACK's to take it via Arnd's arm-soc branch.
>
> Major changes:
> - drop newline at the end from each YAML files
> - rename dma and clk bindings headers to match first compatible
> - shrink SoC exported functions number to only 2
> - dropped some ep93xx_pata fixes from these series
> - dropped m48t86 stuff from these series
>
> [...]
Applied, thanks!
[13/42] dt-bindings: rtc: Add Cirrus EP93xx
commit: 207bddd97881913bcb8bef84737c0971e712fbee
[14/42] rtc: ep93xx: add DT support for Cirrus EP93xx
commit: 1d70f9fe5f1c8fbd5d838223b8aec27c69a7e609
Best regards,
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 78+ messages in thread