Re: [PATCH 05/61] perf tools: Introduce c2c_decode_stats function

[Joe Mario <jmario@redhat.com>]

On 09/19/2016 01:15 PM, Nilay Vaish wrote:
> On 19 September 2016 at 08:09, Jiri Olsa <jolsa@kernel.org> wrote:
>> diff --git a/tools/perf/util/mem-events.h b/tools/perf/util/mem-events.h
>> index 7f69bf9d789d..27c6bb5abafb 100644
>> --- a/tools/perf/util/mem-events.h
>> +++ b/tools/perf/util/mem-events.h
>> @@ -2,6 +2,10 @@
>>  #define __PERF_MEM_EVENTS_H
>>
>>  #include <stdbool.h>
>> +#include <stdint.h>
>> +#include <stdio.h>
>> +#include <linux/types.h>
>> +#include "stat.h"
>>
>>  struct perf_mem_event {
>>         bool            record;
>> @@ -33,4 +37,36 @@ int perf_mem__lck_scnprintf(char *out, size_t sz, struct mem_info *mem_info);
>>
>>  int perf_script__meminfo_scnprintf(char *bf, size_t size, struct mem_info *mem_info);
>>
>> +struct c2c_stats {
>> +       int     nr_entries;
>> +
>> +       int     locks;               /* count of 'lock' transactions */
>> +       int     store;               /* count of all stores in trace */
>> +       int     st_uncache;          /* stores to uncacheable address */
>> +       int     st_noadrs;           /* cacheable store with no address */
>
> No address! Why would that happen?

[Resending without the html]

There are a small number of instructions that will trigger a perf mem event and will have no address associated with them.    Three of them include mfence, wrmsr, and rdtsc.    I believe there are at least two more.

>
>
> --
> Nilay
>