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From: Auger Eric <eric.auger@redhat.com>
To: Zenghui Yu <yuzenghui@huawei.com>, Marc Zyngier <maz@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Jason Cooper <jason@lakedaemon.net>,
	Robert Richter <rrichter@marvell.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	James Morse <james.morse@arm.com>,
	Julien Thierry <julien.thierry.kdev@gmail.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: Re: [PATCH v5 09/23] irqchip/gic-v4.1: Add initial SGI configuration
Date: Tue, 17 Mar 2020 09:36:41 +0100	[thread overview]
Message-ID: <d40dc34f-c5cf-1091-c20d-f2c02a906964@redhat.com> (raw)
In-Reply-To: <aed58073-0494-ee38-4d2f-287888ed8840@huawei.com>

Hi Zenghui,

On 3/17/20 3:02 AM, Zenghui Yu wrote:
> Hi Eric,
> 
> On 2020/3/17 1:53, Auger Eric wrote:
>> Hi Marc,
>>
>> On 3/4/20 9:33 PM, Marc Zyngier wrote:
>>> The GICv4.1 ITS has yet another new command (VSGI) which allows
>>> a VPE-targeted SGI to be configured (or have its pending state
>>> cleared). Add support for this command and plumb it into the
>>> activate irqdomain callback so that it is ready to be used.
>>>
>>> Signed-off-by: Marc Zyngier <maz@kernel.org>
>>> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
>>> ---
>>>   drivers/irqchip/irq-gic-v3-its.c   | 79 +++++++++++++++++++++++++++++-
>>>   include/linux/irqchip/arm-gic-v3.h |  3 +-
>>>   2 files changed, 80 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/irqchip/irq-gic-v3-its.c
>>> b/drivers/irqchip/irq-gic-v3-its.c
>>> index 112b452fcb40..e0db3f906f87 100644
>>> --- a/drivers/irqchip/irq-gic-v3-its.c
>>> +++ b/drivers/irqchip/irq-gic-v3-its.c
>>> @@ -380,6 +380,15 @@ struct its_cmd_desc {
>>>           struct {
>>>               struct its_vpe *vpe;
>>>           } its_invdb_cmd;
>>> +
>>> +        struct {
>>> +            struct its_vpe *vpe;
>>> +            u8 sgi;
>>> +            u8 priority;
>>> +            bool enable;
>>> +            bool group;
>>> +            bool clear;
>>> +        } its_vsgi_cmd;
>>>       };
>>>   };
>>>   @@ -528,6 +537,31 @@ static void its_encode_db(struct its_cmd_block
>>> *cmd, bool db)
>>>       its_mask_encode(&cmd->raw_cmd[2], db, 63, 63);
>>>   }
>>>   +static void its_encode_sgi_intid(struct its_cmd_block *cmd, u8 sgi)
>>> +{
>>> +    its_mask_encode(&cmd->raw_cmd[0], sgi, 35, 32);
>>> +}
>>> +
>>> +static void its_encode_sgi_priority(struct its_cmd_block *cmd, u8 prio)
>>> +{
>>> +    its_mask_encode(&cmd->raw_cmd[0], prio >> 4, 23, 20);
>>> +}
>>> +
>>> +static void its_encode_sgi_group(struct its_cmd_block *cmd, bool grp)
>>> +{
>>> +    its_mask_encode(&cmd->raw_cmd[0], grp, 10, 10);
>>> +}
>>> +
>>> +static void its_encode_sgi_clear(struct its_cmd_block *cmd, bool clr)
>>> +{
>>> +    its_mask_encode(&cmd->raw_cmd[0], clr, 9, 9);
>>> +}
>>> +
>>> +static void its_encode_sgi_enable(struct its_cmd_block *cmd, bool en)
>>> +{
>>> +    its_mask_encode(&cmd->raw_cmd[0], en, 8, 8);
>>> +}
>>> +
>>>   static inline void its_fixup_cmd(struct its_cmd_block *cmd)
>>>   {
>>>       /* Let's fixup BE commands */
>>> @@ -893,6 +927,26 @@ static struct its_vpe
>>> *its_build_invdb_cmd(struct its_node *its,
>>>       return valid_vpe(its, desc->its_invdb_cmd.vpe);
>>>   }
>>>   +static struct its_vpe *its_build_vsgi_cmd(struct its_node *its,
>>> +                      struct its_cmd_block *cmd,
>>> +                      struct its_cmd_desc *desc)
>>> +{
>>> +    if (WARN_ON(!is_v4_1(its)))
>>> +        return NULL;
>>> +
>>> +    its_encode_cmd(cmd, GITS_CMD_VSGI);
>>> +    its_encode_vpeid(cmd, desc->its_vsgi_cmd.vpe->vpe_id);
>>> +    its_encode_sgi_intid(cmd, desc->its_vsgi_cmd.sgi);
>>> +    its_encode_sgi_priority(cmd, desc->its_vsgi_cmd.priority);
>>> +    its_encode_sgi_group(cmd, desc->its_vsgi_cmd.group);
>>> +    its_encode_sgi_clear(cmd, desc->its_vsgi_cmd.clear);
>>> +    its_encode_sgi_enable(cmd, desc->its_vsgi_cmd.enable);
>>> +
>>> +    its_fixup_cmd(cmd);
>>> +
>>> +    return valid_vpe(its, desc->its_vsgi_cmd.vpe);
>>> +}
>>> +
>>>   static u64 its_cmd_ptr_to_offset(struct its_node *its,
>>>                    struct its_cmd_block *ptr)
>>>   {
>>> @@ -3870,6 +3924,21 @@ static struct irq_chip its_vpe_4_1_irq_chip = {
>>>       .irq_set_vcpu_affinity    = its_vpe_4_1_set_vcpu_affinity,
>>>   };
>>>   +static void its_configure_sgi(struct irq_data *d, bool clear)
>>> +{
>>> +    struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
>>> +    struct its_cmd_desc desc;
>>> +
>>> +    desc.its_vsgi_cmd.vpe = vpe;
>>> +    desc.its_vsgi_cmd.sgi = d->hwirq;
>>> +    desc.its_vsgi_cmd.priority = vpe->sgi_config[d->hwirq].priority;
>>> +    desc.its_vsgi_cmd.enable = vpe->sgi_config[d->hwirq].enabled;
>>> +    desc.its_vsgi_cmd.group = vpe->sgi_config[d->hwirq].group;
>>> +    desc.its_vsgi_cmd.clear = clear;
>>> +
>>> +    its_send_single_vcommand(find_4_1_its(), its_build_vsgi_cmd,
>>> &desc);
>> I see we pick up the first 4.1 ITS with find_4_1_its(). Can it happen
>> that not all of them have a mapping for that vPEID and if so we should
>> rather use one that has this mapping?
> 
> It can't happen in GICv4.1, and you may find the answer in patch #16
> ("Eagerly vmap vPEs").  I also failed to follow this logic the first
> time looking at it [*], so I think it may worth adding some comments
> on top of find_4_1_its()?
> 
> [*]
> https://lore.kernel.org/lkml/c94061be-d029-69c8-d34f-4d21081d5aba@huawei.com/

OK thank you for the pointer. Slowly moving forward ... ;-)

Eric
> 
> 
>>
>> The spec says:
>> The ITS controls must only be used on an ITS that has a mapping for that
>> vPEID.
>> Where multiple ITSs have a mapping for the vPEID, any ITS with a mapping
>> may be used.
>>
>>> +}
>>> +
>>>   static int its_sgi_set_affinity(struct irq_data *d,
>>>                   const struct cpumask *mask_val,
>>>                   bool force)
>>> @@ -3915,13 +3984,21 @@ static void its_sgi_irq_domain_free(struct
>>> irq_domain *domain,
>>>   static int its_sgi_irq_domain_activate(struct irq_domain *domain,
>>>                          struct irq_data *d, bool reserve)
>>>   {
>>> +    /* Write out the initial SGI configuration */
>>> +    its_configure_sgi(d, false);
>>>       return 0;
>>>   }
>>>     static void its_sgi_irq_domain_deactivate(struct irq_domain *domain,
>>>                         struct irq_data *d)
>>>   {
>>> -    /* Nothing to do */
>>> +    struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
>>> +
>>> +    /* First disable the SGI */
>>> +    vpe->sgi_config[d->hwirq].enabled = false;
>>> +    its_configure_sgi(d, false);
>>> +    /* Now clear the potential pending bit (yes, this is clunky) */
>> nit: Without carefuly reading the VSGI cmd notes, it is difficult to
>> understand why those 2 steps are needed: maybe replace this comment by
>> something like:
>> to change the config, clear must be set to false. Then clear is set and
>> this leaves the config unchanged. Both steps cannot be done concurrently.
>>
>> "
> 
> I think it makes sense.
> 
> 
> Thanks,
> Zenghui
> 
>>> +    its_configure_sgi(d, true);
>>>   }
>>>     static struct irq_domain_ops its_sgi_domain_ops = {
>>> diff --git a/include/linux/irqchip/arm-gic-v3.h
>>> b/include/linux/irqchip/arm-gic-v3.h
>>> index b28acfa71f82..fd3be49ac9a5 100644
>>> --- a/include/linux/irqchip/arm-gic-v3.h
>>> +++ b/include/linux/irqchip/arm-gic-v3.h
>>> @@ -502,8 +502,9 @@
>>>   #define GITS_CMD_VMAPTI            GITS_CMD_GICv4(GITS_CMD_MAPTI)
>>>   #define GITS_CMD_VMOVI            GITS_CMD_GICv4(GITS_CMD_MOVI)
>>>   #define GITS_CMD_VSYNC            GITS_CMD_GICv4(GITS_CMD_SYNC)
>>> -/* VMOVP and INVDB are the odd ones, as they dont have a physical
>>> counterpart */
>>> +/* VMOVP, VSGI and INVDB are the odd ones, as they dont have a
>>> physical counterpart */
>>>   #define GITS_CMD_VMOVP            GITS_CMD_GICv4(2)
>>> +#define GITS_CMD_VSGI            GITS_CMD_GICv4(3)
>>>   #define GITS_CMD_INVDB            GITS_CMD_GICv4(0xe)
>>>     /*
>>>
>> Thanks
>>
>> Eric
>>
>>
>> .
>>
> 


  reply	other threads:[~2020-03-17  8:36 UTC|newest]

Thread overview: 114+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-04 20:33 [PATCH v5 00/23] irqchip/gic-v4: GICv4.1 architecture support Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 01/23] irqchip/gic-v3: Use SGIs without active state if offered Marc Zyngier
2020-03-12  6:30   ` Zenghui Yu
2020-03-12  9:28     ` Marc Zyngier
2020-03-12 12:05       ` Marc Zyngier
2020-03-13  1:39         ` Zenghui Yu
2020-03-12 17:16   ` Auger Eric
2020-03-12 17:23     ` Marc Zyngier
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 02/23] irqchip/gic-v4.1: Skip absent CPUs while iterating over redistributors Marc Zyngier
2020-03-16 17:10   ` Auger Eric
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 03/23] irqchip/gic-v4.1: Ensure mutual exclusion between vPE affinity change and RD access Marc Zyngier
2020-03-12  6:56   ` Zenghui Yu
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 04/23] irqchip/gic-v4.1: Wait for completion of redistributor's INVALL operation Marc Zyngier
2020-03-20 14:23   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 05/23] irqchip/gic-v4.1: Ensure mutual exclusion betwen invalidations on the same RD Marc Zyngier
2020-03-12  7:11   ` Zenghui Yu
2020-03-20 14:23   ` Auger Eric
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 06/23] irqchip/gic-v4.1: Advertise support v4.1 to KVM Marc Zyngier
2020-03-16 17:10   ` Auger Eric
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 07/23] irqchip/gic-v4.1: Map the ITS SGIR register page Marc Zyngier
2020-03-16 17:10   ` Auger Eric
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 08/23] irqchip/gic-v4.1: Plumb skeletal VSGI irqchip Marc Zyngier
2020-03-16 17:10   ` Auger Eric
2020-03-19 10:03     ` Marc Zyngier
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 09/23] irqchip/gic-v4.1: Add initial SGI configuration Marc Zyngier
2020-03-16 17:53   ` Auger Eric
2020-03-17  2:02     ` Zenghui Yu
2020-03-17  8:36       ` Auger Eric [this message]
2020-03-19 10:20     ` Marc Zyngier
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 10/23] irqchip/gic-v4.1: Plumb mask/unmask SGI callbacks Marc Zyngier
2020-03-16 18:15   ` Auger Eric
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 11/23] irqchip/gic-v4.1: Plumb get/set_irqchip_state " Marc Zyngier
2020-03-12  7:41   ` Zenghui Yu
2020-03-16 21:43   ` Auger Eric
2020-03-19 10:27     ` Marc Zyngier
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 12/23] irqchip/gic-v4.1: Plumb set_vcpu_affinity " Marc Zyngier
2020-03-17 10:35   ` Auger Eric
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 13/23] irqchip/gic-v4.1: Move doorbell management to the GICv4 abstraction layer Marc Zyngier
2020-03-12  8:20   ` Zenghui Yu
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 14/23] irqchip/gic-v4.1: Add VSGI allocation/teardown Marc Zyngier
2020-03-12  8:06   ` Zenghui Yu
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 15/23] irqchip/gic-v4.1: Add VSGI property setup Marc Zyngier
2020-03-12  8:09   ` Zenghui Yu
2020-03-17 10:30   ` Auger Eric
2020-03-19 10:57     ` Marc Zyngier
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 16/23] irqchip/gic-v4.1: Eagerly vmap vPEs Marc Zyngier
2020-03-12  8:12   ` Zenghui Yu
2020-03-17  2:49   ` Zenghui Yu
2020-03-19 10:55     ` Marc Zyngier
2020-03-20  2:31       ` Zenghui Yu
2020-03-29 20:26   ` [tip: irq/core] " tip-bot2 for Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 17/23] KVM: arm64: GICv4.1: Let doorbells be auto-enabled Marc Zyngier
2020-03-12  8:15   ` Zenghui Yu
2020-03-17 11:04   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 18/23] KVM: arm64: GICv4.1: Add direct injection capability to SGI registers Marc Zyngier
2020-03-18  3:28   ` Zenghui Yu
2020-03-20  8:11   ` Auger Eric
2020-03-20 10:05     ` Marc Zyngier
2020-03-20 10:56       ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 19/23] KVM: arm64: GICv4.1: Allow SGIs to switch between HW and SW interrupts Marc Zyngier
2020-03-19 16:16   ` Auger Eric
2020-03-19 19:52     ` Marc Zyngier
2020-03-19 20:13       ` Auger Eric
2020-03-20  9:17         ` Marc Zyngier
2020-03-20  4:22   ` Zenghui Yu
2020-03-04 20:33 ` [PATCH v5 20/23] KVM: arm64: GICv4.1: Plumb SGI implementation selection in the distributor Marc Zyngier
2020-03-18  6:34   ` Zenghui Yu
2020-03-19 12:10     ` Marc Zyngier
2020-03-19 20:38       ` Auger Eric
2020-03-20  3:08         ` Zenghui Yu
2020-03-20  7:59           ` Auger Eric
2020-03-20  9:46             ` Marc Zyngier
2020-03-20 11:09               ` Auger Eric
2020-03-20 11:20                 ` Marc Zyngier
2020-03-20  3:53       ` Zenghui Yu
2020-03-20  9:01         ` Marc Zyngier
2020-03-23  8:11           ` Zenghui Yu
2020-03-23  8:25             ` Marc Zyngier
2020-03-23 12:40               ` Zenghui Yu
2020-03-04 20:33 ` [PATCH v5 21/23] KVM: arm64: GICv4.1: Reload VLPI configuration on distributor enable/disable Marc Zyngier
2020-03-18  3:17   ` Zenghui Yu
2020-03-19 12:18     ` Marc Zyngier
2020-03-04 20:33 ` [PATCH v5 22/23] KVM: arm64: GICv4.1: Allow non-trapping WFI when using HW SGIs Marc Zyngier
2020-03-20  4:23   ` Zenghui Yu
2020-03-20  8:12   ` Auger Eric
2020-03-04 20:33 ` [PATCH v5 23/23] KVM: arm64: GICv4.1: Expose HW-based SGIs in debugfs Marc Zyngier
2020-03-18  3:19   ` Zenghui Yu
2020-03-19 15:05   ` Auger Eric
2020-03-19 15:21     ` Marc Zyngier
2020-03-19 15:43       ` Auger Eric
2020-03-19 16:16         ` Marc Zyngier
2020-03-19 16:17           ` Auger Eric
2020-03-20  4:38       ` Zenghui Yu
2020-03-20  9:09         ` Marc Zyngier
2020-03-20 11:35           ` Zenghui Yu
2020-03-20 11:46             ` Marc Zyngier
2020-03-20 12:09               ` Zenghui Yu
2020-03-05  3:39 ` [PATCH v5 00/23] irqchip/gic-v4: GICv4.1 architecture support Zenghui Yu
2020-03-09  8:17 ` Zenghui Yu
2020-03-09  8:46   ` Marc Zyngier

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