From: Tom Lendacky <thomas.lendacky@amd.com>
To: David Woodhouse <dwmw2@infradead.org>,
Thomas Gleixner <tglx@linutronix.de>,
Borislav Petkov <bp@alien8.de>
Cc: linux-kernel@vger.kernel.org, x86 <x86@kernel.org>,
Qian Cai <cai@redhat.com>, Joerg Roedel <joro@8bytes.org>
Subject: Re: [EXTERNAL] [tip: x86/apic] x86/io_apic: Cleanup trigger/polarity helpers
Date: Tue, 10 Nov 2020 16:00:28 -0600 [thread overview]
Message-ID: <d4115cc7-3876-e012-b6ec-c525d608834f@amd.com> (raw)
In-Reply-To: <8C2E184C-D069-4C60-96B5-0758FBC6E402@infradead.org>
On 11/10/20 3:30 PM, David Woodhouse wrote:
>
>
> On 10 November 2020 21:01:17 GMT, Thomas Gleixner <tglx@linutronix.de> wrote:
>> On Tue, Nov 10 2020 at 19:21, David Woodhouse wrote:
>>
>>> On 10 November 2020 18:56:17 GMT, Thomas Gleixner
>> <tglx@linutronix.de> wrote:
>>>> On Tue, Nov 10 2020 at 18:50, Thomas Gleixner wrote:
>>>>> On Tue, Nov 10 2020 at 16:33, David Woodhouse wrote:
>>>>>> If I could get post-5.5 kernels to boot at all with the AMD IOMMU
>>>>>> enabled, I'd have a go at throwing that together now...
>>>>>
>>>>> It can share the dmar domain code. Let me frob something.
>>>>
>>>> Not much to share there and I can't access my AMD machine at the
>>>> moment. Something like the untested below should work.
>>>
>>> Does it even need its own irqdomain? Can it not just allocate
>> directly
>>> from the vector domain then program its own register directly based
>> on
>>> the irq_cfg?
>>
>> It uses pci_enable_msi() and I have no clue about that piece of
>> hardware
>> and whether that is actually required or not. If it is, then it needs a
>> domain because that's what pci_enable_msi() uses.
>
> I'd be kind of surprised if it is required, but testing on qemu is obviously not going to cut it. Tom?
Was just in the process of testing it... I still get a warning. Here's
the new backtrace:
[ 15.581115] WARNING: CPU: 6 PID: 1 at arch/x86/kernel/apic/apic.c:2527 __irq_msi_compose_msg+0x9f/0xb0
[ 15.581115] Modules linked in:
[ 15.581115] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 5.10.0-rc3-sos-custom #1
[ 15.581115] Hardware name: AMD Corporation ETHANOL_X/ETHANOL_X, BIOS REX1006G 01/25/2020
[ 15.581115] RIP: 0010:__irq_msi_compose_msg+0x9f/0xb0
[ 15.581115] Code: 01 00 74 1e 3d ff 7f 00 00 77 1f 0f b7 16 c1 e8 08 83 e0 7f c1 e0 05 66 81 e2 1f f0 09 d0 66 89 06 c3 3d ff 00 00 00 77 01 c3 <0f> 0b c3 66 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 00 0f 1f 44 00 00
[ 15.581115] RSP: 0018:ffffc900000c7c18 EFLAGS: 00010012
[ 15.581115] RAX: 0000000000000100 RBX: 0000000000000000 RCX: 0000000000000000
[ 15.581115] RDX: 0000000000000000 RSI: ffffc900000c7c20 RDI: ffff8881088341c0
[ 15.581115] RBP: ffff8881599e0428 R08: 0000000000000000 R09: ffffffffffffffff
[ 15.581115] R10: 0000000000000003 R11: 0000000000000004 R12: ffff8881088341c0
[ 15.581115] R13: 0000000000000000 R14: 0000000000000004 R15: ffff888108834180
[ 15.581115] FS: 0000000000000000(0000) GS:ffff88900d380000(0000) knlGS:0000000000000000
[ 15.581115] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 15.581115] CR2: 0000000000000000 CR3: 000000015240a000 CR4: 0000000000350ee0
[ 15.581115] Call Trace:
[ 15.581115] irq_msi_update_msg+0x4d/0x80
[ 15.581115] msi_set_affinity+0x160/0x190
[ 15.581115] irq_do_set_affinity+0x52/0x190
[ 15.581115] irq_setup_affinity+0xd7/0x170
[ 15.581115] irq_startup+0x5d/0xf0
[ 15.581115] __setup_irq+0x6b9/0x700
[ 15.581115] request_threaded_irq+0xf8/0x160
[ 15.581115] ? irq_remapping_alloc+0x4d0/0x4d0
[ 15.581115] ? e820__memblock_setup+0x7d/0x7d
[ 15.581115] iommu_init_msi+0x60/0x190
[ 15.581115] state_next+0x39d/0x665
[ 15.581115] ? e820__memblock_setup+0x7d/0x7d
[ 15.581115] iommu_go_to_state+0x24/0x28
[ 15.581115] amd_iommu_init+0x11/0x46
[ 15.581115] pci_iommu_init+0x16/0x3f
[ 15.581115] do_one_initcall+0x44/0x1d0
[ 15.581115] kernel_init_freeable+0x1e7/0x249
[ 15.581115] ? rest_init+0xb4/0xb4
[ 15.581115] kernel_init+0xa/0x10c
[ 15.581115] ret_from_fork+0x22/0x30
[ 15.581115] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 5.10.0-rc3-sos-custom #1
[ 15.581115] Hardware name: AMD Corporation ETHANOL_X/ETHANOL_X, BIOS REX1006G 01/25/2020
[ 15.581115] Call Trace:
[ 15.581115] dump_stack+0x6d/0x88
[ 15.581115] __warn.cold+0x24/0x3d
[ 15.581115] ? __irq_msi_compose_msg+0x9f/0xb0
[ 15.581115] report_bug+0xd1/0x100
[ 15.581115] handle_bug+0x35/0x80
[ 15.581115] exc_invalid_op+0x14/0x70
[ 15.581115] asm_exc_invalid_op+0x12/0x20
[ 15.581115] RIP: 0010:__irq_msi_compose_msg+0x9f/0xb0
[ 15.581115] Code: 01 00 74 1e 3d ff 7f 00 00 77 1f 0f b7 16 c1 e8 08 83 e0 7f c1 e0 05 66 81 e2 1f f0 09 d0 66 89 06 c3 3d ff 00 00 00 77 01 c3 <0f> 0b c3 66 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 00 0f 1f 44 00 00
[ 15.581115] RSP: 0018:ffffc900000c7c18 EFLAGS: 00010012
[ 15.581115] RAX: 0000000000000100 RBX: 0000000000000000 RCX: 0000000000000000
[ 15.581115] RDX: 0000000000000000 RSI: ffffc900000c7c20 RDI: ffff8881088341c0
[ 15.581115] RBP: ffff8881599e0428 R08: 0000000000000000 R09: ffffffffffffffff
[ 15.581115] R10: 0000000000000003 R11: 0000000000000004 R12: ffff8881088341c0
[ 15.581115] R13: 0000000000000000 R14: 0000000000000004 R15: ffff888108834180
[ 15.581115] irq_msi_update_msg+0x4d/0x80
[ 15.581115] msi_set_affinity+0x160/0x190
[ 15.581115] irq_do_set_affinity+0x52/0x190
[ 15.581115] irq_setup_affinity+0xd7/0x170
[ 15.581115] irq_startup+0x5d/0xf0
[ 15.581115] __setup_irq+0x6b9/0x700
[ 15.581115] request_threaded_irq+0xf8/0x160
[ 15.581115] ? irq_remapping_alloc+0x4d0/0x4d0
[ 15.581115] ? e820__memblock_setup+0x7d/0x7d
[ 15.581115] iommu_init_msi+0x60/0x190
[ 15.581115] state_next+0x39d/0x665
[ 15.581115] ? e820__memblock_setup+0x7d/0x7d
[ 15.581115] iommu_go_to_state+0x24/0x28
[ 15.581115] amd_iommu_init+0x11/0x46
[ 15.581115] pci_iommu_init+0x16/0x3f
[ 15.581115] do_one_initcall+0x44/0x1d0
[ 15.581115] kernel_init_freeable+0x1e7/0x249
[ 15.581115] ? rest_init+0xb4/0xb4
[ 15.581115] kernel_init+0xa/0x10c
[ 15.581115] ret_from_fork+0x22/0x30
[ 15.581115] ---[ end trace 05c9465e30ba6a20 ]---
Thanks,
Tom
>
next prev parent reply other threads:[~2020-11-10 22:00 UTC|newest]
Thread overview: 192+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-07 12:20 [PATCH 0/5] Fix x2apic enablement and allow up to 32768 CPUs without IR where supported David Woodhouse
2020-10-07 12:20 ` [PATCH 1/5] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse
2020-10-07 12:20 ` [PATCH 2/5] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse
2020-10-07 12:20 ` [PATCH 3/5] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse
2020-10-08 9:12 ` Peter Zijlstra
2020-10-08 17:05 ` David Woodhouse
2020-10-08 11:41 ` Thomas Gleixner
2020-10-07 12:20 ` [PATCH 4/5] x86/apic: Support 15 bits of APIC ID in IOAPIC/MSI where available David Woodhouse
2020-10-08 11:54 ` Thomas Gleixner
2020-10-08 12:02 ` Thomas Gleixner
2020-10-08 13:00 ` David Woodhouse
2020-10-07 12:20 ` [PATCH 5/5] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse
2020-10-08 12:05 ` Thomas Gleixner
2020-10-08 12:55 ` David Woodhouse
2020-10-08 16:08 ` David Woodhouse
2020-10-08 21:14 ` Thomas Gleixner
2020-10-08 21:39 ` David Woodhouse
2020-10-08 23:27 ` Thomas Gleixner
2020-10-09 6:07 ` David Woodhouse
2020-10-10 10:06 ` David Woodhouse
2020-10-10 11:44 ` Thomas Gleixner
2020-10-10 11:58 ` David Woodhouse
2020-10-11 17:12 ` Thomas Gleixner
2020-10-11 21:15 ` David Woodhouse
2020-10-12 9:33 ` Thomas Gleixner
2020-10-12 16:06 ` David Woodhouse
2020-10-12 18:38 ` Thomas Gleixner
2020-10-12 20:20 ` David Woodhouse
2020-10-12 22:13 ` Thomas Gleixner
2020-10-13 7:52 ` David Woodhouse
2020-10-13 8:11 ` [PATCH 0/9] Remove irq_remapping_get_irq_domain() David Woodhouse
2020-10-13 8:11 ` [PATCH 1/9] genirq/irqdomain: Implement get_name() method on irqchip fwnodes David Woodhouse
2020-10-13 8:11 ` [PATCH 2/9] x86/apic: Add select() method on vector irqdomain David Woodhouse
2020-10-13 8:11 ` [PATCH 3/9] iommu/amd: Implement select() method on remapping irqdomain David Woodhouse
2020-10-13 8:11 ` [PATCH 4/9] iommu/vt-d: " David Woodhouse
2020-10-13 8:11 ` [PATCH 5/9] iommu/hyper-v: " David Woodhouse
2020-10-13 8:11 ` [PATCH 6/9] x86/hpet: Use irq_find_matching_fwspec() to find " David Woodhouse
2020-10-13 8:11 ` [PATCH 7/9] x86/ioapic: " David Woodhouse
2020-10-13 8:11 ` [PATCH 8/9] x86: Kill all traces of irq_remapping_get_irq_domain() David Woodhouse
2020-10-13 8:11 ` [PATCH 9/9] iommu/vt-d: Simplify intel_irq_remapping_select() David Woodhouse
2020-10-13 9:28 ` [PATCH 5/5] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID Thomas Gleixner
2020-10-13 10:15 ` David Woodhouse
2020-10-13 10:46 ` Thomas Gleixner
2020-10-13 10:53 ` David Woodhouse
2020-10-13 11:51 ` David Woodhouse
2020-10-13 12:40 ` Thomas Gleixner
2020-10-08 11:46 ` [PATCH 1/5] x86/apic: Fix x2apic enablement without interrupt remapping Thomas Gleixner
2020-10-09 10:46 ` [PATCH v2 0/8] Fix x2apic enablement and allow up to 32768 CPUs without IR where supported David Woodhouse
2020-10-09 10:46 ` [PATCH v2 1/8] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse
2020-10-09 10:46 ` [PATCH v2 2/8] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse
2020-10-09 10:46 ` [PATCH v2 3/8] x86/apic: Always provide irq_compose_msi_msg() method for vector domain David Woodhouse
2020-10-09 10:46 ` [PATCH v2 4/8] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse
2020-10-09 10:46 ` [PATCH v2 5/8] x86/apic: Support 15 bits of APIC ID in MSI where available David Woodhouse
2020-10-09 10:46 ` [PATCH v2 6/8] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse
2020-10-09 10:46 ` [PATCH v2 7/8] x86/hpet: Move MSI support into hpet.c David Woodhouse
2020-10-09 10:46 ` [PATCH v2 8/8] x86/ioapic: Generate RTE directly from parent irqchip's MSI message David Woodhouse
2020-10-22 21:43 ` Thomas Gleixner
2020-10-22 22:10 ` Thomas Gleixner
2020-10-23 17:04 ` David Woodhouse
2020-10-23 10:10 ` David Woodhouse
2020-10-23 21:28 ` Thomas Gleixner
2020-10-24 8:26 ` David Woodhouse
2020-10-24 8:41 ` David Woodhouse
2020-10-24 9:13 ` Paolo Bonzini
2020-10-24 10:13 ` David Woodhouse
2020-10-24 12:44 ` David Woodhouse
2020-10-24 21:35 ` [PATCH v3 00/35] Fix x2apic enablement and allow more CPUs, clean up I/OAPIC and MSI bitfields David Woodhouse
2020-10-24 21:35 ` [PATCH v3 01/35] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 02/35] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 03/35] x86/apic/uv: Fix inconsistent destination mode David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 04/35] x86/devicetree: Fix the ioapic interrupt type table David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 05/35] x86/apic: Cleanup delivery mode defines David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 06/35] x86/apic: Replace pointless apic::dest_logical usage David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] x86/apic: Replace pointless apic:: Dest_logical usage tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 07/35] x86/apic: Get rid of apic::dest_logical David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] x86/apic: Get rid of apic:: Dest_logical tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 08/35] x86/apic: Cleanup destination mode David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 09/35] x86/apic: Always provide irq_compose_msi_msg() method for vector domain David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 10/35] x86/hpet: Move MSI support into hpet.c David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 11/35] genirq/msi: Allow shadow declarations of msi_msg::$member David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] genirq/msi: Allow shadow declarations of msi_msg:: $member tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 12/35] x86/msi: Provide msi message shadow structs David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2022-04-06 8:36 ` [PATCH v3 12/35] " Reto Buerki
2022-04-06 8:36 ` [PATCH] x86/msi: Fix msi message data shadow struct Reto Buerki
2022-04-06 22:11 ` Thomas Gleixner
2022-04-07 11:06 ` Reto Buerki
2022-04-07 13:24 ` [tip: x86/urgent] " tip-bot2 for Reto Buerki
2022-04-06 22:07 ` [PATCH v3 12/35] x86/msi: Provide msi message shadow structs Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 13/35] iommu/intel: Use msi_msg " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 14/35] iommu/amd: " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 15/35] PCI: vmd: " David Woodhouse
2020-10-28 20:49 ` Kees Cook
2020-10-28 21:13 ` Thomas Gleixner
2020-10-28 23:22 ` Kees Cook
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 16/35] x86/kvm: " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 17/35] x86/pci/xen: " David Woodhouse
2020-10-25 9:49 ` David Laight
2020-10-25 10:26 ` David Woodhouse
2020-10-25 13:20 ` David Laight
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 18/35] x86/msi: Remove msidef.h David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 19/35] x86/io_apic: Cleanup trigger/polarity helpers David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-11-09 23:15 ` Tom Lendacky
2020-11-10 3:30 ` [EXTERNAL] " David Woodhouse
2020-11-10 6:10 ` Borislav Petkov
2020-11-10 14:34 ` Thomas Gleixner
2020-11-10 14:55 ` Tom Lendacky
2020-11-10 15:54 ` Thomas Gleixner
2020-11-10 16:01 ` [EXTERNAL] " David Woodhouse
2020-11-10 16:17 ` Tom Lendacky
2020-11-10 16:33 ` [EXTERNAL] " David Woodhouse
2020-11-10 17:04 ` Tom Lendacky
2020-11-10 17:50 ` Thomas Gleixner
2020-11-10 18:56 ` Thomas Gleixner
2020-11-10 19:21 ` David Woodhouse
2020-11-10 21:01 ` Thomas Gleixner
2020-11-10 21:30 ` David Woodhouse
2020-11-10 22:00 ` Tom Lendacky [this message]
2020-11-10 22:48 ` Thomas Gleixner
2020-11-10 23:05 ` Tom Lendacky
2020-11-11 8:16 ` David Woodhouse
2020-11-11 9:46 ` Thomas Gleixner
2020-11-11 10:36 ` David Woodhouse
2020-11-11 12:32 ` David Woodhouse
2020-11-11 20:30 ` Tom Lendacky
2020-11-11 21:19 ` David Woodhouse
2020-11-13 15:14 ` David Woodhouse
2020-11-16 18:02 ` David Woodhouse
2020-11-17 2:00 ` Suravee Suthikulpanit
2020-11-18 10:29 ` Suravee Suthikulpanit
2020-11-18 10:52 ` David Woodhouse
2020-11-18 14:06 ` Thomas Gleixner
2020-11-18 16:51 ` Suravee Suthikulpanit
2020-11-18 17:08 ` David Woodhouse
2020-11-18 20:16 ` [tip: x86/apic] iommu/amd: Fix IOMMU interrupt generation in X2APIC mode tip-bot2 for David Woodhouse
2020-11-11 14:43 ` [PATCH 1/3] iommu/amd: Don't register interrupt remapping irqdomain when IR is disabled David Woodhouse
2020-11-11 14:43 ` [PATCH 2/3] iommu/amd: Fix union of bitfields in intcapxt support David Woodhouse
2020-11-11 22:06 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-11-11 14:43 ` [PATCH 3/3] iommu/amd: Fix IOMMU interrupt generation in X2APIC mode David Woodhouse
2020-11-11 22:06 ` [tip: x86/apic] iommu/amd: Don't register interrupt remapping irqdomain when IR is disabled tip-bot2 for David Woodhouse
2020-11-10 17:47 ` [tip: x86/apic] x86/ioapic: Correct the PCI/ISA trigger type selection tip-bot2 for Thomas Gleixner
2020-11-10 6:31 ` [PATCH v3 19/35] x86/io_apic: Cleanup trigger/polarity helpers Qian Cai
2020-11-10 8:59 ` David Woodhouse
2020-11-10 16:26 ` Paolo Bonzini
2020-10-24 21:35 ` [PATCH v3 20/35] x86/ioapic: Cleanup IO/APIC route entry structs David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner
2020-10-24 21:35 ` [PATCH v3 21/35] x86/ioapic: Generate RTE directly from parent irqchip's MSI message David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 22/35] genirq/irqdomain: Implement get_name() method on irqchip fwnodes David Woodhouse
2020-10-25 9:41 ` Marc Zyngier
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 23/35] x86/apic: Add select() method on vector irqdomain David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 24/35] iommu/amd: Implement select() method on remapping irqdomain David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 25/35] iommu/vt-d: " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 26/35] iommu/hyper-v: " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 27/35] x86/hpet: Use irq_find_matching_fwspec() to find " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 28/35] x86/ioapic: " David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 29/35] x86: Kill all traces of irq_remapping_get_irq_domain() David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 30/35] iommu/vt-d: Simplify intel_irq_remapping_select() David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 31/35] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 32/35] x86/apic: Support 15 bits of APIC ID in MSI where available David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 33/35] iommu/hyper-v: Disable IRQ pseudo-remapping if 15 bit APIC IDs are available David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-24 21:35 ` [PATCH v3 34/35] x86/kvm: Reserve KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse
2020-10-24 21:35 ` [PATCH v3 35/35] x86/kvm: Enable 15-bit extension when KVM_FEATURE_MSI_EXT_DEST_ID detected David Woodhouse
2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse
2020-10-25 8:12 ` [PATCH v3 00/35] Fix x2apic enablement and allow more CPUs, clean up I/OAPIC and MSI bitfields David Woodhouse
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