From: Dietmar Eggemann <dietmar.eggemann@arm.com>
To: Beata Michalska <beata.michalska@arm.com>
Cc: Valentin Schneider <valentin.schneider@arm.com>,
linux-kernel@vger.kernel.org, peterz@infradead.org,
mingo@redhat.com, juri.lelli@redhat.com,
vincent.guittot@linaro.org, corbet@lwn.net,
rdunlap@infradead.org, linux-doc@vger.kernel.org
Subject: Re: [PATCH v5 2/3] sched/topology: Rework CPU capacity asymmetry detection
Date: Wed, 26 May 2021 20:17:41 +0200 [thread overview]
Message-ID: <d4dc6630-041f-bf61-898a-6f402b993fbc@arm.com> (raw)
In-Reply-To: <20210526125133.GB13262@e120325.cambridge.arm.com>
On 26/05/2021 14:51, Beata Michalska wrote:
> On Wed, May 26, 2021 at 01:15:46PM +0100, Beata Michalska wrote:
>> On Wed, May 26, 2021 at 11:52:25AM +0200, Dietmar Eggemann wrote:
>>> On 25/05/2021 12:29, Beata Michalska wrote:
>>>> On Tue, May 25, 2021 at 10:53:07AM +0100, Valentin Schneider wrote:
>>>>> On 24/05/21 23:55, Beata Michalska wrote:
>>>>>> On Mon, May 24, 2021 at 07:01:04PM +0100, Valentin Schneider wrote:
>>>>>>> On 24/05/21 11:16, Beata Michalska wrote:
[...]
>>> BTW, how would this mechanism behave on a system with SMT and asymmetric CPU
>>> capacity? Something EAS wouldn't allow but I guess asym_cap_list will be
>>> constructed and the SD_ASYM_CPUCAPACITY_XXX flags will be set?
>> Yes, the list would get created and flags set. I do not think there is
>> a difference with current approach (?). So EAS would be disabled (it only cares
>> about SD_ASYM_CPUCAPACITY_FULL flag) but the misift might still kick in.
>>
> That depends on the arch_scale_cpu_capacity. I would imagine it would
> return SCHED_CAPACITY_SCALE for those, which means no asymmetry will
> be detected ?
I was thinking about an erroneous dts file like:
cpu-map {
cluster0 {
core0 {
thread0 {
cpu = <&A53_0>;
};
thread1 {
cpu = <&A53_1>;
};
};
core1 {
thread0 {
cpu = <&A53_2>;
};
thread1 {
cpu = <&A53_3>;
};
};
core2 {
thread0 {
cpu = <&A53_4>;
};
thread1 {
cpu = <&A53_5>;
};
};
};
cluster1 {
core0 {
thread0 {
cpu = <&A53_6>;
};
thread1 {
cpu = <&A53_7>;
};
};
};
};
A53_0: cpu@0 {
capacity-dmips-mhz = <446>;
A53_1: cpu@1 {
capacity-dmips-mhz = <1024>;
A53_2: cpu@2 {
capacity-dmips-mhz = <871>;
A53_3: cpu@3 {
capacity-dmips-mhz = <1024>;
A53_4: cpu@4 {
capacity-dmips-mhz = <446>;
A53_5: cpu@5 {
capacity-dmips-mhz = <871>;
A53_6: cpu@6 {
capacity-dmips-mhz = <1024>;
A53_7: cpu@7 {
capacity-dmips-mhz = <1024>;
Here I guess SD_ASYM_CPUCAPACITY will be attached to SMT[0-5]. So this
'capacity-dmips-mhz' config error won't be detected.
In case all CPUs (i.e. hw threads would have the correct
capacity-dmips-mhz = <1024> or not being set (default 1024))
asym_cap_list would corrcetly only have 1 entry.
next prev parent reply other threads:[~2021-05-26 18:17 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-24 10:16 [PATCH v5 0/3] Rework CPU capacity asymmetry detection Beata Michalska
2021-05-24 10:16 ` [PATCH v5 1/3] sched/core: Introduce SD_ASYM_CPUCAPACITY_FULL sched_domain flag Beata Michalska
2021-05-24 10:16 ` [PATCH v5 2/3] sched/topology: Rework CPU capacity asymmetry detection Beata Michalska
2021-05-24 18:01 ` Valentin Schneider
2021-05-24 22:55 ` Beata Michalska
2021-05-24 23:19 ` Beata Michalska
2021-05-25 9:53 ` Valentin Schneider
2021-05-25 10:29 ` Beata Michalska
2021-05-26 9:52 ` Dietmar Eggemann
2021-05-26 12:15 ` Beata Michalska
2021-05-26 12:51 ` Beata Michalska
2021-05-26 18:17 ` Dietmar Eggemann [this message]
2021-05-26 21:40 ` Beata Michalska
2021-05-27 15:08 ` Dietmar Eggemann
2021-05-27 17:07 ` Beata Michalska
2021-06-02 17:17 ` Dietmar Eggemann
2021-06-02 19:48 ` Beata Michalska
2021-06-03 9:09 ` Dietmar Eggemann
2021-06-03 9:24 ` Beata Michalska
2021-05-26 18:17 ` Dietmar Eggemann
2021-05-26 21:43 ` Beata Michalska
2021-05-27 7:03 ` Peter Zijlstra
2021-05-27 12:22 ` Dietmar Eggemann
2021-05-27 12:32 ` Beata Michalska
2021-05-25 8:25 ` Dietmar Eggemann
2021-05-25 9:30 ` Beata Michalska
2021-05-25 11:59 ` Dietmar Eggemann
2021-05-25 14:04 ` Beata Michalska
2021-05-24 10:16 ` [PATCH v5 3/3] sched/doc: Update the CPU capacity asymmetry bits Beata Michalska
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d4dc6630-041f-bf61-898a-6f402b993fbc@arm.com \
--to=dietmar.eggemann@arm.com \
--cc=beata.michalska@arm.com \
--cc=corbet@lwn.net \
--cc=juri.lelli@redhat.com \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=peterz@infradead.org \
--cc=rdunlap@infradead.org \
--cc=valentin.schneider@arm.com \
--cc=vincent.guittot@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).