* [PATCH v4 1/4] dt-bindings: ufs: qcom: Add SM6125 compatible string @ 2022-12-15 19:04 Lux Aliaga 2022-12-15 19:04 ` [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes Lux Aliaga ` (3 more replies) 0 siblings, 4 replies; 19+ messages in thread From: Lux Aliaga @ 2022-12-15 19:04 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring, Krzysztof Kozlowski Cc: Lux Aliaga, linux-arm-msm, linux-scsi, devicetree, linux-kernel Document the compatible for UFS found on the SM6125. Signed-off-by: Lux Aliaga <they@mint.lgbt> --- Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index b517d76215e3..42422f3471b3 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -29,6 +29,7 @@ properties: - qcom,sc8280xp-ufshc - qcom,sdm845-ufshc - qcom,sm6115-ufshc + - qcom,sm6125-ufshc - qcom,sm6350-ufshc - qcom,sm8150-ufshc - qcom,sm8250-ufshc @@ -185,6 +186,7 @@ allOf: contains: enum: - qcom,sm6115-ufshc + - qcom,sm6125-ufshc then: properties: clocks: -- 2.38.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes 2022-12-15 19:04 [PATCH v4 1/4] dt-bindings: ufs: qcom: Add SM6125 compatible string Lux Aliaga @ 2022-12-15 19:04 ` Lux Aliaga 2022-12-16 11:24 ` Konrad Dybcio 2022-12-15 19:04 ` [PATCH v4 3/4] dt-bindings: arm: qcom: Document xiaomi,laurel-sprout board Lux Aliaga ` (2 subsequent siblings) 3 siblings, 1 reply; 19+ messages in thread From: Lux Aliaga @ 2022-12-15 19:04 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski Cc: Lux Aliaga, linux-arm-msm, devicetree, linux-kernel Adds a UFS host controller node and its corresponding PHY to the sm6125 platform. Signed-off-by: Lux Aliaga <they@mint.lgbt> --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 67 ++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index 7e25a4f85594..b64c5bc1452f 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -508,6 +508,73 @@ sdhc_2: mmc@4784000 { status = "disabled"; }; + ufs_mem_hc: ufs@4804000 { + compatible = "qcom,sm6125-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; + reg = <0x04804000 0x3000>, <0x04810000 0x8000>; + reg-names = "std", "ice"; + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; + phys = <&ufs_mem_phy_lanes>; + phy-names = "ufsphy"; + lanes-per-direction = <1>; + #reset-cells = <1>; + resets = <&gcc GCC_UFS_PHY_BCR>; + reset-names = "rst"; + + clock-names = "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "ice_core_clk"; + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>, + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, + <&rpmcc RPM_SMD_XO_CLK_SRC>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; + freq-table-hz = <50000000 240000000>, + <0 0>, + <0 0>, + <37500000 150000000>, + <0 0>, + <0 0>, + <0 0>, + <75000000 300000000>; + + non-removable; + status = "disabled"; + }; + + ufs_mem_phy: phy@4807000 { + compatible = "qcom,sm6115-qmp-ufs-phy"; + reg = <0x04807000 0x1c4>; + + power-domains = <&gcc UFS_PHY_GDSC>; + + clock-names = "ref", "ref_aux"; + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + + #address-cells = <1>; + #size-cells = <1>; + ranges; + + status = "disabled"; + + ufs_mem_phy_lanes: lanes@4807400 { + reg = <0x4807400 0x098>, + <0x4807600 0x130>, + <0x4807c00 0x16c>; + #phy-cells = <0>; + }; + }; + usb3: usb@4ef8800 { compatible = "qcom,sm6125-dwc3", "qcom,dwc3"; reg = <0x04ef8800 0x400>; -- 2.38.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes 2022-12-15 19:04 ` [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes Lux Aliaga @ 2022-12-16 11:24 ` Konrad Dybcio 2022-12-20 18:57 ` Lux Aliaga 2022-12-21 3:34 ` Lux Aliaga 0 siblings, 2 replies; 19+ messages in thread From: Konrad Dybcio @ 2022-12-16 11:24 UTC (permalink / raw) To: Lux Aliaga, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski Cc: linux-arm-msm, devicetree, linux-kernel On 15.12.2022 20:04, Lux Aliaga wrote: > Adds a UFS host controller node and its corresponding PHY to > the sm6125 platform. > > Signed-off-by: Lux Aliaga <they@mint.lgbt> > --- Please include a changelog, I don't know what you changed and what you didn't. Also, you sent 4 revisions in one day, not letting others review it. > arch/arm64/boot/dts/qcom/sm6125.dtsi | 67 ++++++++++++++++++++++++++++ > 1 file changed, 67 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi > index 7e25a4f85594..b64c5bc1452f 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi > @@ -508,6 +508,73 @@ sdhc_2: mmc@4784000 { > status = "disabled"; > }; > > + ufs_mem_hc: ufs@4804000 { > + compatible = "qcom,sm6125-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; > + reg = <0x04804000 0x3000>, <0x04810000 0x8000>; > + reg-names = "std", "ice"; > + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; > + phys = <&ufs_mem_phy_lanes>; > + phy-names = "ufsphy"; > + lanes-per-direction = <1>; > + #reset-cells = <1>; > + resets = <&gcc GCC_UFS_PHY_BCR>; > + reset-names = "rst"; > + > + clock-names = "core_clk", > + "bus_aggr_clk", > + "iface_clk", > + "core_clk_unipro", > + "ref_clk", > + "tx_lane0_sync_clk", > + "rx_lane0_sync_clk", > + "ice_core_clk"; > + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, > + <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, > + <&gcc GCC_UFS_PHY_AHB_CLK>, > + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, > + <&rpmcc RPM_SMD_XO_CLK_SRC>, > + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, > + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, > + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; > + freq-table-hz = <50000000 240000000>, > + <0 0>, > + <0 0>, > + <37500000 150000000>, > + <0 0>, > + <0 0>, > + <0 0>, > + <75000000 300000000>; > + > + non-removable; > + status = "disabled"; > + }; > + > + ufs_mem_phy: phy@4807000 { > + compatible = "qcom,sm6115-qmp-ufs-phy"; Krzysztof asked you to add a SoC-specific compatible in v1. > + reg = <0x04807000 0x1c4>; > + > + power-domains = <&gcc UFS_PHY_GDSC>; > + > + clock-names = "ref", "ref_aux"; > + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > + > + resets = <&ufs_mem_hc 0>; > + reset-names = "ufsphy"; > + > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + status = "disabled"; > + > + ufs_mem_phy_lanes: lanes@4807400 { > + reg = <0x4807400 0x098>, > + <0x4807600 0x130>, > + <0x4807c00 0x16c>; > + #phy-cells = <0>; > + }; I believe this is deprecated. See [1]. Konrad [1] https://lore.kernel.org/linux-arm-msm/20221104092045.17410-1-johan+linaro@kernel.org/T/#m988f3fe3d83b76bac247aea2d9dac34f37728d65 > + }; > + > usb3: usb@4ef8800 { > compatible = "qcom,sm6125-dwc3", "qcom,dwc3"; > reg = <0x04ef8800 0x400>; ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes 2022-12-16 11:24 ` Konrad Dybcio @ 2022-12-20 18:57 ` Lux Aliaga 2022-12-20 19:32 ` Konrad Dybcio 2022-12-21 3:34 ` Lux Aliaga 1 sibling, 1 reply; 19+ messages in thread From: Lux Aliaga @ 2022-12-20 18:57 UTC (permalink / raw) To: Konrad Dybcio, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski Cc: linux-arm-msm, devicetree, linux-kernel On 16/12/2022 08:24, Konrad Dybcio wrote: > > On 15.12.2022 20:04, Lux Aliaga wrote: >> Adds a UFS host controller node and its corresponding PHY to >> the sm6125 platform. >> >> Signed-off-by: Lux Aliaga <they@mint.lgbt> >> --- > Please include a changelog, I don't know what you changed and > what you didn't. Also, you sent 4 revisions in one day, not > letting others review it. > > >> arch/arm64/boot/dts/qcom/sm6125.dtsi | 67 ++++++++++++++++++++++++++++ >> 1 file changed, 67 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi >> index 7e25a4f85594..b64c5bc1452f 100644 >> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi >> @@ -508,6 +508,73 @@ sdhc_2: mmc@4784000 { >> status = "disabled"; >> }; >> >> + ufs_mem_hc: ufs@4804000 { >> + compatible = "qcom,sm6125-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; >> + reg = <0x04804000 0x3000>, <0x04810000 0x8000>; >> + reg-names = "std", "ice"; >> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; >> + phys = <&ufs_mem_phy_lanes>; >> + phy-names = "ufsphy"; >> + lanes-per-direction = <1>; >> + #reset-cells = <1>; >> + resets = <&gcc GCC_UFS_PHY_BCR>; >> + reset-names = "rst"; >> + >> + clock-names = "core_clk", >> + "bus_aggr_clk", >> + "iface_clk", >> + "core_clk_unipro", >> + "ref_clk", >> + "tx_lane0_sync_clk", >> + "rx_lane0_sync_clk", >> + "ice_core_clk"; >> + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, >> + <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, >> + <&gcc GCC_UFS_PHY_AHB_CLK>, >> + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, >> + <&rpmcc RPM_SMD_XO_CLK_SRC>, >> + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, >> + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, >> + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; >> + freq-table-hz = <50000000 240000000>, >> + <0 0>, >> + <0 0>, >> + <37500000 150000000>, >> + <0 0>, >> + <0 0>, >> + <0 0>, >> + <75000000 300000000>; >> + >> + non-removable; >> + status = "disabled"; >> + }; >> + >> + ufs_mem_phy: phy@4807000 { >> + compatible = "qcom,sm6115-qmp-ufs-phy"; > Krzysztof asked you to add a SoC-specific compatible in v1. I'm working on adding a new compatible for sm6125's UFS PHY. Should I copy sm6115's tables or just reference them in the sm6125's config in drivers/phy/qualcomm/phy-qcom-qmp-ufs.c? -- Lux Aliaga https://nixgoat.me/ ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes 2022-12-20 18:57 ` Lux Aliaga @ 2022-12-20 19:32 ` Konrad Dybcio 2022-12-20 20:30 ` Dmitry Baryshkov 0 siblings, 1 reply; 19+ messages in thread From: Konrad Dybcio @ 2022-12-20 19:32 UTC (permalink / raw) To: Lux Aliaga, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski Cc: linux-arm-msm, devicetree, linux-kernel On 20.12.2022 19:57, Lux Aliaga wrote: > On 16/12/2022 08:24, Konrad Dybcio wrote: > >> >> On 15.12.2022 20:04, Lux Aliaga wrote: >>> Adds a UFS host controller node and its corresponding PHY to >>> the sm6125 platform. >>> >>> Signed-off-by: Lux Aliaga <they@mint.lgbt> >>> --- >> Please include a changelog, I don't know what you changed and >> what you didn't. Also, you sent 4 revisions in one day, not >> letting others review it. >> >> >>> arch/arm64/boot/dts/qcom/sm6125.dtsi | 67 ++++++++++++++++++++++++++++ >>> 1 file changed, 67 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi >>> index 7e25a4f85594..b64c5bc1452f 100644 >>> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi >>> @@ -508,6 +508,73 @@ sdhc_2: mmc@4784000 { >>> status = "disabled"; >>> }; >>> + ufs_mem_hc: ufs@4804000 { >>> + compatible = "qcom,sm6125-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; >>> + reg = <0x04804000 0x3000>, <0x04810000 0x8000>; >>> + reg-names = "std", "ice"; >>> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; >>> + phys = <&ufs_mem_phy_lanes>; >>> + phy-names = "ufsphy"; >>> + lanes-per-direction = <1>; >>> + #reset-cells = <1>; >>> + resets = <&gcc GCC_UFS_PHY_BCR>; >>> + reset-names = "rst"; >>> + >>> + clock-names = "core_clk", >>> + "bus_aggr_clk", >>> + "iface_clk", >>> + "core_clk_unipro", >>> + "ref_clk", >>> + "tx_lane0_sync_clk", >>> + "rx_lane0_sync_clk", >>> + "ice_core_clk"; >>> + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, >>> + <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, >>> + <&gcc GCC_UFS_PHY_AHB_CLK>, >>> + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, >>> + <&rpmcc RPM_SMD_XO_CLK_SRC>, >>> + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, >>> + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, >>> + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; >>> + freq-table-hz = <50000000 240000000>, >>> + <0 0>, >>> + <0 0>, >>> + <37500000 150000000>, >>> + <0 0>, >>> + <0 0>, >>> + <0 0>, >>> + <75000000 300000000>; >>> + >>> + non-removable; >>> + status = "disabled"; >>> + }; >>> + >>> + ufs_mem_phy: phy@4807000 { >>> + compatible = "qcom,sm6115-qmp-ufs-phy"; >> Krzysztof asked you to add a SoC-specific compatible in v1. > I'm working on adding a new compatible for sm6125's UFS PHY. Should I copy sm6115's tables or just reference them in the sm6125's config in drivers/phy/qualcomm/phy-qcom-qmp-ufs.c? If they're identical, you can just do something like this: compatible = "qcom,sm6125-qmp-ufs-phy", "qcom,sm6115-qmp-ufs-phy"; And ensure your newly added compatible is documented in bindings. This way, the driver will fall back to the 6115 compatible that's defined in .c, but if we ever need to adjust something specific for 6125, we will just use the define that we added here. That's important, as we're supposed to stay backwards-compatible with old device trees. Also, wrap your emails at around 80 chars or so, some people are grumpy about that :P Konrad > ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes 2022-12-20 19:32 ` Konrad Dybcio @ 2022-12-20 20:30 ` Dmitry Baryshkov 2022-12-20 20:32 ` Dmitry Baryshkov 0 siblings, 1 reply; 19+ messages in thread From: Dmitry Baryshkov @ 2022-12-20 20:30 UTC (permalink / raw) To: Konrad Dybcio Cc: Lux Aliaga, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel On Tue, 20 Dec 2022 at 21:33, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > > > On 20.12.2022 19:57, Lux Aliaga wrote: > > On 16/12/2022 08:24, Konrad Dybcio wrote: > > > >> > >> On 15.12.2022 20:04, Lux Aliaga wrote: > >>> Adds a UFS host controller node and its corresponding PHY to > >>> the sm6125 platform. > >>> > >>> Signed-off-by: Lux Aliaga <they@mint.lgbt> > >>> --- > >> Please include a changelog, I don't know what you changed and > >> what you didn't. Also, you sent 4 revisions in one day, not > >> letting others review it. > >> > >> > >>> arch/arm64/boot/dts/qcom/sm6125.dtsi | 67 ++++++++++++++++++++++++++++ > >>> 1 file changed, 67 insertions(+) > >>> > >>> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi > >>> index 7e25a4f85594..b64c5bc1452f 100644 > >>> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi > >>> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi > >>> @@ -508,6 +508,73 @@ sdhc_2: mmc@4784000 { > >>> status = "disabled"; > >>> }; > >>> + ufs_mem_hc: ufs@4804000 { > >>> + compatible = "qcom,sm6125-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; > >>> + reg = <0x04804000 0x3000>, <0x04810000 0x8000>; > >>> + reg-names = "std", "ice"; > >>> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; > >>> + phys = <&ufs_mem_phy_lanes>; > >>> + phy-names = "ufsphy"; > >>> + lanes-per-direction = <1>; > >>> + #reset-cells = <1>; > >>> + resets = <&gcc GCC_UFS_PHY_BCR>; > >>> + reset-names = "rst"; > >>> + > >>> + clock-names = "core_clk", > >>> + "bus_aggr_clk", > >>> + "iface_clk", > >>> + "core_clk_unipro", > >>> + "ref_clk", > >>> + "tx_lane0_sync_clk", > >>> + "rx_lane0_sync_clk", > >>> + "ice_core_clk"; > >>> + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, > >>> + <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, > >>> + <&gcc GCC_UFS_PHY_AHB_CLK>, > >>> + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, > >>> + <&rpmcc RPM_SMD_XO_CLK_SRC>, > >>> + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, > >>> + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, > >>> + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; > >>> + freq-table-hz = <50000000 240000000>, > >>> + <0 0>, > >>> + <0 0>, > >>> + <37500000 150000000>, > >>> + <0 0>, > >>> + <0 0>, > >>> + <0 0>, > >>> + <75000000 300000000>; > >>> + > >>> + non-removable; > >>> + status = "disabled"; > >>> + }; > >>> + > >>> + ufs_mem_phy: phy@4807000 { > >>> + compatible = "qcom,sm6115-qmp-ufs-phy"; > >> Krzysztof asked you to add a SoC-specific compatible in v1. > > I'm working on adding a new compatible for sm6125's UFS PHY. Should I copy sm6115's tables or just reference them in the sm6125's config in drivers/phy/qualcomm/phy-qcom-qmp-ufs.c? > If they're identical, you can just do something like this: > > compatible = "qcom,sm6125-qmp-ufs-phy", "qcom,sm6115-qmp-ufs-phy"; Ugh. I'd prefer to see either of the compatible strings here, but not both of them. > > And ensure your newly added compatible is documented in bindings. > This way, the driver will fall back to the 6115 compatible that's > defined in .c, but if we ever need to adjust something specific > for 6125, we will just use the define that we added here. That's > important, as we're supposed to stay backwards-compatible with > old device trees. > > Also, wrap your emails at around 80 chars or so, some people > are grumpy about that :P > > Konrad > > -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes 2022-12-20 20:30 ` Dmitry Baryshkov @ 2022-12-20 20:32 ` Dmitry Baryshkov 0 siblings, 0 replies; 19+ messages in thread From: Dmitry Baryshkov @ 2022-12-20 20:32 UTC (permalink / raw) To: Konrad Dybcio Cc: Lux Aliaga, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel On 20/12/2022 22:30, Dmitry Baryshkov wrote: > On Tue, 20 Dec 2022 at 21:33, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: >> >> >> >> On 20.12.2022 19:57, Lux Aliaga wrote: >>> On 16/12/2022 08:24, Konrad Dybcio wrote: >>> >>>> >>>> On 15.12.2022 20:04, Lux Aliaga wrote: >>>>> Adds a UFS host controller node and its corresponding PHY to >>>>> the sm6125 platform. >>>>> >>>>> Signed-off-by: Lux Aliaga <they@mint.lgbt> >>>>> --- >>>> Please include a changelog, I don't know what you changed and >>>> what you didn't. Also, you sent 4 revisions in one day, not >>>> letting others review it. >>>> >>>> >>>>> arch/arm64/boot/dts/qcom/sm6125.dtsi | 67 ++++++++++++++++++++++++++++ >>>>> 1 file changed, 67 insertions(+) >>>>> >>>>> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi >>>>> index 7e25a4f85594..b64c5bc1452f 100644 >>>>> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi >>>>> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi >>>>> @@ -508,6 +508,73 @@ sdhc_2: mmc@4784000 { >>>>> status = "disabled"; >>>>> }; >>>>> + ufs_mem_hc: ufs@4804000 { >>>>> + compatible = "qcom,sm6125-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; >>>>> + reg = <0x04804000 0x3000>, <0x04810000 0x8000>; >>>>> + reg-names = "std", "ice"; >>>>> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; >>>>> + phys = <&ufs_mem_phy_lanes>; >>>>> + phy-names = "ufsphy"; >>>>> + lanes-per-direction = <1>; >>>>> + #reset-cells = <1>; >>>>> + resets = <&gcc GCC_UFS_PHY_BCR>; >>>>> + reset-names = "rst"; >>>>> + >>>>> + clock-names = "core_clk", >>>>> + "bus_aggr_clk", >>>>> + "iface_clk", >>>>> + "core_clk_unipro", >>>>> + "ref_clk", >>>>> + "tx_lane0_sync_clk", >>>>> + "rx_lane0_sync_clk", >>>>> + "ice_core_clk"; >>>>> + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, >>>>> + <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, >>>>> + <&gcc GCC_UFS_PHY_AHB_CLK>, >>>>> + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, >>>>> + <&rpmcc RPM_SMD_XO_CLK_SRC>, >>>>> + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, >>>>> + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, >>>>> + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; >>>>> + freq-table-hz = <50000000 240000000>, >>>>> + <0 0>, >>>>> + <0 0>, >>>>> + <37500000 150000000>, >>>>> + <0 0>, >>>>> + <0 0>, >>>>> + <0 0>, >>>>> + <75000000 300000000>; >>>>> + >>>>> + non-removable; >>>>> + status = "disabled"; >>>>> + }; >>>>> + >>>>> + ufs_mem_phy: phy@4807000 { >>>>> + compatible = "qcom,sm6115-qmp-ufs-phy"; >>>> Krzysztof asked you to add a SoC-specific compatible in v1. >>> I'm working on adding a new compatible for sm6125's UFS PHY. Should I copy sm6115's tables or just reference them in the sm6125's config in drivers/phy/qualcomm/phy-qcom-qmp-ufs.c? >> If they're identical, you can just do something like this: >> >> compatible = "qcom,sm6125-qmp-ufs-phy", "qcom,sm6115-qmp-ufs-phy"; > > Ugh. I'd prefer to see either of the compatible strings here, but not > both of them. I hit send too quick, so the justification didn't get in. Currently we list a single compatibility string for all QMP PHYs. Having just a single exception stands out, so I'd advise against doing that (despite Konrad's suggestion being technically correct). > >> >> And ensure your newly added compatible is documented in bindings. >> This way, the driver will fall back to the 6115 compatible that's >> defined in .c, but if we ever need to adjust something specific >> for 6125, we will just use the define that we added here. That's >> important, as we're supposed to stay backwards-compatible with >> old device trees. >> >> Also, wrap your emails at around 80 chars or so, some people >> are grumpy about that :P >> >> Konrad >>> > > > -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes 2022-12-16 11:24 ` Konrad Dybcio 2022-12-20 18:57 ` Lux Aliaga @ 2022-12-21 3:34 ` Lux Aliaga 2022-12-21 7:12 ` Johan Hovold 1 sibling, 1 reply; 19+ messages in thread From: Lux Aliaga @ 2022-12-21 3:34 UTC (permalink / raw) To: Konrad Dybcio, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski Cc: linux-arm-msm, devicetree, linux-kernel On 16/12/2022 08:24, Konrad Dybcio wrote: > > On 15.12.2022 20:04, Lux Aliaga wrote: >> Adds a UFS host controller node and its corresponding PHY to >> the sm6125 platform. >> >> Signed-off-by: Lux Aliaga <they@mint.lgbt> >> --- > Please include a changelog, I don't know what you changed and > what you didn't. Also, you sent 4 revisions in one day, not > letting others review it. > > >> arch/arm64/boot/dts/qcom/sm6125.dtsi | 67 ++++++++++++++++++++++++++++ >> 1 file changed, 67 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi >> index 7e25a4f85594..b64c5bc1452f 100644 >> --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi >> @@ -508,6 +508,73 @@ sdhc_2: mmc@4784000 { >> status = "disabled"; >> }; >> >> + ufs_mem_hc: ufs@4804000 { >> + compatible = "qcom,sm6125-ufshc", "qcom,ufshc", "jedec,ufs-2.0"; >> + reg = <0x04804000 0x3000>, <0x04810000 0x8000>; >> + reg-names = "std", "ice"; >> + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; >> + phys = <&ufs_mem_phy_lanes>; >> + phy-names = "ufsphy"; >> + lanes-per-direction = <1>; >> + #reset-cells = <1>; >> + resets = <&gcc GCC_UFS_PHY_BCR>; >> + reset-names = "rst"; >> + >> + clock-names = "core_clk", >> + "bus_aggr_clk", >> + "iface_clk", >> + "core_clk_unipro", >> + "ref_clk", >> + "tx_lane0_sync_clk", >> + "rx_lane0_sync_clk", >> + "ice_core_clk"; >> + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, >> + <&gcc GCC_SYS_NOC_UFS_PHY_AXI_CLK>, >> + <&gcc GCC_UFS_PHY_AHB_CLK>, >> + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, >> + <&rpmcc RPM_SMD_XO_CLK_SRC>, >> + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, >> + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, >> + <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; >> + freq-table-hz = <50000000 240000000>, >> + <0 0>, >> + <0 0>, >> + <37500000 150000000>, >> + <0 0>, >> + <0 0>, >> + <0 0>, >> + <75000000 300000000>; >> + >> + non-removable; >> + status = "disabled"; >> + }; >> + >> + ufs_mem_phy: phy@4807000 { >> + compatible = "qcom,sm6115-qmp-ufs-phy"; > Krzysztof asked you to add a SoC-specific compatible in v1. > > >> + reg = <0x04807000 0x1c4>; >> + >> + power-domains = <&gcc UFS_PHY_GDSC>; >> + >> + clock-names = "ref", "ref_aux"; >> + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; >> + >> + resets = <&ufs_mem_hc 0>; >> + reset-names = "ufsphy"; >> + >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges; >> + >> + status = "disabled"; >> + >> + ufs_mem_phy_lanes: lanes@4807400 { >> + reg = <0x4807400 0x098>, >> + <0x4807600 0x130>, >> + <0x4807c00 0x16c>; >> + #phy-cells = <0>; >> + }; > I believe this is deprecated. See [1]. > > > Konrad > > [1] https://lore.kernel.org/linux-arm-msm/20221104092045.17410-1-johan+linaro@kernel.org/T/#m988f3fe3d83b76bac247aea2d9dac34f37728d65 I've looked into the documentation and this is only for the sc8280xp. This PHY is defined as it is for the msm8996 and derivatives. -- Lux Aliaga https://nixgoat.me/ ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes 2022-12-21 3:34 ` Lux Aliaga @ 2022-12-21 7:12 ` Johan Hovold 2022-12-22 3:57 ` Lux Aliaga 0 siblings, 1 reply; 19+ messages in thread From: Johan Hovold @ 2022-12-21 7:12 UTC (permalink / raw) To: Lux Aliaga Cc: Konrad Dybcio, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel On Wed, Dec 21, 2022 at 12:34:46AM -0300, Lux Aliaga wrote: > > On 16/12/2022 08:24, Konrad Dybcio wrote: > > > > On 15.12.2022 20:04, Lux Aliaga wrote: > >> Adds a UFS host controller node and its corresponding PHY to > >> the sm6125 platform. > >> + reg = <0x04807000 0x1c4>; > >> + > >> + power-domains = <&gcc UFS_PHY_GDSC>; > >> + > >> + clock-names = "ref", "ref_aux"; > >> + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > >> + > >> + resets = <&ufs_mem_hc 0>; > >> + reset-names = "ufsphy"; > >> + > >> + #address-cells = <1>; > >> + #size-cells = <1>; > >> + ranges; > >> + > >> + status = "disabled"; > >> + > >> + ufs_mem_phy_lanes: lanes@4807400 { > >> + reg = <0x4807400 0x098>, > >> + <0x4807600 0x130>, > >> + <0x4807c00 0x16c>; > >> + #phy-cells = <0>; > >> + }; > > I believe this is deprecated. See [1]. > > [1] https://lore.kernel.org/linux-arm-msm/20221104092045.17410-1-johan+linaro@kernel.org/T/#m988f3fe3d83b76bac247aea2d9dac34f37728d65 > I've looked into the documentation and this is only for the sc8280xp. > This PHY is defined as it is for the msm8996 and derivatives. No, it's not just for sc8280xp. It's intended for all new bindings (i.e. do not add more platforms to the msm8996 schema file). Johan ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes 2022-12-21 7:12 ` Johan Hovold @ 2022-12-22 3:57 ` Lux Aliaga 2022-12-27 16:34 ` Johan Hovold 0 siblings, 1 reply; 19+ messages in thread From: Lux Aliaga @ 2022-12-22 3:57 UTC (permalink / raw) To: Johan Hovold Cc: Konrad Dybcio, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel, Iskren Chernev, Adam Skladowski On 21/12/2022 04:12, Johan Hovold wrote: > On Wed, Dec 21, 2022 at 12:34:46AM -0300, Lux Aliaga wrote: >> On 16/12/2022 08:24, Konrad Dybcio wrote: >>> On 15.12.2022 20:04, Lux Aliaga wrote: >>>> Adds a UFS host controller node and its corresponding PHY to >>>> the sm6125 platform. >>>> + reg = <0x04807000 0x1c4>; >>>> + >>>> + power-domains = <&gcc UFS_PHY_GDSC>; >>>> + >>>> + clock-names = "ref", "ref_aux"; >>>> + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; >>>> + >>>> + resets = <&ufs_mem_hc 0>; >>>> + reset-names = "ufsphy"; >>>> + >>>> + #address-cells = <1>; >>>> + #size-cells = <1>; >>>> + ranges; >>>> + >>>> + status = "disabled"; >>>> + >>>> + ufs_mem_phy_lanes: lanes@4807400 { >>>> + reg = <0x4807400 0x098>, >>>> + <0x4807600 0x130>, >>>> + <0x4807c00 0x16c>; >>>> + #phy-cells = <0>; >>>> + }; >>> I believe this is deprecated. See [1]. >>> [1] https://lore.kernel.org/linux-arm-msm/20221104092045.17410-1-johan+linaro@kernel.org/T/#m988f3fe3d83b76bac247aea2d9dac34f37728d65 >> I've looked into the documentation and this is only for the sc8280xp. >> This PHY is defined as it is for the msm8996 and derivatives. > No, it's not just for sc8280xp. It's intended for all new bindings (i.e. > do not add more platforms to the msm8996 schema file). > > Johan Alright. But this would mean writing a new config for the sm6125 specifically. If we're changing how the bindings for UFS PHYs work, wouldn't it make more sense to change the sm6115 config instead, since they're defined pretty much the same? -- Lux Aliaga https://nixgoat.me/ ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes 2022-12-22 3:57 ` Lux Aliaga @ 2022-12-27 16:34 ` Johan Hovold 0 siblings, 0 replies; 19+ messages in thread From: Johan Hovold @ 2022-12-27 16:34 UTC (permalink / raw) To: Lux Aliaga Cc: Konrad Dybcio, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel, Iskren Chernev, Adam Skladowski On Thu, Dec 22, 2022 at 12:57:09AM -0300, Lux Aliaga wrote: > On 21/12/2022 04:12, Johan Hovold wrote: > > > On Wed, Dec 21, 2022 at 12:34:46AM -0300, Lux Aliaga wrote: > >> On 16/12/2022 08:24, Konrad Dybcio wrote: > >>> On 15.12.2022 20:04, Lux Aliaga wrote: > >>>> Adds a UFS host controller node and its corresponding PHY to > >>>> the sm6125 platform. > >>>> + reg = <0x04807000 0x1c4>; > >>>> + > >>>> + power-domains = <&gcc UFS_PHY_GDSC>; > >>>> + > >>>> + clock-names = "ref", "ref_aux"; > >>>> + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > >>>> + > >>>> + resets = <&ufs_mem_hc 0>; > >>>> + reset-names = "ufsphy"; > >>>> + > >>>> + #address-cells = <1>; > >>>> + #size-cells = <1>; > >>>> + ranges; > >>>> + > >>>> + status = "disabled"; > >>>> + > >>>> + ufs_mem_phy_lanes: lanes@4807400 { > >>>> + reg = <0x4807400 0x098>, > >>>> + <0x4807600 0x130>, > >>>> + <0x4807c00 0x16c>; > >>>> + #phy-cells = <0>; > >>>> + }; > >>> I believe this is deprecated. See [1]. > >>> [1] https://lore.kernel.org/linux-arm-msm/20221104092045.17410-1-johan+linaro@kernel.org/T/#m988f3fe3d83b76bac247aea2d9dac34f37728d65 > >> I've looked into the documentation and this is only for the sc8280xp. > >> This PHY is defined as it is for the msm8996 and derivatives. > > No, it's not just for sc8280xp. It's intended for all new bindings (i.e. > > do not add more platforms to the msm8996 schema file). > Alright. But this would mean writing a new config for the sm6125 > specifically. If we're changing how the bindings for UFS PHYs work, > wouldn't it make more sense to change the sm6115 config instead, since > they're defined pretty much the same? It can be done that way too, that is, you can add the missing offsets to the sm6115 config and use it for both sm6115 and sm6125 if they are really that closely related. The driver will only parse the old-style bindings (for sm6115) if the PHY node has a child. You still need to add a new compatible for sm6125 to the PHY driver, though, which appears to be missing in this series. Johan ^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v4 3/4] dt-bindings: arm: qcom: Document xiaomi,laurel-sprout board 2022-12-15 19:04 [PATCH v4 1/4] dt-bindings: ufs: qcom: Add SM6125 compatible string Lux Aliaga 2022-12-15 19:04 ` [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes Lux Aliaga @ 2022-12-15 19:04 ` Lux Aliaga 2022-12-16 11:26 ` Krzysztof Kozlowski 2022-12-15 19:04 ` [PATCH v4 4/4] arm64: dts: qcom: sm6125: Initial support for xiaomi-laurel-sprout Lux Aliaga 2022-12-16 11:25 ` [PATCH v4 1/4] dt-bindings: ufs: qcom: Add SM6125 compatible string Krzysztof Kozlowski 3 siblings, 1 reply; 19+ messages in thread From: Lux Aliaga @ 2022-12-15 19:04 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski Cc: Lux Aliaga, linux-arm-msm, devicetree, linux-kernel Document the Xiaomi Mi A3 (xiaomi-laurel-sprout) smartphone which is based on the Snapdragon 665 SoC. Signed-off-by: Lux Aliaga <they@mint.lgbt> --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 27063a045bd0..4923dafb5d7a 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -793,6 +793,7 @@ properties: - items: - enum: - sony,pdx201 + - xiaomi,laurel-sprout - const: qcom,sm6125 - items: -- 2.38.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH v4 3/4] dt-bindings: arm: qcom: Document xiaomi,laurel-sprout board 2022-12-15 19:04 ` [PATCH v4 3/4] dt-bindings: arm: qcom: Document xiaomi,laurel-sprout board Lux Aliaga @ 2022-12-16 11:26 ` Krzysztof Kozlowski 0 siblings, 0 replies; 19+ messages in thread From: Krzysztof Kozlowski @ 2022-12-16 11:26 UTC (permalink / raw) To: Lux Aliaga, Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski Cc: linux-arm-msm, devicetree, linux-kernel On 15/12/2022 20:04, Lux Aliaga wrote: > Document the Xiaomi Mi A3 (xiaomi-laurel-sprout) smartphone which is > based on the Snapdragon 665 SoC. > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v4 4/4] arm64: dts: qcom: sm6125: Initial support for xiaomi-laurel-sprout 2022-12-15 19:04 [PATCH v4 1/4] dt-bindings: ufs: qcom: Add SM6125 compatible string Lux Aliaga 2022-12-15 19:04 ` [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes Lux Aliaga 2022-12-15 19:04 ` [PATCH v4 3/4] dt-bindings: arm: qcom: Document xiaomi,laurel-sprout board Lux Aliaga @ 2022-12-15 19:04 ` Lux Aliaga 2022-12-16 11:32 ` Konrad Dybcio 2022-12-16 11:25 ` [PATCH v4 1/4] dt-bindings: ufs: qcom: Add SM6125 compatible string Krzysztof Kozlowski 3 siblings, 1 reply; 19+ messages in thread From: Lux Aliaga @ 2022-12-15 19:04 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Kees Cook, Tony Luck, Guilherme G. Piccoli Cc: Lux Aliaga, linux-arm-msm, devicetree, linux-kernel, linux-hardening Adds support for the Xiaomi Mi A3 (xiaomi-laurel-sprout). Here's a summary on what's working. - dmesg output to bootloader preconfigured display - USB - UFS - SMD RPM regulators Signed-off-by: Lux Aliaga <they@mint.lgbt> --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../dts/qcom/sm6125-xiaomi-laurel-sprout.dts | 254 ++++++++++++++++++ 2 files changed, 255 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 3e79496292e7..2b2a0170db14 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -157,6 +157,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb dtb-$(CONFIG_ARCH_QCOM) += sm4250-oneplus-billie2.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb +dtb-$(CONFIG_ARCH_QCOM) += sm6125-xiaomi-laurel-sprout.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb dtb-$(CONFIG_ARCH_QCOM) += sm6375-sony-xperia-murray-pdx225.dtb dtb-$(CONFIG_ARCH_QCOM) += sm7225-fairphone-fp4.dtb diff --git a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts new file mode 100644 index 000000000000..86e1ec47bf5e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts @@ -0,0 +1,254 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022, Lux Aliaga <they@mint.lgbt> + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/input/gpio-keys.h> +#include "sm6125.dtsi" + +/ { + model = "Xiaomi Mi A3"; + compatible = "xiaomi,laurel-sprout", "qcom,sm6125"; + chassis-type = "handset"; + + /* required for bootloader to select correct board */ + qcom,msm-id = <394 0>; /* sm6125 v0 */ + qcom,board-id = <11 0>; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer0: framebuffer@5c000000 { + compatible = "simple-framebuffer"; + reg = <0 0x5c000000 0 (1560 * 720 * 4)>; + width = <720>; + height = <1560>; + stride = <(720 * 4)>; + format = "a8r8g8b8"; + }; + }; + + extcon_usb: usb-id { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + + debug_mem: memory@ffb00000 { + reg = <0x0 0xffb00000 0x0 0xc0000>; + no-map; + }; + + last_log_mem: memory@ffbc0000 { + reg = <0x0 0xffbc0000 0x0 0x80000>; + no-map; + }; + + pstore_mem: ramoops@ffc00000 { + compatible = "ramoops"; + reg = <0x0 0xffc40000 0x0 0xc0000>; + record-size = <0x1000>; + console-size = <0x40000>; + msg-size = <0x20000 0x20000>; + }; + + cmdline_mem: memory@ffd00000 { + reg = <0x0 0xffd40000 0x0 0x1000>; + no-map; + }; + }; +}; + + +&hsusb_phy1 { + status = "okay"; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm6125-regulators"; + + vreg_s6a: s6 { + regulator-min-microvolt = <936000>; + regulator-max-microvolt = <1422000>; + }; + + vreg_l1a: l1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1256000>; + }; + + vreg_l2a: l2 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1056000>; + }; + + vreg_l3a: l3 { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1064000>; + }; + + vreg_l4a: l4 { + regulator-min-microvolt = <872000>; + regulator-max-microvolt = <976000>; + }; + + vreg_l5a: l5 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3104000>; + }; + + vreg_l6a: l6 { + regulator-min-microvolt = <576000>; + regulator-max-microvolt = <656000>; + }; + + vreg_l7a: l7 { + regulator-min-microvolt = <872000>; + regulator-max-microvolt = <976000>; + }; + + vreg_l8a: l8 { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <728000>; + }; + + vreg_l9a: l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1896000>; + }; + + vreg_l10a: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1896000>; + }; + + vreg_l11a: l11 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1952000>; + }; + + vreg_l12a: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1996000>; + }; + + vreg_l13a: l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1832000>; + }; + + vreg_l14a: l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1904000>; + }; + + vreg_l15a: l15 { + regulator-min-microvolt = <3104000>; + regulator-max-microvolt = <3232000>; + }; + + vreg_l16a: l16 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1904000>; + }; + + vreg_l17a: l17 { + regulator-min-microvolt = <1248000>; + regulator-max-microvolt = <1304000>; + }; + + vreg_l18a: l18 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1264000>; + }; + + vreg_l19a: l19 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + }; + + vreg_l20a: l20 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <2952000>; + }; + + vreg_l21a: l21 { + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <2856000>; + }; + + vreg_l22a: l22 { + regulator-min-microvolt = <2944000>; + regulator-max-microvolt = <3304000>; + }; + + vreg_l23a: l23 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3400000>; + }; + + vreg_l24a: l24 { + regulator-min-microvolt = <2944000>; + regulator-max-microvolt = <3304000>; + }; + }; +}; + +&sdc2_off_state { + sd-cd-pins { + pins = "gpio98"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; + +&sdc2_on_state { + sd-cd-pins { + pins = "gpio98"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; +}; + +&tlmm { + gpio-reserved-ranges = <22 2>, <28 6>; +}; + +&ufs_mem_hc { + vcc-supply = <&vreg_l24a>; + vccq2-supply = <&vreg_l11a>; + vcc-max-microamp = <600000>; + vccq2-max-microamp = <600000>; + + status = "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply = <&vreg_l4a>; + vdda-pll-supply = <&vreg_l10a>; + vdda-phy-max-microamp = <51400>; + vdda-pll-max-microamp = <14200>; + vddp-ref-clk-supply = <&vreg_l18a>; + + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&usb3_dwc3 { + extcon = <&extcon_usb>; +}; -- 2.38.1 ^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH v4 4/4] arm64: dts: qcom: sm6125: Initial support for xiaomi-laurel-sprout 2022-12-15 19:04 ` [PATCH v4 4/4] arm64: dts: qcom: sm6125: Initial support for xiaomi-laurel-sprout Lux Aliaga @ 2022-12-16 11:32 ` Konrad Dybcio 2022-12-16 20:27 ` Lux Aliaga 0 siblings, 1 reply; 19+ messages in thread From: Konrad Dybcio @ 2022-12-16 11:32 UTC (permalink / raw) To: Lux Aliaga, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Kees Cook, Tony Luck, Guilherme G. Piccoli Cc: linux-arm-msm, devicetree, linux-kernel, linux-hardening On 15.12.2022 20:04, Lux Aliaga wrote: > Adds support for the Xiaomi Mi A3 (xiaomi-laurel-sprout). Here's a > summary on what's working. > > - dmesg output to bootloader preconfigured display > - USB > - UFS > - SMD RPM regulators > > Signed-off-by: Lux Aliaga <they@mint.lgbt> > --- > arch/arm64/boot/dts/qcom/Makefile | 1 + > .../dts/qcom/sm6125-xiaomi-laurel-sprout.dts | 254 ++++++++++++++++++ > 2 files changed, 255 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index 3e79496292e7..2b2a0170db14 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -157,6 +157,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb > dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb > dtb-$(CONFIG_ARCH_QCOM) += sm4250-oneplus-billie2.dtb > dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb > +dtb-$(CONFIG_ARCH_QCOM) += sm6125-xiaomi-laurel-sprout.dtb > dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb > dtb-$(CONFIG_ARCH_QCOM) += sm6375-sony-xperia-murray-pdx225.dtb > dtb-$(CONFIG_ARCH_QCOM) += sm7225-fairphone-fp4.dtb > diff --git a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts > new file mode 100644 > index 000000000000..86e1ec47bf5e > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts > @@ -0,0 +1,254 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2022, Lux Aliaga <they@mint.lgbt> > + */ > + > +/dts-v1/; > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/input/gpio-keys.h> > +#include "sm6125.dtsi" > + > +/ { > + model = "Xiaomi Mi A3"; > + compatible = "xiaomi,laurel-sprout", "qcom,sm6125"; > + chassis-type = "handset"; > + > + /* required for bootloader to select correct board */ > + qcom,msm-id = <394 0>; /* sm6125 v0 */ Unless you have a prototype device, this is not correct. Please run `cat /sys/bus/soc/devices/soc0/revision` and confirm which revision is used on your phone. > + qcom,board-id = <11 0>; > + > + chosen { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + framebuffer0: framebuffer@5c000000 { > + compatible = "simple-framebuffer"; > + reg = <0 0x5c000000 0 (1560 * 720 * 4)>; > + width = <720>; > + height = <1560>; > + stride = <(720 * 4)>; > + format = "a8r8g8b8"; > + }; > + }; > + > + extcon_usb: usb-id { 'r' < 'u', usb-id should go after reserved-memory. > + compatible = "linux,extcon-usb-gpio"; > + id-gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>; > + }; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + > + debug_mem: memory@ffb00000 { Memory node names should be more specific, for example debug@ instead of memory@. Konrad > + reg = <0x0 0xffb00000 0x0 0xc0000>; > + no-map; > + }; > + > + last_log_mem: memory@ffbc0000 { > + reg = <0x0 0xffbc0000 0x0 0x80000>; > + no-map; > + }; > + > + pstore_mem: ramoops@ffc00000 { > + compatible = "ramoops"; > + reg = <0x0 0xffc40000 0x0 0xc0000>; > + record-size = <0x1000>; > + console-size = <0x40000>; > + msg-size = <0x20000 0x20000>; > + }; > + > + cmdline_mem: memory@ffd00000 { > + reg = <0x0 0xffd40000 0x0 0x1000>; > + no-map; > + }; > + }; > +}; > + > + > +&hsusb_phy1 { > + status = "okay"; > +}; > + > +&rpm_requests { > + regulators-0 { > + compatible = "qcom,rpm-pm6125-regulators"; > + > + vreg_s6a: s6 { > + regulator-min-microvolt = <936000>; > + regulator-max-microvolt = <1422000>; > + }; > + > + vreg_l1a: l1 { > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1256000>; > + }; > + > + vreg_l2a: l2 { > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1056000>; > + }; > + > + vreg_l3a: l3 { > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1064000>; > + }; > + > + vreg_l4a: l4 { > + regulator-min-microvolt = <872000>; > + regulator-max-microvolt = <976000>; > + }; > + > + vreg_l5a: l5 { > + regulator-min-microvolt = <1648000>; > + regulator-max-microvolt = <3104000>; > + }; > + > + vreg_l6a: l6 { > + regulator-min-microvolt = <576000>; > + regulator-max-microvolt = <656000>; > + }; > + > + vreg_l7a: l7 { > + regulator-min-microvolt = <872000>; > + regulator-max-microvolt = <976000>; > + }; > + > + vreg_l8a: l8 { > + regulator-min-microvolt = <400000>; > + regulator-max-microvolt = <728000>; > + }; > + > + vreg_l9a: l9 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1896000>; > + }; > + > + vreg_l10a: l10 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1896000>; > + }; > + > + vreg_l11a: l11 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1952000>; > + }; > + > + vreg_l12a: l12 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1996000>; > + }; > + > + vreg_l13a: l13 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1832000>; > + }; > + > + vreg_l14a: l14 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1904000>; > + }; > + > + vreg_l15a: l15 { > + regulator-min-microvolt = <3104000>; > + regulator-max-microvolt = <3232000>; > + }; > + > + vreg_l16a: l16 { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1904000>; > + }; > + > + vreg_l17a: l17 { > + regulator-min-microvolt = <1248000>; > + regulator-max-microvolt = <1304000>; > + }; > + > + vreg_l18a: l18 { > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1264000>; > + }; > + > + vreg_l19a: l19 { > + regulator-min-microvolt = <1648000>; > + regulator-max-microvolt = <2952000>; > + }; > + > + vreg_l20a: l20 { > + regulator-min-microvolt = <1648000>; > + regulator-max-microvolt = <2952000>; > + }; > + > + vreg_l21a: l21 { > + regulator-min-microvolt = <2600000>; > + regulator-max-microvolt = <2856000>; > + }; > + > + vreg_l22a: l22 { > + regulator-min-microvolt = <2944000>; > + regulator-max-microvolt = <3304000>; > + }; > + > + vreg_l23a: l23 { > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3400000>; > + }; > + > + vreg_l24a: l24 { > + regulator-min-microvolt = <2944000>; > + regulator-max-microvolt = <3304000>; > + }; > + }; > +}; > + > +&sdc2_off_state { > + sd-cd-pins { > + pins = "gpio98"; > + function = "gpio"; > + drive-strength = <2>; > + bias-disable; > + }; > +}; > + > +&sdc2_on_state { > + sd-cd-pins { > + pins = "gpio98"; > + function = "gpio"; > + drive-strength = <2>; > + bias-pull-up; > + }; > +}; > + > +&tlmm { > + gpio-reserved-ranges = <22 2>, <28 6>; > +}; > + > +&ufs_mem_hc { > + vcc-supply = <&vreg_l24a>; > + vccq2-supply = <&vreg_l11a>; > + vcc-max-microamp = <600000>; > + vccq2-max-microamp = <600000>; > + > + status = "okay"; > +}; > + > +&ufs_mem_phy { > + vdda-phy-supply = <&vreg_l4a>; > + vdda-pll-supply = <&vreg_l10a>; > + vdda-phy-max-microamp = <51400>; > + vdda-pll-max-microamp = <14200>; > + vddp-ref-clk-supply = <&vreg_l18a>; > + > + status = "okay"; > +}; > + > +&usb3 { > + status = "okay"; > +}; > + > +&usb3_dwc3 { > + extcon = <&extcon_usb>; > +}; ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 4/4] arm64: dts: qcom: sm6125: Initial support for xiaomi-laurel-sprout 2022-12-16 11:32 ` Konrad Dybcio @ 2022-12-16 20:27 ` Lux Aliaga 2022-12-17 14:23 ` Konrad Dybcio 0 siblings, 1 reply; 19+ messages in thread From: Lux Aliaga @ 2022-12-16 20:27 UTC (permalink / raw) To: Konrad Dybcio, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Kees Cook, Tony Luck, Guilherme G. Piccoli Cc: linux-arm-msm, devicetree, linux-kernel, linux-hardening On 16/12/2022 08:32, Konrad Dybcio wrote: > > On 15.12.2022 20:04, Lux Aliaga wrote: >> Adds support for the Xiaomi Mi A3 (xiaomi-laurel-sprout). Here's a >> summary on what's working. >> >> - dmesg output to bootloader preconfigured display >> - USB >> - UFS >> - SMD RPM regulators >> >> Signed-off-by: Lux Aliaga <they@mint.lgbt> >> --- >> arch/arm64/boot/dts/qcom/Makefile | 1 + >> .../dts/qcom/sm6125-xiaomi-laurel-sprout.dts | 254 ++++++++++++++++++ >> 2 files changed, 255 insertions(+) >> create mode 100644 arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts >> >> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile >> index 3e79496292e7..2b2a0170db14 100644 >> --- a/arch/arm64/boot/dts/qcom/Makefile >> +++ b/arch/arm64/boot/dts/qcom/Makefile >> @@ -157,6 +157,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb >> dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb >> dtb-$(CONFIG_ARCH_QCOM) += sm4250-oneplus-billie2.dtb >> dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb >> +dtb-$(CONFIG_ARCH_QCOM) += sm6125-xiaomi-laurel-sprout.dtb >> dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb >> dtb-$(CONFIG_ARCH_QCOM) += sm6375-sony-xperia-murray-pdx225.dtb >> dtb-$(CONFIG_ARCH_QCOM) += sm7225-fairphone-fp4.dtb >> diff --git a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts >> new file mode 100644 >> index 000000000000..86e1ec47bf5e >> --- /dev/null >> +++ b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts >> @@ -0,0 +1,254 @@ >> +// SPDX-License-Identifier: BSD-3-Clause >> +/* >> + * Copyright (c) 2022, Lux Aliaga <they@mint.lgbt> >> + */ >> + >> +/dts-v1/; >> + >> +#include <dt-bindings/gpio/gpio.h> >> +#include <dt-bindings/input/input.h> >> +#include <dt-bindings/input/gpio-keys.h> >> +#include "sm6125.dtsi" >> + >> +/ { >> + model = "Xiaomi Mi A3"; >> + compatible = "xiaomi,laurel-sprout", "qcom,sm6125"; >> + chassis-type = "handset"; >> + >> + /* required for bootloader to select correct board */ >> + qcom,msm-id = <394 0>; /* sm6125 v0 */ > Unless you have a prototype device, this is not correct. > > Please run `cat /sys/bus/soc/devices/soc0/revision` and confirm > which revision is used on your phone. This segment has already been cross-referenced from downstream, and the device boots up successfully when using this ID, unless you're referring to the comment next to it, in which case I can recheck later, since currently I'm away from my device. -- Lux Aliaga https://nixgoat.me/ ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 4/4] arm64: dts: qcom: sm6125: Initial support for xiaomi-laurel-sprout 2022-12-16 20:27 ` Lux Aliaga @ 2022-12-17 14:23 ` Konrad Dybcio 2022-12-18 14:26 ` Lux Aliaga 0 siblings, 1 reply; 19+ messages in thread From: Konrad Dybcio @ 2022-12-17 14:23 UTC (permalink / raw) To: Lux Aliaga, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Kees Cook, Tony Luck, Guilherme G. Piccoli Cc: linux-arm-msm, devicetree, linux-kernel, linux-hardening On 16.12.2022 21:27, Lux Aliaga wrote: > > On 16/12/2022 08:32, Konrad Dybcio wrote: >> >> On 15.12.2022 20:04, Lux Aliaga wrote: >>> Adds support for the Xiaomi Mi A3 (xiaomi-laurel-sprout). Here's a >>> summary on what's working. >>> >>> - dmesg output to bootloader preconfigured display >>> - USB >>> - UFS >>> - SMD RPM regulators >>> >>> Signed-off-by: Lux Aliaga <they@mint.lgbt> >>> --- >>> arch/arm64/boot/dts/qcom/Makefile | 1 + >>> .../dts/qcom/sm6125-xiaomi-laurel-sprout.dts | 254 ++++++++++++++++++ >>> 2 files changed, 255 insertions(+) >>> create mode 100644 arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts >>> >>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile >>> index 3e79496292e7..2b2a0170db14 100644 >>> --- a/arch/arm64/boot/dts/qcom/Makefile >>> +++ b/arch/arm64/boot/dts/qcom/Makefile >>> @@ -157,6 +157,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb >>> dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb >>> dtb-$(CONFIG_ARCH_QCOM) += sm4250-oneplus-billie2.dtb >>> dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb >>> +dtb-$(CONFIG_ARCH_QCOM) += sm6125-xiaomi-laurel-sprout.dtb >>> dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb >>> dtb-$(CONFIG_ARCH_QCOM) += sm6375-sony-xperia-murray-pdx225.dtb >>> dtb-$(CONFIG_ARCH_QCOM) += sm7225-fairphone-fp4.dtb >>> diff --git a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts >>> new file mode 100644 >>> index 000000000000..86e1ec47bf5e >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts >>> @@ -0,0 +1,254 @@ >>> +// SPDX-License-Identifier: BSD-3-Clause >>> +/* >>> + * Copyright (c) 2022, Lux Aliaga <they@mint.lgbt> >>> + */ >>> + >>> +/dts-v1/; >>> + >>> +#include <dt-bindings/gpio/gpio.h> >>> +#include <dt-bindings/input/input.h> >>> +#include <dt-bindings/input/gpio-keys.h> >>> +#include "sm6125.dtsi" >>> + >>> +/ { >>> + model = "Xiaomi Mi A3"; >>> + compatible = "xiaomi,laurel-sprout", "qcom,sm6125"; >>> + chassis-type = "handset"; >>> + >>> + /* required for bootloader to select correct board */ >>> + qcom,msm-id = <394 0>; /* sm6125 v0 */ >> Unless you have a prototype device, this is not correct. >> >> Please run `cat /sys/bus/soc/devices/soc0/revision` and confirm >> which revision is used on your phone. > This segment has already been cross-referenced from downstream, and the device boots up successfully when using this ID, unless you're referring to the comment next to it, in which case I can recheck later, since currently I'm away from my device. The device boots fine, because the DTB selection works on a "best match" basis. If it can't find one for the exact version of the SoC, it may try to boot the closest one. Konrad > ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 4/4] arm64: dts: qcom: sm6125: Initial support for xiaomi-laurel-sprout 2022-12-17 14:23 ` Konrad Dybcio @ 2022-12-18 14:26 ` Lux Aliaga 0 siblings, 0 replies; 19+ messages in thread From: Lux Aliaga @ 2022-12-18 14:26 UTC (permalink / raw) To: Konrad Dybcio, Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski, Kees Cook, Tony Luck, Guilherme G. Piccoli Cc: linux-arm-msm, devicetree, linux-kernel, linux-hardening On 17/12/2022 11:23, Konrad Dybcio wrote: > On 16.12.2022 21:27, Lux Aliaga wrote: >> On 16/12/2022 08:32, Konrad Dybcio wrote: >>> On 15.12.2022 20:04, Lux Aliaga wrote: >>>> Adds support for the Xiaomi Mi A3 (xiaomi-laurel-sprout). Here's a >>>> summary on what's working. >>>> >>>> - dmesg output to bootloader preconfigured display >>>> - USB >>>> - UFS >>>> - SMD RPM regulators >>>> >>>> Signed-off-by: Lux Aliaga <they@mint.lgbt> >>>> --- >>>> arch/arm64/boot/dts/qcom/Makefile | 1 + >>>> .../dts/qcom/sm6125-xiaomi-laurel-sprout.dts | 254 ++++++++++++++++++ >>>> 2 files changed, 255 insertions(+) >>>> create mode 100644 arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile >>>> index 3e79496292e7..2b2a0170db14 100644 >>>> --- a/arch/arm64/boot/dts/qcom/Makefile >>>> +++ b/arch/arm64/boot/dts/qcom/Makefile >>>> @@ -157,6 +157,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb >>>> dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb >>>> dtb-$(CONFIG_ARCH_QCOM) += sm4250-oneplus-billie2.dtb >>>> dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb >>>> +dtb-$(CONFIG_ARCH_QCOM) += sm6125-xiaomi-laurel-sprout.dtb >>>> dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb >>>> dtb-$(CONFIG_ARCH_QCOM) += sm6375-sony-xperia-murray-pdx225.dtb >>>> dtb-$(CONFIG_ARCH_QCOM) += sm7225-fairphone-fp4.dtb >>>> diff --git a/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts >>>> new file mode 100644 >>>> index 000000000000..86e1ec47bf5e >>>> --- /dev/null >>>> +++ b/arch/arm64/boot/dts/qcom/sm6125-xiaomi-laurel-sprout.dts >>>> @@ -0,0 +1,254 @@ >>>> +// SPDX-License-Identifier: BSD-3-Clause >>>> +/* >>>> + * Copyright (c) 2022, Lux Aliaga <they@mint.lgbt> >>>> + */ >>>> + >>>> +/dts-v1/; >>>> + >>>> +#include <dt-bindings/gpio/gpio.h> >>>> +#include <dt-bindings/input/input.h> >>>> +#include <dt-bindings/input/gpio-keys.h> >>>> +#include "sm6125.dtsi" >>>> + >>>> +/ { >>>> + model = "Xiaomi Mi A3"; >>>> + compatible = "xiaomi,laurel-sprout", "qcom,sm6125"; >>>> + chassis-type = "handset"; >>>> + >>>> + /* required for bootloader to select correct board */ >>>> + qcom,msm-id = <394 0>; /* sm6125 v0 */ >>> Unless you have a prototype device, this is not correct. >>> >>> Please run `cat /sys/bus/soc/devices/soc0/revision` and confirm >>> which revision is used on your phone. >> This segment has already been cross-referenced from downstream, and the device boots up successfully when using this ID, unless you're referring to the comment next to it, in which case I can recheck later, since currently I'm away from my device. > The device boots fine, because the DTB selection works on a "best match" > basis. If it can't find one for the exact version of the SoC, it may > try to boot the closest one. > > Konrad Confirmed it. It's an sm6125 v1. Will fix. -- Lux Aliaga https://nixgoat.me/ ^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH v4 1/4] dt-bindings: ufs: qcom: Add SM6125 compatible string 2022-12-15 19:04 [PATCH v4 1/4] dt-bindings: ufs: qcom: Add SM6125 compatible string Lux Aliaga ` (2 preceding siblings ...) 2022-12-15 19:04 ` [PATCH v4 4/4] arm64: dts: qcom: sm6125: Initial support for xiaomi-laurel-sprout Lux Aliaga @ 2022-12-16 11:25 ` Krzysztof Kozlowski 3 siblings, 0 replies; 19+ messages in thread From: Krzysztof Kozlowski @ 2022-12-16 11:25 UTC (permalink / raw) To: Lux Aliaga, Andy Gross, Bjorn Andersson, Konrad Dybcio, Alim Akhtar, Avri Altman, Bart Van Assche, Rob Herring, Krzysztof Kozlowski Cc: linux-arm-msm, linux-scsi, devicetree, linux-kernel On 15/12/2022 20:04, Lux Aliaga wrote: > Document the compatible for UFS found on the SM6125. > > Signed-off-by: Lux Aliaga <they@mint.lgbt> > --- Three versions the same day? It's too much. Where is the changelog? What happened here? > Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 2 ++ > 1 file changed, 2 insertions(+) > Best regards, Krzysztof ^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2022-12-27 16:34 UTC | newest] Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-12-15 19:04 [PATCH v4 1/4] dt-bindings: ufs: qcom: Add SM6125 compatible string Lux Aliaga 2022-12-15 19:04 ` [PATCH v4 2/4] arm64: dts: qcom: sm6125: Add UFS nodes Lux Aliaga 2022-12-16 11:24 ` Konrad Dybcio 2022-12-20 18:57 ` Lux Aliaga 2022-12-20 19:32 ` Konrad Dybcio 2022-12-20 20:30 ` Dmitry Baryshkov 2022-12-20 20:32 ` Dmitry Baryshkov 2022-12-21 3:34 ` Lux Aliaga 2022-12-21 7:12 ` Johan Hovold 2022-12-22 3:57 ` Lux Aliaga 2022-12-27 16:34 ` Johan Hovold 2022-12-15 19:04 ` [PATCH v4 3/4] dt-bindings: arm: qcom: Document xiaomi,laurel-sprout board Lux Aliaga 2022-12-16 11:26 ` Krzysztof Kozlowski 2022-12-15 19:04 ` [PATCH v4 4/4] arm64: dts: qcom: sm6125: Initial support for xiaomi-laurel-sprout Lux Aliaga 2022-12-16 11:32 ` Konrad Dybcio 2022-12-16 20:27 ` Lux Aliaga 2022-12-17 14:23 ` Konrad Dybcio 2022-12-18 14:26 ` Lux Aliaga 2022-12-16 11:25 ` [PATCH v4 1/4] dt-bindings: ufs: qcom: Add SM6125 compatible string Krzysztof Kozlowski
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).