From: Samuel Holland <samuel@sholland.org>
To: Icenowy Zheng <uwu@icenowy.me>,
Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 2/4] nvmem: sunxi_sid: Drop the workaround on A64
Date: Mon, 15 Aug 2022 19:16:37 -0500 [thread overview]
Message-ID: <dd9d439d-06a8-b25c-9cea-9065f67a628b@sholland.org> (raw)
In-Reply-To: <197d58ed8b674d622e5c6a049905cd88e40659bc.camel@icenowy.me>
Hi Icenowy,
On 8/15/22 3:37 AM, Icenowy Zheng wrote:
> 在 2022-08-14星期日的 12:36 -0500，Samuel Holland写道：
>> Now that the SRAM readout code is fixed by using 32-bit accesses, it
>> always returns the same values as register readout, so the A64
>> variant
>> no longer needs the workaround. This makes the D1 variant structure
>> redundant, so remove it.
>
> Is this really tested on A64?
Yes, I tested this on a Pine A64-LTS. You can see the difference easily with
md.{b,w,l,q} in the U-Boot shell.
I verified that all three of the following are identical:
- NVMEM exported to sysfs with the register readout method
- NVMEM exported to sysfs with this patch series applied
- SRAM dump made with md.l in the U-Boot shell
Regards,
Samuel
next prev parent reply other threads:[~2022-08-16 3:46 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-14 17:36 [PATCH 0/4] nvmem: Support non-stride-aligned NVMEM cell data Samuel Holland
2022-08-14 17:36 ` [PATCH 1/4] nvmem: sunxi_sid: Always use 32-bit MMIO reads Samuel Holland
2022-08-25 12:05 ` Heiko Stübner
2022-09-09 8:48 ` Srinivas Kandagatla
2023-01-08 20:50 ` Jernej Škrabec
2022-08-14 17:36 ` [PATCH 2/4] nvmem: sunxi_sid: Drop the workaround on A64 Samuel Holland
2022-08-15 8:37 ` Icenowy Zheng
2022-08-16 0:16 ` Samuel Holland [this message]
2022-08-14 17:36 ` [PATCH 3/4] dt-bindings: nvmem: Allow bit offsets greater than a byte Samuel Holland
2022-08-25 21:02 ` Rob Herring
2022-09-09 3:29 ` Samuel Holland
2023-01-01 18:59 ` Samuel Holland
2022-08-14 17:36 ` [PATCH 4/4] nvmem: core: Support reading cells with >= 8 bit offsets Samuel Holland
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