From: "Andy Lutomirski" <luto@kernel.org>
To: "Tony Luck" <tony.luck@intel.com>
Cc: "Dave Hansen" <dave.hansen@intel.com>,
"Fenghua Yu" <fenghua.yu@intel.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Ingo Molnar" <mingo@redhat.com>,
"Borislav Petkov" <bp@alien8.de>,
"Peter Zijlstra (Intel)" <peterz@infradead.org>,
"Lu Baolu" <baolu.lu@linux.intel.com>,
"Joerg Roedel" <joro@8bytes.org>,
"Josh Poimboeuf" <jpoimboe@redhat.com>,
"Dave Jiang" <dave.jiang@intel.com>,
"Jacob Jun Pan" <jacob.jun.pan@intel.com>,
"Raj Ashok" <ashok.raj@intel.com>,
"Shankar, Ravi V" <ravi.v.shankar@intel.com>,
iommu@lists.linux-foundation.org,
"the arch/x86 maintainers" <x86@kernel.org>,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/8] x86/traps: Demand-populate PASID MSR via #GP
Date: Wed, 29 Sep 2021 10:48:24 -0700 [thread overview]
Message-ID: <e396e8d4-9221-4426-bd38-41ccac040e5f@www.fastmail.com> (raw)
In-Reply-To: <YVSdauvwzs1HJlLz@agluck-desk2.amr.corp.intel.com>
On Wed, Sep 29, 2021, at 10:07 AM, Luck, Tony wrote:
> On Wed, Sep 29, 2021 at 09:58:22AM -0700, Andy Lutomirski wrote:
>> On 9/28/21 16:10, Luck, Tony wrote:
>> > Moving beyond pseudo-code and into compiles-but-probably-broken-code.
>> >
>> >
>> > The intent of the functions below is that Fenghua should be able to
>> > do:
>> >
>> > void fpu__pasid_write(u32 pasid)
>> > {
>> > u64 msr_val = pasid | MSR_IA32_PASID_VALID;
>> > struct ia32_pasid_state *addr;
>> >
>> > addr = begin_update_one_xsave_feature(current, XFEATURE_PASID, true);
>> > addr->pasid = msr_val;
>> > finish_update_one_xsave_feature(current);
>> > }
>> >
>>
>> This gets gnarly because we would presumably like to optimize the case where
>> we can do the update directly in registers. I wonder if we can do it with a
>> bit of macro magic in a somewhat generic way:
>
> Can we defere the optimizations until there is a use case that
> cares? The existing use case (fixing up the #GP fault by setting
> the PASID MSR) isn't performance critical.
>
> Let's just have something that is clear (or as clear as any xsave
> code can be) and correct.
>
>
The goal would be to use the same code for CET and PKRU, I think.
next prev parent reply other threads:[~2021-09-29 17:48 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-20 19:23 [PATCH 0/8] Re-enable ENQCMD and PASID MSR Fenghua Yu
2021-09-20 19:23 ` [PATCH 1/8] iommu/vt-d: Clean up unused PASID updating functions Fenghua Yu
2021-09-29 7:34 ` Lu Baolu
2021-09-30 0:40 ` Fenghua Yu
2021-09-20 19:23 ` [PATCH 2/8] x86/process: Clear PASID state for a newly forked/cloned thread Fenghua Yu
2021-09-20 19:23 ` [PATCH 3/8] sched: Define and initialize a flag to identify valid PASID in the task Fenghua Yu
2021-09-20 19:23 ` [PATCH 4/8] x86/traps: Demand-populate PASID MSR via #GP Fenghua Yu
2021-09-22 21:07 ` Peter Zijlstra
2021-09-22 21:11 ` Peter Zijlstra
2021-09-22 21:26 ` Luck, Tony
2021-09-23 7:03 ` Peter Zijlstra
2021-09-22 21:33 ` Dave Hansen
2021-09-23 7:05 ` Peter Zijlstra
2021-09-22 21:36 ` Fenghua Yu
2021-09-22 23:39 ` Fenghua Yu
2021-09-23 17:14 ` Luck, Tony
2021-09-24 13:37 ` Peter Zijlstra
2021-09-24 15:39 ` Luck, Tony
2021-09-29 9:00 ` Peter Zijlstra
2021-09-23 11:31 ` Thomas Gleixner
2021-09-23 23:17 ` Andy Lutomirski
2021-09-24 2:56 ` Fenghua Yu
2021-09-24 5:12 ` Andy Lutomirski
2021-09-27 21:02 ` Luck, Tony
2021-09-27 23:51 ` Dave Hansen
2021-09-28 18:50 ` Luck, Tony
2021-09-28 19:19 ` Dave Hansen
2021-09-28 20:28 ` Luck, Tony
2021-09-28 20:55 ` Dave Hansen
2021-09-28 23:10 ` Luck, Tony
2021-09-28 23:50 ` Fenghua Yu
2021-09-29 0:08 ` Luck, Tony
2021-09-29 0:26 ` Yu, Fenghua
2021-09-29 1:06 ` Luck, Tony
2021-09-29 1:16 ` Fenghua Yu
2021-09-29 2:11 ` Luck, Tony
2021-09-29 1:56 ` Yu, Fenghua
2021-09-29 2:15 ` Luck, Tony
2021-09-29 16:58 ` Andy Lutomirski
2021-09-29 17:07 ` Luck, Tony
2021-09-29 17:48 ` Andy Lutomirski [this message]
2021-09-20 19:23 ` [PATCH 5/8] x86/mmu: Add mm-based PASID refcounting Fenghua Yu
2021-09-23 5:43 ` Lu Baolu
2021-09-30 0:44 ` Fenghua Yu
2021-09-23 14:36 ` Thomas Gleixner
2021-09-23 16:40 ` Luck, Tony
2021-09-23 17:48 ` Thomas Gleixner
2021-09-24 13:18 ` Thomas Gleixner
2021-09-24 16:12 ` Luck, Tony
2021-09-24 23:03 ` Andy Lutomirski
2021-09-24 23:11 ` Luck, Tony
2021-09-29 9:54 ` Peter Zijlstra
2021-09-29 12:28 ` Thomas Gleixner
2021-09-29 16:51 ` Luck, Tony
2021-09-29 17:07 ` Fenghua Yu
2021-09-29 16:59 ` Andy Lutomirski
2021-09-29 17:15 ` Thomas Gleixner
2021-09-29 17:41 ` Luck, Tony
2021-09-29 17:46 ` Andy Lutomirski
2021-09-29 18:07 ` Fenghua Yu
2021-09-29 18:31 ` Luck, Tony
2021-09-29 20:07 ` Thomas Gleixner
2021-09-24 16:12 ` Fenghua Yu
2021-09-25 23:13 ` Thomas Gleixner
2021-09-28 16:36 ` Fenghua Yu
2021-09-23 23:09 ` Andy Lutomirski
2021-09-23 23:22 ` Luck, Tony
2021-09-24 5:17 ` Andy Lutomirski
2021-09-20 19:23 ` [PATCH 6/8] x86/cpufeatures: Re-enable ENQCMD Fenghua Yu
2021-09-20 19:23 ` [PATCH 7/8] tools/objtool: Check for use of the ENQCMD instruction in the kernel Fenghua Yu
2021-09-22 21:03 ` Peter Zijlstra
2021-09-22 23:44 ` Fenghua Yu
2021-09-23 7:17 ` Peter Zijlstra
2021-09-23 15:26 ` Fenghua Yu
2021-09-24 0:55 ` Josh Poimboeuf
2021-09-24 0:57 ` Fenghua Yu
2021-09-20 19:23 ` [PATCH 8/8] docs: x86: Change documentation for SVA (Shared Virtual Addressing) Fenghua Yu
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