From: Matthias Brugger <matthias.bgg@gmail.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: sean.wang@mediatek.com, linus.walleij@linaro.org,
robh+dt@kernel.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, amit.kucheria@linaro.org,
Mars Cheng <mars.cheng@mediatek.com>
Subject: Re: [PATCH 5/5] pinctrl: mediatek: Add initial pinctrl driver for MT6797 SoC
Date: Tue, 16 Oct 2018 15:58:41 +0200 [thread overview]
Message-ID: <e7abee72-23a3-4716-baf0-484514bbb019@gmail.com> (raw)
In-Reply-To: <20181011164429.GA18174@Mani-XPS-13-9360>
On 11/10/2018 18:44, Manivannan Sadhasivam wrote:
> On Thu, Oct 11, 2018 at 05:50:19PM +0200, Matthias Brugger wrote:
>>
>>
>> On 08/10/2018 21:14, Manivannan Sadhasivam wrote:
>>> Add initial pinctrl driver for Mediatek MT6797 SoC supporting only
>>> GPIO and pinmux configurations.
>>>
>>> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
>>> ---
>>> drivers/pinctrl/mediatek/Kconfig | 7 +
>>> drivers/pinctrl/mediatek/Makefile | 1 +
>>> drivers/pinctrl/mediatek/pinctrl-mt6797.c | 82 +
>>> drivers/pinctrl/mediatek/pinctrl-mtk-mt6797.h | 2430 +++++++++++++++++
>>> 4 files changed, 2520 insertions(+)
>>> create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt6797.c
>>> create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt6797.h
>>>
>> [...]
>>> diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-mt6797.h b/drivers/pinctrl/mediatek/pinctrl-mtk-mt6797.h
>>> new file mode 100644
>>> index 000000000000..8949d2a15c39
>>> --- /dev/null
>>> +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-mt6797.h
>>> @@ -0,0 +1,2430 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>> +/*
>>> + * Based on pinctrl-mtk-mt6765.h
>>> + *
>>> + * Copyright (C) 2018 MediaTek Inc.
>>> + *
>>> + * Author: ZH Chen <zh.chen@mediatek.com>
>>> + *
>>> + * Copyright (c) 2018 Manivannan Sadhasivam
>>> + */
>>> +
>>> +#ifndef __PINCTRL_MTK_MT6797_H
>>> +#define __PINCTRL_MTK_MT6797_H
>>> +
>>> +#include "pinctrl-paris.h"
>>> +
>>> +static const struct mtk_pin_desc mtk_pins_mt6797[] = {
>>> + MTK_PIN(
>>> + 0, "GPIO0",
>>> + MTK_EINT_FUNCTION(NO_EINT_SUPPORT, NO_EINT_SUPPORT),
>>> + DRV_GRP3,
>>
>> As far as I have seen, you put all pins in driving group 3, but from the public
>> available "Functional Specification" (page 51-81) I can see that there exist
>> several driving groups:
>> 2/4/6/8 mA (DRV_GRP3)
>> 4/8/12/16 mA (not sure which group this is)
>> 2/4/6/8/10/12/14/16 mA (DRV_GRP4).
>>
>
> Not sure about that. But I derived the configuration from DRV_CFGx
> registers available in "Application Software Register Table - Part 1"
> from page no: 906.
>
> This register supports 2/4/6/8mA and this belongs to DRV_GRP2/DRV_GRP3
> [1].
I can see other driving groups as defined in the "Functional Specification" [1]
which gets also reflected in the "Application Software Register Table - Part 1"
[2], see for example page 852.
CCing Mars, maybe he can help to clarify.
Regards,
Matthias
[1]
https://www.96boards.org/documentation/consumer/mediatekx20/additional-docs/docs/MT6797_Functional_Specification_V1_0.pdf
[2]
https://www.96boards.org/documentation/consumer/mediatekx20/additional-docs/docs/MT6797_Register_Table_Part_1.pdf
>
> Still I'm not fully confident of my choice here. Maybe Sean can throw
> some inputs!
>
> Thanks,
> Mani
>
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c#n40
>
>> Regards,
>> Matthias
>>
next prev parent reply other threads:[~2018-10-16 14:00 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-08 19:14 [PATCH 0/5] Add initial pinctrl support for MT6797 SoC Manivannan Sadhasivam
2018-10-08 19:14 ` [PATCH 1/5] dt-bindings: pinctrl: Add devicetree constants " Manivannan Sadhasivam
2018-10-08 19:14 ` [PATCH 2/5] arm64: dts: mediatek: mt6797: Add pinctrl support Manivannan Sadhasivam
2018-10-18 14:24 ` Sean Wang
[not found] ` <CAGp9LzoSA=06CF_yNMOHnfmRnFzpBA4R2YGhbWmxdSKci2uF0w@mail.gmail.com>
2018-10-19 8:27 ` Manivannan Sadhasivam
2018-10-08 19:14 ` [PATCH 3/5] arm64: dts: mediatek: x20: Add pinmux support for UART1 Manivannan Sadhasivam
2018-10-08 19:14 ` [PATCH 4/5] pinctrl: mediatek: pinctrl-mtk-common-v2: Make eint_m u16 Manivannan Sadhasivam
2018-10-11 9:29 ` Matthias Brugger
2018-10-15 14:18 ` Linus Walleij
2018-10-08 19:14 ` [PATCH 5/5] pinctrl: mediatek: Add initial pinctrl driver for MT6797 SoC Manivannan Sadhasivam
2018-10-11 9:30 ` Matthias Brugger
2018-10-11 15:50 ` Matthias Brugger
2018-10-11 16:44 ` Manivannan Sadhasivam
2018-10-16 13:58 ` Matthias Brugger [this message]
2018-10-18 15:06 ` Sean Wang
2018-10-30 12:51 ` Linus Walleij
2018-10-30 23:45 ` Sean Wang
2018-10-16 8:36 ` [PATCH 0/5] Add initial pinctrl support " Linus Walleij
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e7abee72-23a3-4716-baf0-484514bbb019@gmail.com \
--to=matthias.bgg@gmail.com \
--cc=amit.kucheria@linaro.org \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=mars.cheng@mediatek.com \
--cc=robh+dt@kernel.org \
--cc=sean.wang@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).