[PATCH v3,1/3] media: dt-bindings: media: mediatek: vcodec: Fix clock num not correctly

[PATCH v3,1/3] media: dt-bindings: media: mediatek: vcodec: Fix clock num not correctly

[Yunfei Dong]

From: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>

mt8195 and mt8192 have different clock numbers, can't write 'clocks' and
'clock-names' with const value.

Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
---
Reference series:
[1]: v5 of this series is presend by Allen-KH Cheng.
     message-id: 20221128143832.25584-4-allen-kh.cheng@mediatek.com
---
 .../bindings/media/mediatek,vcodec-subdev-decoder.yaml   | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
index 7c5b4a91c59b..09781ef02193 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
@@ -110,15 +110,12 @@ patternProperties:
           Refer to bindings/iommu/mediatek,iommu.yaml.
 
       clocks:
+        minItems: 1
         maxItems: 5
 
       clock-names:
-        items:
-          - const: sel
-          - const: soc-vdec
-          - const: soc-lat
-          - const: vdec
-          - const: top
+        minItems: 1
+        maxItems: 5
 
       assigned-clocks:
         maxItems: 1
-- 
2.18.0

[PATCH v3,2/3] media: dt-bindings: media: mediatek: vcodec: Change the max reg value to 2

[Yunfei Dong]

From: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>

Need to add racing control register base in device node for mt8195 support
inner racing mode. Changing the max reg value from 1 to 2.

Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
---
 .../bindings/media/mediatek,vcodec-subdev-decoder.yaml      | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
index 09781ef02193..d20ef15147a4 100644
--- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
@@ -61,7 +61,10 @@ properties:
       - mediatek,mt8195-vcodec-dec
 
   reg:
-    maxItems: 1
+    minItems: 1
+    items:
+      - description: VDEC_SYS register space
+      - description: VDEC_RACING_CTRL register space
 
   iommus:
     minItems: 1
@@ -98,6 +101,7 @@ patternProperties:
 
       reg:
         maxItems: 1
+        description: VDEC_MISC register space
 
       interrupts:
         maxItems: 1
-- 
2.18.0

[PATCH v3,3/3] arm64: dts: mt8195: Add video decoder node

[Yunfei Dong]

From: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>

Add video decoder node to mt8195 device tree.

Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 70 ++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 905d1a90b406..2f6f87a8e90b 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1874,6 +1874,76 @@
 			power-domains = <&spm MT8195_POWER_DOMAIN_CAM>;
 		};
 
+		video-codec@18000000 {
+			compatible = "mediatek,mt8195-vcodec-dec";
+			mediatek,scp = <&scp>;
+			iommus = <&iommu_vdo M4U_PORT_L21_VDEC_MC_EXT>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			reg = <0 0x18000000 0 0x1000>,
+			      <0 0x18004000 0 0x1000>;
+			ranges = <0 0 0 0x18000000 0 0x26000>;
+
+			video-codec@2000 {
+				compatible = "mediatek,mtk-vcodec-lat-soc";
+				reg = <0 0x2000 0 0x800>;
+				iommus = <&iommu_vpp M4U_PORT_L23_VDEC_UFO_ENC_EXT>,
+					 <&iommu_vpp M4U_PORT_L23_VDEC_RDMA_EXT>;
+				clocks = <&topckgen CLK_TOP_VDEC>,
+					 <&vdecsys_soc CLK_VDEC_SOC_VDEC>,
+					 <&vdecsys_soc CLK_VDEC_SOC_LAT>,
+					 <&topckgen CLK_TOP_UNIVPLL_D4>;
+				clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat", "vdec-top";
+				assigned-clocks = <&topckgen CLK_TOP_VDEC>;
+				assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
+				power-domains = <&spm MT8195_POWER_DOMAIN_VDEC0>;
+			};
+
+			video-codec@10000 {
+				compatible = "mediatek,mtk-vcodec-lat";
+				reg = <0 0x10000 0 0x800>;
+				interrupts = <GIC_SPI 708 IRQ_TYPE_LEVEL_HIGH 0>;
+				iommus = <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_VLD_EXT>,
+					 <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_VLD2_EXT>,
+					 <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_AVC_MC_EXT>,
+					 <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_PRED_RD_EXT>,
+					 <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_TILE_EXT>,
+					 <&iommu_vdo M4U_PORT_L24_VDEC_LAT0_WDMA_EXT>;
+				clocks = <&topckgen CLK_TOP_VDEC>,
+					 <&vdecsys_soc CLK_VDEC_SOC_VDEC>,
+					 <&vdecsys_soc CLK_VDEC_SOC_LAT>,
+					 <&topckgen CLK_TOP_UNIVPLL_D4>;
+				clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat", "vdec-top";
+				assigned-clocks = <&topckgen CLK_TOP_VDEC>;
+				assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
+				power-domains = <&spm MT8195_POWER_DOMAIN_VDEC0>;
+			};
+
+			video-codec@25000 {
+				compatible = "mediatek,mtk-vcodec-core";
+				reg = <0 0x25000 0 0x1000>;		/* VDEC_CORE_MISC */
+				interrupts = <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH 0>;
+				iommus = <&iommu_vdo M4U_PORT_L21_VDEC_MC_EXT>,
+					 <&iommu_vdo M4U_PORT_L21_VDEC_UFO_EXT>,
+					 <&iommu_vdo M4U_PORT_L21_VDEC_PP_EXT>,
+					 <&iommu_vdo M4U_PORT_L21_VDEC_PRED_RD_EXT>,
+					 <&iommu_vdo M4U_PORT_L21_VDEC_PRED_WR_EXT>,
+					 <&iommu_vdo M4U_PORT_L21_VDEC_PPWRAP_EXT>,
+					 <&iommu_vdo M4U_PORT_L21_VDEC_TILE_EXT>,
+					 <&iommu_vdo M4U_PORT_L21_VDEC_VLD_EXT>,
+					 <&iommu_vdo M4U_PORT_L21_VDEC_VLD2_EXT>,
+					 <&iommu_vdo M4U_PORT_L21_VDEC_AVC_MV_EXT>;
+				clocks = <&topckgen CLK_TOP_VDEC>,
+					 <&vdecsys CLK_VDEC_VDEC>,
+					 <&vdecsys CLK_VDEC_LAT>,
+					 <&topckgen CLK_TOP_UNIVPLL_D4>;
+				clock-names = "vdec-sel", "vdec-vdec", "vdec-lat", "vdec-top";
+				assigned-clocks = <&topckgen CLK_TOP_VDEC>;
+				assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
+				power-domains = <&spm MT8195_POWER_DOMAIN_VDEC1>;
+			};
+		};
+
 		larb24: larb@1800d000 {
 			compatible = "mediatek,mt8195-smi-larb";
 			reg = <0 0x1800d000 0 0x1000>;
-- 
2.18.0

Re: [PATCH v3,3/3] arm64: dts: mt8195: Add video decoder node

[AngeloGioacchino Del Regno]

Il 01/12/22 13:15, Yunfei Dong ha scritto:
> From: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>
> 
> Add video decoder node to mt8195 device tree.
> 
> Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Re: [PATCH v3,2/3] media: dt-bindings: media: mediatek: vcodec: Change the max reg value to 2

[AngeloGioacchino Del Regno]

Il 01/12/22 13:15, Yunfei Dong ha scritto:
> From: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>
> 
> Need to add racing control register base in device node for mt8195 support
> inner racing mode. Changing the max reg value from 1 to 2.
> 
> Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>

You forgot to mention in the commit message that you're also adding a description
for the VDEC_MISC register space.

Please add that, after which:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Re: [PATCH v3,1/3] media: dt-bindings: media: mediatek: vcodec: Fix clock num not correctly

[Rob Herring]

On Thu, Dec 01, 2022 at 08:15:22PM +0800, Yunfei Dong wrote:
> From: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>
> 
> mt8195 and mt8192 have different clock numbers, can't write 'clocks' and
> 'clock-names' with const value.
> 
> Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
> ---
> Reference series:
> [1]: v5 of this series is presend by Allen-KH Cheng.
>      message-id: 20221128143832.25584-4-allen-kh.cheng@mediatek.com
> ---
>  .../bindings/media/mediatek,vcodec-subdev-decoder.yaml   | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
> index 7c5b4a91c59b..09781ef02193 100644
> --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
> +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
> @@ -110,15 +110,12 @@ patternProperties:
>            Refer to bindings/iommu/mediatek,iommu.yaml.
>  
>        clocks:
> +        minItems: 1
>          maxItems: 5
>  
>        clock-names:
> -        items:
> -          - const: sel
> -          - const: soc-vdec
> -          - const: soc-lat
> -          - const: vdec
> -          - const: top
> +        minItems: 1
> +        maxItems: 5

Names need to be defined. This is a step backwards.

Rob

>  
>        assigned-clocks:
>          maxItems: 1
> -- 
> 2.18.0
> 
> 

Re: [PATCH v3,2/3] media: dt-bindings: media: mediatek: vcodec: Change the max reg value to 2

[Rob Herring]

On Thu, 01 Dec 2022 20:15:23 +0800, Yunfei Dong wrote:
> From: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>
> 
> Need to add racing control register base in device node for mt8195 support
> inner racing mode. Changing the max reg value from 1 to 2.
> 
> Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
> ---
>  .../bindings/media/mediatek,vcodec-subdev-decoder.yaml      | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH v3,1/3] media: dt-bindings: media: mediatek: vcodec: Fix clock num not correctly

[AngeloGioacchino Del Regno]

Il 02/12/22 00:57, Rob Herring ha scritto:
> On Thu, Dec 01, 2022 at 08:15:22PM +0800, Yunfei Dong wrote:
>> From: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>
>>
>> mt8195 and mt8192 have different clock numbers, can't write 'clocks' and
>> 'clock-names' with const value.
>>
>> Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
>> ---
>> Reference series:
>> [1]: v5 of this series is presend by Allen-KH Cheng.
>>       message-id: 20221128143832.25584-4-allen-kh.cheng@mediatek.com
>> ---
>>   .../bindings/media/mediatek,vcodec-subdev-decoder.yaml   | 9 +++------
>>   1 file changed, 3 insertions(+), 6 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
>> index 7c5b4a91c59b..09781ef02193 100644
>> --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
>> +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml
>> @@ -110,15 +110,12 @@ patternProperties:
>>             Refer to bindings/iommu/mediatek,iommu.yaml.
>>   
>>         clocks:
>> +        minItems: 1
>>           maxItems: 5
>>   
>>         clock-names:
>> -        items:
>> -          - const: sel
>> -          - const: soc-vdec
>> -          - const: soc-lat
>> -          - const: vdec
>> -          - const: top
>> +        minItems: 1
>> +        maxItems: 5
> 
> Names need to be defined. This is a step backwards.
> 

I was thinking the same but wanted to wait for someone else's opinion before.

Yunfei, this would be...

- if:
     properties:
       compatible:
         .... mt8192
   then:
      clock-names:
         .... whatever we have

- if:
    properties... blah mt8195
   then:
     clock-names:
         ..... new ones

...you should know already, but I'm just trying to speed up things here.

Cheers,
Angelo

> Rob
> 
>>   
>>         assigned-clocks:
>>           maxItems: 1
>> -- 
>> 2.18.0
>>
>>

Re: [PATCH v3,1/3] media: dt-bindings: media: mediatek: vcodec: Fix clock num not correctly

[Yunfei Dong (董云飞)]

Hi Angelo,

Thanks for your suggestion.

I already sent patch v4 before your suggestion. Looks the solution is
the same.

Could you please help to review patch v4 again when you are free?

Thanks.

Best Regards,
Yunfei Dong

On Fri, 2022-12-02 at 12:37 +0100, AngeloGioacchino Del Regno wrote:
> Il 02/12/22 00:57, Rob Herring ha scritto:
> > On Thu, Dec 01, 2022 at 08:15:22PM +0800, Yunfei Dong wrote:
> > > From: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com>
> > > 
> > > mt8195 and mt8192 have different clock numbers, can't write
> > > 'clocks' and
> > > 'clock-names' with const value.
> > > 
> > > Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
> > > ---
> > > Reference series:
> > > [1]: v5 of this series is presend by Allen-KH Cheng.
> > >       message-id: 
> > > 20221128143832.25584-4-allen-kh.cheng@mediatek.com
> > > ---
> > >   .../bindings/media/mediatek,vcodec-subdev-decoder.yaml   | 9
> > > +++------
> > >   1 file changed, 3 insertions(+), 6 deletions(-)
> > > 
> > > diff --git
> > > a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-
> > > decoder.yaml
> > > b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-
> > > decoder.yaml
> > > index 7c5b4a91c59b..09781ef02193 100644
> > > --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-
> > > subdev-decoder.yaml
> > > +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-
> > > subdev-decoder.yaml
> > > @@ -110,15 +110,12 @@ patternProperties:
> > >             Refer to bindings/iommu/mediatek,iommu.yaml.
> > >   
> > >         clocks:
> > > +        minItems: 1
> > >           maxItems: 5
> > >   
> > >         clock-names:
> > > -        items:
> > > -          - const: sel
> > > -          - const: soc-vdec
> > > -          - const: soc-lat
> > > -          - const: vdec
> > > -          - const: top
> > > +        minItems: 1
> > > +        maxItems: 5
> > 
> > Names need to be defined. This is a step backwards.
> > 
> 
> I was thinking the same but wanted to wait for someone else's opinion
> before.
> 
> Yunfei, this would be...
> 
> - if:
>      properties:
>        compatible:
>          .... mt8192
>    then:
>       clock-names:
>          .... whatever we have
> 
> - if:
>     properties... blah mt8195
>    then:
>      clock-names:
>          ..... new ones
> 
> ...you should know already, but I'm just trying to speed up things
> here.
> 
> Cheers,
> Angelo
> 
> > Rob
> > 
> > >   
> > >         assigned-clocks:
> > >           maxItems: 1
> > > -- 
> > > 2.18.0
> > > 
> > > 
> 
>