[PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[Peter Zijlstra]

Hi,

Yesterday Tom reported a CPA bug triggered by the AMDGPU team.

It turns out that with commit:

  a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")

I misread the cpa array code and messed up the TLB invalidations for it. These
patches (hopefully) fix the issue while also shrinking the CPA code again.

Tom, would you be so kind as to test again? These patches are significantly
different from what I send you yesterday.

---
arch/x86/mm/mm_internal.h |   2 +
arch/x86/mm/pageattr.c    | 167 ++++++++++++++++++++--------------------------
arch/x86/mm/tlb.c         |   4 +-
3 files changed, 79 insertions(+), 94 deletions(-)

[PATCH 1/4] x86/mm/cpa: Add __cpa_addr() helper

[Peter Zijlstra]

[-- Attachment #1: peterz-cpa-addr.patch --]
[-- Type: text/plain, Size: 1908 bytes --]

The code to compute the virtual address of a cpa_data is duplicated;
introduce a helper before more copies happen.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/x86/mm/pageattr.c |   38 +++++++++++++++++++-------------------
 1 file changed, 19 insertions(+), 19 deletions(-)

--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -228,6 +228,23 @@ static bool __cpa_pfn_in_highmap(unsigne
 
 #endif
 
+static unsigned long __cpa_addr(struct cpa_data *cpa, int idx)
+{
+	if (cpa->flags & CPA_PAGES_ARRAY) {
+		struct page *page = cpa->pages[idx];
+
+		if (unlikely(PageHighMem(page)))
+			return 0;
+
+		return (unsigned long)page_address(page);
+	}
+
+	if (cpa->flags & CPA_ARRAY)
+		return cpa->vaddr[idx];
+
+	return *cpa->vaddr;
+}
+
 /*
  * Flushing functions
  */
@@ -1468,15 +1485,7 @@ static int __change_page_attr(struct cpa
 	unsigned int level;
 	pte_t *kpte, old_pte;
 
-	if (cpa->flags & CPA_PAGES_ARRAY) {
-		struct page *page = cpa->pages[cpa->curpage];
-		if (unlikely(PageHighMem(page)))
-			return 0;
-		address = (unsigned long)page_address(page);
-	} else if (cpa->flags & CPA_ARRAY)
-		address = cpa->vaddr[cpa->curpage];
-	else
-		address = *cpa->vaddr;
+	address = __cpa_addr(cpa, cpa->curpage);
 repeat:
 	kpte = _lookup_address_cpa(cpa, address, &level);
 	if (!kpte)
@@ -1557,16 +1566,7 @@ static int cpa_process_alias(struct cpa_
 	 * No need to redo, when the primary call touched the direct
 	 * mapping already:
 	 */
-	if (cpa->flags & CPA_PAGES_ARRAY) {
-		struct page *page = cpa->pages[cpa->curpage];
-		if (unlikely(PageHighMem(page)))
-			return 0;
-		vaddr = (unsigned long)page_address(page);
-	} else if (cpa->flags & CPA_ARRAY)
-		vaddr = cpa->vaddr[cpa->curpage];
-	else
-		vaddr = *cpa->vaddr;
-
+	vaddr = __cpa_addr(cpa, cpa->curpage);
 	if (!(within(vaddr, PAGE_OFFSET,
 		    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
 

[PATCH 2/4] x86/mm/cpa: Fix cpa_flush_array()

[Peter Zijlstra]

[-- Attachment #1: peterz-cpa-fix-flush_array.patch --]
[-- Type: text/plain, Size: 4328 bytes --]

In commit:

  a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")

I misread the cpa array code and incorrectly used
tlb_flush_kernel_range(), resulting in missing TLB flushes and
consequent failures.

Iterate the array and invalidate the individual pages instead.

Fixes: a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")
Reported-by: "StDenis, Tom" <Tom.StDenis@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/x86/mm/mm_internal.h |    2 +
 arch/x86/mm/pageattr.c    |   62 ++++++++++++++++++++++++++++------------------
 arch/x86/mm/tlb.c         |    4 ++
 3 files changed, 43 insertions(+), 25 deletions(-)

--- a/arch/x86/mm/mm_internal.h
+++ b/arch/x86/mm/mm_internal.h
@@ -19,4 +19,6 @@ extern int after_bootmem;
 
 void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache);
 
+extern unsigned long tlb_single_page_flush_ceiling;
+
 #endif	/* __X86_MM_INTERNAL_H */
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -26,6 +26,8 @@
 #include <asm/pat.h>
 #include <asm/set_memory.h>
 
+#include "mm_internal.h"
+
 /*
  * The current flushing context - we pass it instead of 5 arguments:
  */
@@ -302,20 +304,16 @@ static void cpa_flush_all(unsigned long
 	on_each_cpu(__cpa_flush_all, (void *) cache, 1);
 }
 
-static bool __cpa_flush_range(unsigned long start, int numpages, int cache)
+static bool cpa_check_flush_all(int cache)
 {
 	BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
 
-	WARN_ON(PAGE_ALIGN(start) != start);
-
 	if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {
 		cpa_flush_all(cache);
 		return true;
 	}
 
-	flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);
-
-	return !cache;
+	return false;
 }
 
 static void cpa_flush_range(unsigned long start, int numpages, int cache)
@@ -323,7 +321,14 @@ static void cpa_flush_range(unsigned lon
 	unsigned int i, level;
 	unsigned long addr;
 
-	if (__cpa_flush_range(start, numpages, cache))
+	WARN_ON(PAGE_ALIGN(start) != start);
+
+	if (cpa_check_flush_all(cache))
+		return;
+
+	flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);
+
+	if (!cache)
 		return;
 
 	/*
@@ -343,13 +348,28 @@ static void cpa_flush_range(unsigned lon
 	}
 }
 
-static void cpa_flush_array(unsigned long baddr, unsigned long *start,
-			    int numpages, int cache,
-			    int in_flags, struct page **pages)
+void __cpa_flush_array(void *data)
 {
-	unsigned int i, level;
+	struct cpa_data *cpa = data;
+	unsigned int i;
 
-	if (__cpa_flush_range(baddr, numpages, cache))
+	for (i = 0; i < cpa->numpages; i++)
+		__flush_tlb_one_kernel(__cpa_addr(cpa, i));
+}
+
+static void cpa_flush_array(struct cpa_data *cpa, int cache)
+{
+	unsigned int i;
+
+	if (cpa_check_flush_all(cache))
+		return;
+
+	if (cpa->numpages <= tlb_single_page_flush_ceiling)
+		on_each_cpu(__cpa_flush_array, cpa, 1);
+	else
+		flush_tlb_all();
+
+	if (!cache)
 		return;
 
 	/*
@@ -358,15 +378,11 @@ static void cpa_flush_array(unsigned lon
 	 * will cause all other CPUs to flush the same
 	 * cachelines:
 	 */
-	for (i = 0; i < numpages; i++) {
-		unsigned long addr;
+	for (i = 0; i < cpa->numpages; i++) {
+		unsigned long addr = __cpa_addr(cpa, i);
+		unsigned int level;
 		pte_t *pte;
 
-		if (in_flags & CPA_PAGES_ARRAY)
-			addr = (unsigned long)page_address(pages[i]);
-		else
-			addr = start[i];
-
 		pte = lookup_address(addr, &level);
 
 		/*
@@ -1765,12 +1781,10 @@ static int change_page_attr_set_clr(unsi
 		goto out;
 	}
 
-	if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
-		cpa_flush_array(baddr, addr, numpages, cache,
-				cpa.flags, pages);
-	} else {
+	if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
+		cpa_flush_array(&cpa, cache);
+	else
 		cpa_flush_range(baddr, numpages, cache);
-	}
 
 out:
 	return ret;
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -16,6 +16,8 @@
 #include <asm/apic.h>
 #include <asm/uv/uv.h>
 
+#include "mm_internal.h"
+
 /*
  *	TLB flushing, formerly SMP-only
  *		c/o Linus Torvalds.
@@ -664,7 +666,7 @@ void native_flush_tlb_others(const struc
  *
  * This is in units of pages.
  */
-static unsigned long tlb_single_page_flush_ceiling __read_mostly = 33;
+unsigned long tlb_single_page_flush_ceiling __read_mostly = 33;
 
 void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
 				unsigned long end, unsigned int stride_shift,

[PATCH 3/4] x86/mm/cpa: Fold cpa_flush_range() and cpa_flush_array()

[Peter Zijlstra]

[-- Attachment #1: peterz-cpa-fold-cpa_flush.patch --]
[-- Type: text/plain, Size: 4783 bytes --]

Note that the cache flush loop in cpa_flush_*() is identical when we
use __cpa_addr(); this then means the two functions are virtually
identical except for the TLB flushing.

Fold these two functions into a single cpa_flush() call.

One pesky detail is that __change_page_attr_set_clr() modifies @cpa,
so we have to save and restore part of that to ensure we flush the
original range.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/x86/mm/pageattr.c |   96 ++++++++++++++-----------------------------------
 1 file changed, 29 insertions(+), 67 deletions(-)

--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -244,7 +244,7 @@ static unsigned long __cpa_addr(struct c
 	if (cpa->flags & CPA_ARRAY)
 		return cpa->vaddr[idx];
 
-	return *cpa->vaddr;
+	return *cpa->vaddr + idx * PAGE_SIZE;
 }
 
 /*
@@ -304,50 +304,6 @@ static void cpa_flush_all(unsigned long
 	on_each_cpu(__cpa_flush_all, (void *) cache, 1);
 }
 
-static bool cpa_check_flush_all(int cache)
-{
-	BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
-
-	if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {
-		cpa_flush_all(cache);
-		return true;
-	}
-
-	return false;
-}
-
-static void cpa_flush_range(unsigned long start, int numpages, int cache)
-{
-	unsigned int i, level;
-	unsigned long addr;
-
-	WARN_ON(PAGE_ALIGN(start) != start);
-
-	if (cpa_check_flush_all(cache))
-		return;
-
-	flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);
-
-	if (!cache)
-		return;
-
-	/*
-	 * We only need to flush on one CPU,
-	 * clflush is a MESI-coherent instruction that
-	 * will cause all other CPUs to flush the same
-	 * cachelines:
-	 */
-	for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
-		pte_t *pte = lookup_address(addr, &level);
-
-		/*
-		 * Only flush present addresses:
-		 */
-		if (pte && (pte_val(*pte) & _PAGE_PRESENT))
-			clflush_cache_range((void *) addr, PAGE_SIZE);
-	}
-}
-
 void __cpa_flush_array(void *data)
 {
 	struct cpa_data *cpa = data;
@@ -357,33 +313,37 @@ void __cpa_flush_array(void *data)
 		__flush_tlb_one_kernel(__cpa_addr(cpa, i));
 }
 
-static void cpa_flush_array(struct cpa_data *cpa, int cache)
+static void cpa_flush(struct cpa_data *data, int cache)
 {
+	struct cpa_data *cpa = data;
 	unsigned int i;
 
-	if (cpa_check_flush_all(cache))
+	BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
+
+	if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {
+		cpa_flush_all(cache);
 		return;
+	}
 
-	if (cpa->numpages <= tlb_single_page_flush_ceiling)
-		on_each_cpu(__cpa_flush_array, cpa, 1);
-	else
-		flush_tlb_all();
+	if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
+		if (cpa->numpages <= tlb_single_page_flush_ceiling)
+			on_each_cpu(__cpa_flush_array, cpa, 1);
+		else
+			flush_tlb_all();
+	} else {
+		unsigned long start = __cpa_addr(cpa, 0);
+
+		flush_tlb_kernel_range(start, start + PAGE_SIZE * cpa->numpages);
+	}
 
 	if (!cache)
 		return;
 
-	/*
-	 * We only need to flush on one CPU,
-	 * clflush is a MESI-coherent instruction that
-	 * will cause all other CPUs to flush the same
-	 * cachelines:
-	 */
 	for (i = 0; i < cpa->numpages; i++) {
 		unsigned long addr = __cpa_addr(cpa, i);
 		unsigned int level;
-		pte_t *pte;
 
-		pte = lookup_address(addr, &level);
+		pte_t *pte = lookup_address(addr, &level);
 
 		/*
 		 * Only flush present addresses:
@@ -1695,7 +1655,7 @@ static int change_page_attr_set_clr(unsi
 {
 	struct cpa_data cpa;
 	int ret, cache, checkalias;
-	unsigned long baddr = 0;
+	unsigned long baddr = *addr;
 
 	memset(&cpa, 0, sizeof(cpa));
 
@@ -1781,11 +1741,11 @@ static int change_page_attr_set_clr(unsi
 		goto out;
 	}
 
-	if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
-		cpa_flush_array(&cpa, cache);
-	else
-		cpa_flush_range(baddr, numpages, cache);
+	/* Reset @cpa so that we flush the original range. */
+	cpa.vaddr = &baddr;
+	cpa.numpages = numpages;
 
+	cpa_flush(&cpa, cache);
 out:
 	return ret;
 }
@@ -2071,8 +2031,8 @@ int set_memory_global(unsigned long addr
 
 static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc)
 {
+	unsigned long start = addr;
 	struct cpa_data cpa;
-	unsigned long start;
 	int ret;
 
 	/* Nothing to do if memory encryption is not active */
@@ -2099,7 +2059,7 @@ static int __set_memory_enc_dec(unsigned
 	/*
 	 * Before changing the encryption attribute, we need to flush caches.
 	 */
-	cpa_flush_range(start, numpages, 1);
+	cpa_flush(&cpa, 1);
 
 	ret = __change_page_attr_set_clr(&cpa, 1);
 
@@ -2110,7 +2070,9 @@ static int __set_memory_enc_dec(unsigned
 	 * in case TLB flushing gets optimized in the cpa_flush_range()
 	 * path use the same logic as above.
 	 */
-	cpa_flush_range(start, numpages, 0);
+	cpa.vaddr = &start;
+	cpa.numpages = numpages;
+	cpa_flush(&cpa, 0);
 
 	return ret;
 }

[PATCH 4/4] x86/mm/cpa: Better use clflushopt

[Peter Zijlstra]

[-- Attachment #1: peterz-cpa-clflush_opt.patch --]
[-- Type: text/plain, Size: 2222 bytes --]

Currently we issue an MFENCE before and after flushing a range. This
means that if we flush a bunch of single page ranges -- like with the
cpa array, we issue a whole bunch of superfluous MFENCEs.

Reorgainze the code a little to avoid this.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/x86/mm/pageattr.c |   29 +++++++++++++++++------------
 1 file changed, 17 insertions(+), 12 deletions(-)

--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -251,15 +251,7 @@ static unsigned long __cpa_addr(struct c
  * Flushing functions
  */
 
-/**
- * clflush_cache_range - flush a cache range with clflush
- * @vaddr:	virtual start address
- * @size:	number of bytes to flush
- *
- * clflushopt is an unordered instruction which needs fencing with mfence or
- * sfence to avoid ordering issues.
- */
-void clflush_cache_range(void *vaddr, unsigned int size)
+static void clflush_cache_range_opt(void *vaddr, unsigned int size)
 {
 	const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
 	void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
@@ -268,11 +260,22 @@ void clflush_cache_range(void *vaddr, un
 	if (p >= vend)
 		return;
 
-	mb();
-
 	for (; p < vend; p += clflush_size)
 		clflushopt(p);
+}
 
+/**
+ * clflush_cache_range - flush a cache range with clflush
+ * @vaddr:	virtual start address
+ * @size:	number of bytes to flush
+ *
+ * clflushopt is an unordered instruction which needs fencing with mfence or
+ * sfence to avoid ordering issues.
+ */
+void clflush_cache_range(void *vaddr, unsigned int size)
+{
+	mb();
+	clflush_cache_range_opt(vaddr, size);
 	mb();
 }
 EXPORT_SYMBOL_GPL(clflush_cache_range);
@@ -339,6 +342,7 @@ static void cpa_flush(struct cpa_data *d
 	if (!cache)
 		return;
 
+	mb();
 	for (i = 0; i < cpa->numpages; i++) {
 		unsigned long addr = __cpa_addr(cpa, i);
 		unsigned int level;
@@ -349,8 +353,9 @@ static void cpa_flush(struct cpa_data *d
 		 * Only flush present addresses:
 		 */
 		if (pte && (pte_val(*pte) & _PAGE_PRESENT))
-			clflush_cache_range((void *)addr, PAGE_SIZE);
+			clflush_cache_range_opt((void *)addr, PAGE_SIZE);
 	}
+	mb();
 }
 
 static bool overlaps(unsigned long r1_start, unsigned long r1_end,

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[StDenis, Tom]

Hi Peter,

Unfortunately I can't apply this on top of our drm-next the first patch 
fails.

Alex: could we rebase again at some point?

Tom

On 2018-11-30 8:44 a.m., Peter Zijlstra wrote:
> Hi,
> 
> Yesterday Tom reported a CPA bug triggered by the AMDGPU team.
> 
> It turns out that with commit:
> 
>    a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")
> 
> I misread the cpa array code and messed up the TLB invalidations for it. These
> patches (hopefully) fix the issue while also shrinking the CPA code again.
> 
> Tom, would you be so kind as to test again? These patches are significantly
> different from what I send you yesterday.
> 
> ---
> arch/x86/mm/mm_internal.h |   2 +
> arch/x86/mm/pageattr.c    | 167 ++++++++++++++++++++--------------------------
> arch/x86/mm/tlb.c         |   4 +-
> 3 files changed, 79 insertions(+), 94 deletions(-)
> 

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[StDenis, Tom]

On 2018-11-30 10:07 a.m., Deucher, Alexander wrote:
> Sure, but it might be week or so.  For now can you test against Linus 
> master?  It should be close enough.

I need the bulk move from the our drm-next merge (which isn't yet 
upstream) to trigger the bug though.

I can try to cherry pick it on top of master.

Tom

> 
> 
> Alex
> 
> ------------------------------------------------------------------------
> *From:* StDenis, Tom
> *Sent:* Friday, November 30, 2018 9:52:26 AM
> *To:* Peter Zijlstra; dave.hansen@intel.com; luto@kernel.org
> *Cc:* x86@kernel.org; linux-kernel@vger.kernel.org; Deucher, Alexander
> *Subject:* Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation
> Hi Peter,
> 
> Unfortunately I can't apply this on top of our drm-next the first patch
> fails.
> 
> Alex: could we rebase again at some point?
> 
> Tom
> 
> On 2018-11-30 8:44 a.m., Peter Zijlstra wrote:
>> Hi,
>> 
>> Yesterday Tom reported a CPA bug triggered by the AMDGPU team.
>> 
>> It turns out that with commit:
>> 
>>    a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")
>> 
>> I misread the cpa array code and messed up the TLB invalidations for it. These
>> patches (hopefully) fix the issue while also shrinking the CPA code again.
>> 
>> Tom, would you be so kind as to test again? These patches are significantly
>> different from what I send you yesterday.
>> 
>> ---
>> arch/x86/mm/mm_internal.h |   2 +
>> arch/x86/mm/pageattr.c    | 167 ++++++++++++++++++++--------------------------
>> arch/x86/mm/tlb.c         |   4 +-
>> 3 files changed, 79 insertions(+), 94 deletions(-)
>> 
> 

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[Peter Zijlstra]

On Fri, Nov 30, 2018 at 02:52:26PM +0000, StDenis, Tom wrote:
> Hi Peter,
> 
> Unfortunately I can't apply this on top of our drm-next the first patch 
> fails.

Against what tree would you like the patches? rebasing should not be
hard I think.

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[StDenis, Tom]

On 2018-11-30 10:09 a.m., Peter Zijlstra wrote:
> On Fri, Nov 30, 2018 at 02:52:26PM +0000, StDenis, Tom wrote:
>> Hi Peter,
>>
>> Unfortunately I can't apply this on top of our drm-next the first patch
>> fails.
> 
> Against what tree would you like the patches? rebasing should not be
> hard I think.
> 

Actually never mind the AMDGPU patches I need are actually upstream I 
was mistaken :-)

I'll try it out shortly.

Tom

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[StDenis, Tom]

On 2018-11-30 10:09 a.m., Peter Zijlstra wrote:
> On Fri, Nov 30, 2018 at 02:52:26PM +0000, StDenis, Tom wrote:
>> Hi Peter,
>>
>> Unfortunately I can't apply this on top of our drm-next the first patch
>> fails.
> 
> Against what tree would you like the patches? rebasing should not be
> hard I think.
> 

Actually I just tried applying against the tip of master and got the 
same errors...

[root@carrizo linux]# git apply \[PATCH\ 1_4\]\ x86_mm_cpa\:\ Add\ 
__cpa_addr\(\)\ helper\ -\ Peter\ Zijlstra\ \<peterz@infradead.org\>\ -\ 
2018-11-30\ 0844.eml
error: patch failed: arch/x86/mm/pageattr.c:228
error: arch/x86/mm/pageattr.c: patch does not apply


Any ideas?

Tom

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[Peter Zijlstra]

On Fri, Nov 30, 2018 at 03:14:30PM +0000, StDenis, Tom wrote:
> On 2018-11-30 10:09 a.m., Peter Zijlstra wrote:
> > On Fri, Nov 30, 2018 at 02:52:26PM +0000, StDenis, Tom wrote:
> >> Hi Peter,
> >>
> >> Unfortunately I can't apply this on top of our drm-next the first patch
> >> fails.
> > 
> > Against what tree would you like the patches? rebasing should not be
> > hard I think.
> > 
> 
> Actually I just tried applying against the tip of master and got the 
> same errors...
> 
> [root@carrizo linux]# git apply \[PATCH\ 1_4\]\ x86_mm_cpa\:\ Add\ 
> __cpa_addr\(\)\ helper\ -\ Peter\ Zijlstra\ \<peterz@infradead.org\>\ -\ 
> 2018-11-30\ 0844.eml
> error: patch failed: arch/x86/mm/pageattr.c:228
> error: arch/x86/mm/pageattr.c: patch does not apply
> 
> 
> Any ideas?

Hurm.. no. They apply cleanly to Linus' tree here.

linux-2.6$ git describe
v4.20-rc4-156-g94f371cb7394
linux-2.6$ quilt push 4
Applying patch patches/peterz-cpa-addr.patch
patching file arch/x86/mm/pageattr.c
Applying patch patches/peterz-cpa-fix-flush_array.patch
patching file arch/x86/mm/mm_internal.h
patching file arch/x86/mm/pageattr.c
patching file arch/x86/mm/tlb.c
Applying patch patches/peterz-cpa-fold-cpa_flush.patch
patching file arch/x86/mm/pageattr.c
Applying patch patches/peterz-cpa-clflush_opt.patch
patching file arch/x86/mm/pageattr.c
Now at patch patches/peterz-cpa-clflush_opt.patch

Weird.

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[StDenis, Tom]

On 2018-11-30 10:23 a.m., Peter Zijlstra wrote:
> On Fri, Nov 30, 2018 at 03:14:30PM +0000, StDenis, Tom wrote:
>> On 2018-11-30 10:09 a.m., Peter Zijlstra wrote:
>>> On Fri, Nov 30, 2018 at 02:52:26PM +0000, StDenis, Tom wrote:
>>>> Hi Peter,
>>>>
>>>> Unfortunately I can't apply this on top of our drm-next the first patch
>>>> fails.
>>>
>>> Against what tree would you like the patches? rebasing should not be
>>> hard I think.
>>>
>>
>> Actually I just tried applying against the tip of master and got the
>> same errors...
>>
>> [root@carrizo linux]# git apply \[PATCH\ 1_4\]\ x86_mm_cpa\:\ Add\
>> __cpa_addr\(\)\ helper\ -\ Peter\ Zijlstra\ \<peterz@infradead.org\>\ -\
>> 2018-11-30\ 0844.eml
>> error: patch failed: arch/x86/mm/pageattr.c:228
>> error: arch/x86/mm/pageattr.c: patch does not apply
>>
>>
>> Any ideas?
> 
> Hurm.. no. They apply cleanly to Linus' tree here.
> 
> linux-2.6$ git describe
> v4.20-rc4-156-g94f371cb7394
> linux-2.6$ quilt push 4
> Applying patch patches/peterz-cpa-addr.patch
> patching file arch/x86/mm/pageattr.c
> Applying patch patches/peterz-cpa-fix-flush_array.patch
> patching file arch/x86/mm/mm_internal.h
> patching file arch/x86/mm/pageattr.c
> patching file arch/x86/mm/tlb.c
> Applying patch patches/peterz-cpa-fold-cpa_flush.patch
> patching file arch/x86/mm/pageattr.c
> Applying patch patches/peterz-cpa-clflush_opt.patch
> patching file arch/x86/mm/pageattr.c
> Now at patch patches/peterz-cpa-clflush_opt.patch
> 
> Weird.
> 

I can apply the patch you attached but the inline patches just don't 
apply.  Could be my imap client (thunderbird) mangled them but I've 
applied patches this way before.  could you attach them instead please?

Tom

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[Peter Zijlstra]

On Fri, Nov 30, 2018 at 04:23:47PM +0100, Peter Zijlstra wrote:

> Hurm.. no. They apply cleanly to Linus' tree here.
> 
> linux-2.6$ git describe
> v4.20-rc4-156-g94f371cb7394
> linux-2.6$ quilt push 4
> Applying patch patches/peterz-cpa-addr.patch
> patching file arch/x86/mm/pageattr.c
> Applying patch patches/peterz-cpa-fix-flush_array.patch
> patching file arch/x86/mm/mm_internal.h
> patching file arch/x86/mm/pageattr.c
> patching file arch/x86/mm/tlb.c
> Applying patch patches/peterz-cpa-fold-cpa_flush.patch
> patching file arch/x86/mm/pageattr.c
> Applying patch patches/peterz-cpa-clflush_opt.patch
> patching file arch/x86/mm/pageattr.c
> Now at patch patches/peterz-cpa-clflush_opt.patch
> 
> Weird.

I pushed them out to:

  git://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git x86/mm

I hope that works; I'm out for a few hours, but should check on email
again tonight.

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[StDenis, Tom]

[-- Attachment #1: Type: text/plain, Size: 1303 bytes --]

On 2018-11-30 10:31 a.m., Peter Zijlstra wrote:
> On Fri, Nov 30, 2018 at 04:23:47PM +0100, Peter Zijlstra wrote:
> 
>> Hurm.. no. They apply cleanly to Linus' tree here.
>>
>> linux-2.6$ git describe
>> v4.20-rc4-156-g94f371cb7394
>> linux-2.6$ quilt push 4
>> Applying patch patches/peterz-cpa-addr.patch
>> patching file arch/x86/mm/pageattr.c
>> Applying patch patches/peterz-cpa-fix-flush_array.patch
>> patching file arch/x86/mm/mm_internal.h
>> patching file arch/x86/mm/pageattr.c
>> patching file arch/x86/mm/tlb.c
>> Applying patch patches/peterz-cpa-fold-cpa_flush.patch
>> patching file arch/x86/mm/pageattr.c
>> Applying patch patches/peterz-cpa-clflush_opt.patch
>> patching file arch/x86/mm/pageattr.c
>> Now at patch patches/peterz-cpa-clflush_opt.patch
>>
>> Weird.
> 
> I pushed them out to:
> 
>    git://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git x86/mm
> 
> I hope that works; I'm out for a few hours, but should check on email
> again tonight.
> 

NAK I get a failure in TTM on init with your x86/mm branch (see attached 
dmesg).

This builds an RC2 kernel btw whereas we were building an RC3 kernel 
which is about 974 commits behind the tip of our drm-next and about 850 
commits behind the last drm-next merge from Dave.

Tom

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: carrizo_dmesg.log --]
[-- Type: text/x-log; name="carrizo_dmesg.log", Size: 68155 bytes --]

[    0.000000] Linux version 4.20.0-rc2+ (root@carrizo) (gcc version 8.2.1 20181105 (Red Hat 8.2.1-5) (GCC)) #1 SMP Fri Nov 30 10:44:38 EST 2018
[    0.000000] Command line: BOOT_IMAGE=/vmlinuz-4.20.0-rc2+ root=UUID=d7f3aad3-6017-4563-9cec-9b3c99467214 ro rhgb quiet LANG=en_CA.UTF-8 rdblacklist=amdgpu,radeon
[    0.000000] [Firmware Info]: CPU: Re-enabling disabled Topology Extensions Support.
[    0.000000] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers'
[    0.000000] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers'
[    0.000000] x86/fpu: Supporting XSAVE feature 0x004: 'AVX registers'
[    0.000000] x86/fpu: xstate_offset[2]:  576, xstate_sizes[2]:  256
[    0.000000] x86/fpu: Enabled xstate features 0x7, context size is 832 bytes, using 'standard' format.
[    0.000000] BIOS-provided physical RAM map:
[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009ffff] usable
[    0.000000] BIOS-e820: [mem 0x00000000000a0000-0x00000000000fffff] reserved
[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000d46cefff] usable
[    0.000000] BIOS-e820: [mem 0x00000000d46cf000-0x00000000d46e8fff] ACPI data
[    0.000000] BIOS-e820: [mem 0x00000000d46e9000-0x00000000da5c0fff] usable
[    0.000000] BIOS-e820: [mem 0x00000000da5c1000-0x00000000da6fcfff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000da6fd000-0x00000000da712fff] ACPI data
[    0.000000] BIOS-e820: [mem 0x00000000da713000-0x00000000da80bfff] usable
[    0.000000] BIOS-e820: [mem 0x00000000da80c000-0x00000000dabbdfff] ACPI NVS
[    0.000000] BIOS-e820: [mem 0x00000000dabbe000-0x00000000db53ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000db540000-0x00000000ddffffff] usable
[    0.000000] BIOS-e820: [mem 0x00000000de000000-0x00000000dfffffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fe500000-0x00000000fe5fffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fea00000-0x00000000fea0ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000feb80000-0x00000000fec01fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fec10000-0x00000000fec10fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fec30000-0x00000000fec30fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed00fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed40000-0x00000000fed44fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fed80000-0x00000000fed8ffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fedc0000-0x00000000fedc0fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fedc2000-0x00000000fedc8fff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000feefffff] reserved
[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x00000001feffffff] usable
[    0.000000] BIOS-e820: [mem 0x00000001ff000000-0x000000021effffff] reserved
[    0.000000] NX (Execute Disable) protection: active
[    0.000000] e820: update [mem 0x9f205018-0x9f214e57] usable ==> usable
[    0.000000] e820: update [mem 0x9f205018-0x9f214e57] usable ==> usable
[    0.000000] e820: update [mem 0x9f1f6018-0x9f204057] usable ==> usable
[    0.000000] e820: update [mem 0x9f1f6018-0x9f204057] usable ==> usable
[    0.000000] extended physical RAM map:
[    0.000000] reserve setup_data: [mem 0x0000000000000000-0x000000000009ffff] usable
[    0.000000] reserve setup_data: [mem 0x00000000000a0000-0x00000000000fffff] reserved
[    0.000000] reserve setup_data: [mem 0x0000000000100000-0x000000009f1f6017] usable
[    0.000000] reserve setup_data: [mem 0x000000009f1f6018-0x000000009f204057] usable
[    0.000000] reserve setup_data: [mem 0x000000009f204058-0x000000009f205017] usable
[    0.000000] reserve setup_data: [mem 0x000000009f205018-0x000000009f214e57] usable
[    0.000000] reserve setup_data: [mem 0x000000009f214e58-0x00000000d46cefff] usable
[    0.000000] reserve setup_data: [mem 0x00000000d46cf000-0x00000000d46e8fff] ACPI data
[    0.000000] reserve setup_data: [mem 0x00000000d46e9000-0x00000000da5c0fff] usable
[    0.000000] reserve setup_data: [mem 0x00000000da5c1000-0x00000000da6fcfff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000da6fd000-0x00000000da712fff] ACPI data
[    0.000000] reserve setup_data: [mem 0x00000000da713000-0x00000000da80bfff] usable
[    0.000000] reserve setup_data: [mem 0x00000000da80c000-0x00000000dabbdfff] ACPI NVS
[    0.000000] reserve setup_data: [mem 0x00000000dabbe000-0x00000000db53ffff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000db540000-0x00000000ddffffff] usable
[    0.000000] reserve setup_data: [mem 0x00000000de000000-0x00000000dfffffff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000f8000000-0x00000000fbffffff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000fe500000-0x00000000fe5fffff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000fea00000-0x00000000fea0ffff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000feb80000-0x00000000fec01fff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000fec10000-0x00000000fec10fff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000fec30000-0x00000000fec30fff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000fed00000-0x00000000fed00fff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000fed40000-0x00000000fed44fff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000fed80000-0x00000000fed8ffff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000fedc0000-0x00000000fedc0fff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000fedc2000-0x00000000fedc8fff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000fee00000-0x00000000feefffff] reserved
[    0.000000] reserve setup_data: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
[    0.000000] reserve setup_data: [mem 0x0000000100000000-0x00000001feffffff] usable
[    0.000000] reserve setup_data: [mem 0x00000001ff000000-0x000000021effffff] reserved
[    0.000000] efi: EFI v2.60 by American Megatrends
[    0.000000] efi:  ACPI 2.0=0xd46cf000  ACPI=0xd46cf000  SMBIOS=0xdb40b000  SMBIOS 3.0=0xdb40a000  ESRT=0xd8006b98  MEMATTR=0xd7fc0698 
[    0.000000] SMBIOS 3.1.1 present.
[    0.000000] DMI: System manufacturer System Product Name/TUF B350M-PLUS GAMING, BIOS 4011 04/19/2018
[    0.000000] tsc: Fast TSC calibration using PIT
[    0.000000] tsc: Detected 3793.267 MHz processor
[    0.001459] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
[    0.001460] e820: remove [mem 0x000a0000-0x000fffff] usable
[    0.001467] last_pfn = 0x1ff000 max_arch_pfn = 0x400000000
[    0.001470] MTRR default type: uncachable
[    0.001471] MTRR fixed ranges enabled:
[    0.001472]   00000-9FFFF write-back
[    0.001472]   A0000-BFFFF write-through
[    0.001473]   C0000-FFFFF write-protect
[    0.001473] MTRR variable ranges enabled:
[    0.001474]   0 base 000000000000 mask FFFF80000000 write-back
[    0.001475]   1 base 000080000000 mask FFFFC0000000 write-back
[    0.001475]   2 base 0000C0000000 mask FFFFE0000000 write-back
[    0.001476]   3 disabled
[    0.001476]   4 disabled
[    0.001476]   5 disabled
[    0.001476]   6 disabled
[    0.001476]   7 disabled
[    0.001477] TOM2: 000000021f000000 aka 8688M
[    0.001679] x86/PAT: Configuration [0-7]: WB  WC  UC- UC  WB  WP  UC- WT  
[    0.001730] e820: update [mem 0xe0000000-0xffffffff] usable ==> reserved
[    0.001735] last_pfn = 0xde000 max_arch_pfn = 0x400000000
[    0.005323] esrt: Reserving ESRT space from 0x00000000d8006b98 to 0x00000000d8006bd0.
[    0.005336] check: Scanning 1 areas for low memory corruption
[    0.005338] Base memory trampoline at [(____ptrval____)] 96000 size 24576
[    0.005341] Using GB pages for direct mapping
[    0.005342] BRK [0x118601000, 0x118601fff] PGTABLE
[    0.005344] BRK [0x118602000, 0x118602fff] PGTABLE
[    0.005345] BRK [0x118603000, 0x118603fff] PGTABLE
[    0.005401] BRK [0x118604000, 0x118604fff] PGTABLE
[    0.005403] BRK [0x118605000, 0x118605fff] PGTABLE
[    0.005721] BRK [0x118606000, 0x118606fff] PGTABLE
[    0.005803] BRK [0x118607000, 0x118607fff] PGTABLE
[    0.006052] BRK [0x118608000, 0x118608fff] PGTABLE
[    0.006141] BRK [0x118609000, 0x118609fff] PGTABLE
[    0.006142] BRK [0x11860a000, 0x11860afff] PGTABLE
[    0.006270] BRK [0x11860b000, 0x11860bfff] PGTABLE
[    0.006480] Secure boot disabled
[    0.006481] RAMDISK: [mem 0x3c8d9000-0x3e2dbfff]
[    0.006487] ACPI: Early table checksum verification disabled
[    0.006490] ACPI: RSDP 0x00000000D46CF000 000024 (v02 ALASKA)
[    0.006493] ACPI: XSDT 0x00000000D46CF098 0000A4 (v01 ALASKA A M I    01072009 AMI  00010013)
[    0.006497] ACPI: FACP 0x00000000D46DB7C0 000114 (v06 ALASKA A M I    01072009 AMI  00010013)
[    0.006500] ACPI BIOS Warning (bug): Optional FADT field Pm2ControlBlock has valid Length but zero Address: 0x0000000000000000/0x1 (20181003/tbfadt-624)
[    0.006503] ACPI: DSDT 0x00000000D46CF1D0 00C5E9 (v02 ALASKA A M I    01072009 INTL 20120913)
[    0.006505] ACPI: FACS 0x00000000DABA9E00 000040
[    0.006507] ACPI: APIC 0x00000000D46DB8D8 0000DE (v03 ALASKA A M I    01072009 AMI  00010013)
[    0.006509] ACPI: FPDT 0x00000000D46DB9B8 000044 (v01 ALASKA A M I    01072009 AMI  00010013)
[    0.006511] ACPI: FIDT 0x00000000D46DBA00 00009C (v01 ALASKA A M I    01072009 AMI  00010013)
[    0.006513] ACPI: SSDT 0x00000000D46E6E88 001A41 (v01 AMD    AmdTable 00000001 INTL 20120913)
[    0.006514] ACPI: MCFG 0x00000000D46DBAF8 00003C (v01 ALASKA A M I    01072009 MSFT 00010013)
[    0.006516] ACPI: HPET 0x00000000D46DBB38 000038 (v01 ALASKA A M I    01072009 AMI  00000005)
[    0.006517] ACPI: UEFI 0x00000000D46DBB70 000042 (v01                 00000000      00000000)
[    0.006519] ACPI: SSDT 0x00000000D46DBBB8 00888F (v02 AMD    AGESA    00000002 MSFT 04000000)
[    0.006521] ACPI: BGRT 0x00000000D46E4448 000038 (v01 ALASKA A M I    01072009 AMI  00010013)
[    0.006522] ACPI: SSDT 0x00000000D46E4480 000D44 (v01 AMD    AMD CPU  00000001 AMD  00000001)
[    0.006524] ACPI: CRAT 0x00000000D46E51C8 0004D8 (v01 AMD    AMD CRAT 00000001 AMD  00000001)
[    0.006525] ACPI: CDIT 0x00000000D46E56A0 000029 (v01 AMD    AMD CDIT 00000001 AMD  00000001)
[    0.006527] ACPI: SSDT 0x00000000D46E56D0 0000F8 (v01 AMD    AMD PT   00001000 INTL 20120913)
[    0.006529] ACPI: SSDT 0x00000000D46E57C8 000E6E (v01 AMD    AmdTable 00000001 INTL 20120913)
[    0.006530] ACPI: SSDT 0x00000000D46E6638 00084C (v01 AMD    AmdTable 00000001 INTL 20120913)
[    0.006537] ACPI: Local APIC address 0xfee00000
[    0.006630] No NUMA configuration found
[    0.006631] Faking a node at [mem 0x0000000000000000-0x00000001feffffff]
[    0.006634] NODE_DATA(0) allocated [mem 0x1feffc000-0x1feffffff]
[    0.006650] Zone ranges:
[    0.006650]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
[    0.006651]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
[    0.006652]   Normal   [mem 0x0000000100000000-0x00000001feffffff]
[    0.006653] Movable zone start for each node
[    0.006653] Early memory node ranges
[    0.006654]   node   0: [mem 0x0000000000001000-0x000000000009ffff]
[    0.006654]   node   0: [mem 0x0000000000100000-0x00000000d46cefff]
[    0.006655]   node   0: [mem 0x00000000d46e9000-0x00000000da5c0fff]
[    0.006655]   node   0: [mem 0x00000000da713000-0x00000000da80bfff]
[    0.006655]   node   0: [mem 0x00000000db540000-0x00000000ddffffff]
[    0.006656]   node   0: [mem 0x0000000100000000-0x00000001feffffff]
[    0.006789] Zeroed struct page in unavailable ranges: 12033 pages
[    0.006790] Initmem setup node 0 [mem 0x0000000000001000-0x00000001feffffff]
[    0.006791] On node 0 totalpages: 1949951
[    0.006792]   DMA zone: 64 pages used for memmap
[    0.006792]   DMA zone: 27 pages reserved
[    0.006793]   DMA zone: 3999 pages, LIFO batch:0
[    0.006861]   DMA32 zone: 14086 pages used for memmap
[    0.006861]   DMA32 zone: 901472 pages, LIFO batch:63
[    0.022259]   Normal zone: 16320 pages used for memmap
[    0.022260]   Normal zone: 1044480 pages, LIFO batch:63
[    0.039355] ACPI: PM-Timer IO Port: 0x808
[    0.039356] ACPI: Local APIC address 0xfee00000
[    0.039361] ACPI: LAPIC_NMI (acpi_id[0xff] high edge lint[0x1])
[    0.039368] IOAPIC[0]: apic_id 0, version 33, address 0xfec00000, GSI 0-23
[    0.039371] IOAPIC[1]: apic_id 1, version 33, address 0xfec01000, GSI 24-55
[    0.039372] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
[    0.039374] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
[    0.039374] ACPI: IRQ0 used by override.
[    0.039375] ACPI: IRQ9 used by override.
[    0.039376] Using ACPI (MADT) for SMP configuration information
[    0.039377] ACPI: HPET id: 0x10228201 base: 0xfed00000
[    0.039380] smpboot: Allowing 16 CPUs, 12 hotplug CPUs
[    0.039401] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
[    0.039403] PM: Registered nosave memory: [mem 0x000a0000-0x000fffff]
[    0.039404] PM: Registered nosave memory: [mem 0x9f1f6000-0x9f1f6fff]
[    0.039405] PM: Registered nosave memory: [mem 0x9f204000-0x9f204fff]
[    0.039405] PM: Registered nosave memory: [mem 0x9f205000-0x9f205fff]
[    0.039406] PM: Registered nosave memory: [mem 0x9f214000-0x9f214fff]
[    0.039407] PM: Registered nosave memory: [mem 0xd46cf000-0xd46e8fff]
[    0.039408] PM: Registered nosave memory: [mem 0xda5c1000-0xda6fcfff]
[    0.039409] PM: Registered nosave memory: [mem 0xda6fd000-0xda712fff]
[    0.039410] PM: Registered nosave memory: [mem 0xda80c000-0xdabbdfff]
[    0.039410] PM: Registered nosave memory: [mem 0xdabbe000-0xdb53ffff]
[    0.039411] PM: Registered nosave memory: [mem 0xde000000-0xdfffffff]
[    0.039412] PM: Registered nosave memory: [mem 0xe0000000-0xf7ffffff]
[    0.039412] PM: Registered nosave memory: [mem 0xf8000000-0xfbffffff]
[    0.039413] PM: Registered nosave memory: [mem 0xfc000000-0xfe4fffff]
[    0.039413] PM: Registered nosave memory: [mem 0xfe500000-0xfe5fffff]
[    0.039413] PM: Registered nosave memory: [mem 0xfe600000-0xfe9fffff]
[    0.039414] PM: Registered nosave memory: [mem 0xfea00000-0xfea0ffff]
[    0.039414] PM: Registered nosave memory: [mem 0xfea10000-0xfeb7ffff]
[    0.039414] PM: Registered nosave memory: [mem 0xfeb80000-0xfec01fff]
[    0.039415] PM: Registered nosave memory: [mem 0xfec02000-0xfec0ffff]
[    0.039415] PM: Registered nosave memory: [mem 0xfec10000-0xfec10fff]
[    0.039415] PM: Registered nosave memory: [mem 0xfec11000-0xfec2ffff]
[    0.039416] PM: Registered nosave memory: [mem 0xfec30000-0xfec30fff]
[    0.039416] PM: Registered nosave memory: [mem 0xfec31000-0xfecfffff]
[    0.039416] PM: Registered nosave memory: [mem 0xfed00000-0xfed00fff]
[    0.039417] PM: Registered nosave memory: [mem 0xfed01000-0xfed3ffff]
[    0.039417] PM: Registered nosave memory: [mem 0xfed40000-0xfed44fff]
[    0.039417] PM: Registered nosave memory: [mem 0xfed45000-0xfed7ffff]
[    0.039418] PM: Registered nosave memory: [mem 0xfed80000-0xfed8ffff]
[    0.039418] PM: Registered nosave memory: [mem 0xfed90000-0xfedbffff]
[    0.039418] PM: Registered nosave memory: [mem 0xfedc0000-0xfedc0fff]
[    0.039419] PM: Registered nosave memory: [mem 0xfedc1000-0xfedc1fff]
[    0.039419] PM: Registered nosave memory: [mem 0xfedc2000-0xfedc8fff]
[    0.039419] PM: Registered nosave memory: [mem 0xfedc9000-0xfedfffff]
[    0.039420] PM: Registered nosave memory: [mem 0xfee00000-0xfeefffff]
[    0.039420] PM: Registered nosave memory: [mem 0xfef00000-0xfeffffff]
[    0.039420] PM: Registered nosave memory: [mem 0xff000000-0xffffffff]
[    0.039422] [mem 0xe0000000-0xf7ffffff] available for PCI devices
[    0.039425] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1910969940391419 ns
[    0.142585] random: get_random_bytes called from start_kernel+0x8a/0x485 with crng_init=0
[    0.142594] setup_percpu: NR_CPUS:64 nr_cpumask_bits:64 nr_cpu_ids:16 nr_node_ids:1
[    0.143633] percpu: Embedded 43 pages/cpu @(____ptrval____) s138328 r8192 d29608 u262144
[    0.143639] pcpu-alloc: s138328 r8192 d29608 u262144 alloc=1*2097152
[    0.143640] pcpu-alloc: [0] 00 01 02 03 04 05 06 07 [0] 08 09 10 11 12 13 14 15 
[    0.143663] Built 1 zonelists, mobility grouping on.  Total pages: 1919454
[    0.143664] Policy zone: Normal
[    0.143666] Kernel command line: BOOT_IMAGE=/vmlinuz-4.20.0-rc2+ root=UUID=d7f3aad3-6017-4563-9cec-9b3c99467214 ro rhgb quiet LANG=en_CA.UTF-8 rdblacklist=amdgpu,radeon
[    0.155073] Calgary: detecting Calgary via BIOS EBDA area
[    0.155074] Calgary: Unable to locate Rio Grande table in EBDA - bailing!
[    0.178582] Memory: 7474924K/7799804K available (12293K kernel code, 1251K rwdata, 2836K rodata, 1232K init, 1848K bss, 324880K reserved, 0K cma-reserved)
[    0.178670] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=16, Nodes=1
[    0.178781] rcu: Hierarchical RCU implementation.
[    0.178781] rcu: 	RCU event tracing is enabled.
[    0.178782] rcu: 	RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=16.
[    0.178783] rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies.
[    0.178784] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=16
[    0.178929] NR_IRQS: 4352, nr_irqs: 1096, preallocated irqs: 16
[    0.179153] Console: colour dummy device 80x25
[    0.179158] printk: console [tty0] enabled
[    0.179171] ACPI: Core revision 20181003
[    0.179338] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 133484873504 ns
[    0.179348] hpet clockevent registered
[    0.179352] APIC: Switch to symmetric I/O mode setup
[    0.179353] Switched APIC routing to physical flat.
[    0.179728] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
[    0.184352] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x6d5afe26892, max_idle_ns: 881590541453 ns
[    0.184363] Calibrating delay loop (skipped), value calculated using timer frequency.. 7586.53 BogoMIPS (lpj=3793267)
[    0.184364] pid_max: default: 32768 minimum: 301
[    0.184983] LSM: Security Framework initializing
[    0.184985] SELinux:  Initializing.
[    0.186516] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
[    0.187265] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
[    0.187301] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes)
[    0.187325] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes)
[    0.187491] mce: CPU supports 7 MCE banks
[    0.187499] LVT offset 1 assigned for vector 0xf9
[    0.187505] Last level iTLB entries: 4KB 512, 2MB 1024, 4MB 512
[    0.187506] Last level dTLB entries: 4KB 1024, 2MB 1024, 4MB 512, 1GB 0
[    0.187507] Spectre V2 : Mitigation: Full AMD retpoline
[    0.187508] Spectre V2 : Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch
[    0.187509] Speculative Store Bypass: Mitigation: Speculative Store Bypass disabled via prctl and seccomp
[    0.187681] Freeing SMP alternatives memory: 40K
[    0.191354] smpboot: CPU0: AMD A12-9800 RADEON R7, 12 COMPUTE CORES 4C+8G (family: 0x15, model: 0x65, stepping: 0x1)
[    0.191354] Performance Events: Fam15h core perfctr, AMD PMU driver.
[    0.191354] ... version:                0
[    0.191354] ... bit width:              48
[    0.191354] ... generic registers:      6
[    0.191354] ... value mask:             0000ffffffffffff
[    0.191354] ... max period:             00007fffffffffff
[    0.191354] ... fixed-purpose events:   0
[    0.191354] ... event mask:             000000000000003f
[    0.191354] rcu: Hierarchical SRCU implementation.
[    0.191354] MCE: In-kernel MCE decoding enabled.
[    0.191354] smp: Bringing up secondary CPUs ...
[    0.191354] x86: Booting SMP configuration:
[    0.191354] .... node  #0, CPUs:        #1  #2  #3
[    0.194392] smp: Brought up 1 node, 4 CPUs
[    0.194392] smpboot: Max logical packages: 4
[    0.194392] smpboot: Total of 4 processors activated (30346.13 BogoMIPS)
[    0.196361] devtmpfs: initialized
[    0.196554] PM: Registering ACPI NVS region [mem 0xda80c000-0xdabbdfff] (3874816 bytes)
[    0.197362] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
[    0.197372] futex hash table entries: 4096 (order: 6, 262144 bytes)
[    0.197433] kworker/u32:0 (31) used greatest stack depth: 14232 bytes left
[    0.197433] RTC time: 15:53:39, date: 11/30/18
[    0.197433] NET: Registered protocol family 16
[    0.197433] audit: initializing netlink subsys (disabled)
[    0.198484] audit: type=2000 audit(1543593219.019:1): state=initialized audit_enabled=0 res=1
[    0.198690] cpuidle: using governor menu
[    0.198690] ACPI: bus type PCI registered
[    0.198690] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000)
[    0.198690] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in E820
[    0.198690] PCI: Using configuration type 1 for base access
[    0.203038] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[    0.203523] ACPI: Added _OSI(Module Device)
[    0.203523] ACPI: Added _OSI(Processor Device)
[    0.203523] ACPI: Added _OSI(3.0 _SCP Extensions)
[    0.203523] ACPI: Added _OSI(Processor Aggregator Device)
[    0.203523] ACPI: Added _OSI(Linux-Dell-Video)
[    0.203523] ACPI: Added _OSI(Linux-Lenovo-NV-HDMI-Audio)
[    0.212487] ACPI: 7 ACPI AML tables successfully acquired and loaded
[    0.217620] ACPI: Interpreter enabled
[    0.217671] ACPI: (supports S0 S3 S4 S5)
[    0.217672] ACPI: Using IOAPIC for interrupt routing
[    0.217822] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
[    0.218002] ACPI: Enabled 3 GPEs in block 00 to 1F
[    0.220520] ACPI: Power Resource [P0SD] (off)
[    0.220547] ACPI: Power Resource [P3SD] (off)
[    0.220627] ACPI: Power Resource [P0U2] (off)
[    0.220659] ACPI: Power Resource [P3U2] (off)
[    0.220794] ACPI: Power Resource [P0U3] (off)
[    0.220818] ACPI: Power Resource [P3U3] (off)
[    0.221234] ACPI: Power Resource [P0ST] (on)
[    0.221258] ACPI: Power Resource [P3ST] (on)
[    0.225274] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
[    0.225279] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
[    0.225381] acpi PNP0A08:00: _OSC: platform does not support [PME LTR]
[    0.225517] acpi PNP0A08:00: _OSC: OS now controls [AER PCIeCapability]
[    0.225527] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f] only partially covers this bridge
[    0.225656] PCI host bridge to bus 0000:00
[    0.225657] pci_bus 0000:00: root bus resource [io  0x0000-0x03af window]
[    0.225659] pci_bus 0000:00: root bus resource [io  0x03e0-0x0cf7 window]
[    0.225660] pci_bus 0000:00: root bus resource [io  0x03b0-0x03df window]
[    0.225661] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
[    0.225662] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
[    0.225664] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000dffff window]
[    0.225665] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xfec2ffff window]
[    0.225666] pci_bus 0000:00: root bus resource [mem 0xfee00000-0xffffffff window]
[    0.225668] pci_bus 0000:00: root bus resource [bus 00-ff]
[    0.225676] pci 0000:00:00.0: [1022:1576] type 00 class 0x060000
[    0.225852] pci 0000:00:01.0: [1002:9874] type 00 class 0x030000
[    0.225868] pci 0000:00:01.0: reg 0x10: [mem 0xe0000000-0xefffffff 64bit pref]
[    0.225883] pci 0000:00:01.0: reg 0x18: [mem 0xf0000000-0xf07fffff 64bit pref]
[    0.225888] pci 0000:00:01.0: reg 0x20: [io  0xf000-0xf0ff]
[    0.225893] pci 0000:00:01.0: reg 0x24: [mem 0xfe900000-0xfe93ffff]
[    0.225897] pci 0000:00:01.0: reg 0x30: [mem 0xfe940000-0xfe95ffff pref]
[    0.225901] pci 0000:00:01.0: enabling Extended Tags
[    0.225921] pci 0000:00:01.0: BAR 0: assigned to efifb
[    0.225948] pci 0000:00:01.0: supports D1 D2
[    0.225949] pci 0000:00:01.0: PME# supported from D1 D2 D3hot
[    0.226016] pci 0000:00:01.1: [1002:9840] type 00 class 0x040300
[    0.226030] pci 0000:00:01.1: reg 0x10: [mem 0xfe964000-0xfe967fff 64bit]
[    0.226052] pci 0000:00:01.1: enabling Extended Tags
[    0.226079] pci 0000:00:01.1: supports D1 D2
[    0.226179] pci 0000:00:02.0: [1022:157b] type 00 class 0x060000
[    0.226312] pci 0000:00:02.4: [1022:157c] type 01 class 0x060400
[    0.226342] pci 0000:00:02.4: enabling Extended Tags
[    0.226378] pci 0000:00:02.4: PME# supported from D0 D3hot D3cold
[    0.226533] pci 0000:00:03.0: [1022:157b] type 00 class 0x060000
[    0.226620] pci 0000:00:08.0: [1022:1578] type 00 class 0x108000
[    0.226632] pci 0000:00:08.0: reg 0x10: [mem 0xf0800000-0xf081ffff 64bit pref]
[    0.226636] pci 0000:00:08.0: reg 0x18: [mem 0xfe600000-0xfe6fffff]
[    0.226640] pci 0000:00:08.0: reg 0x1c: [mem 0xfe96e000-0xfe96efff]
[    0.226647] pci 0000:00:08.0: reg 0x24: [mem 0xfe96a000-0xfe96bfff]
[    0.226752] pci 0000:00:09.0: [1022:157d] type 00 class 0x060000
[    0.226850] pci 0000:00:09.2: [1022:157a] type 00 class 0x040300
[    0.226859] pci 0000:00:09.2: reg 0x10: [mem 0xfe960000-0xfe963fff]
[    0.226898] pci 0000:00:09.2: PME# supported from D0 D3hot D3cold
[    0.226976] pci 0000:00:10.0: [1022:7914] type 00 class 0x0c0330
[    0.227003] pci 0000:00:10.0: reg 0x10: [mem 0xfe968000-0xfe969fff 64bit]
[    0.227179] pci 0000:00:10.0: PME# supported from D0 D3hot D3cold
[    0.227294] pci 0000:00:11.0: [1022:7901] type 00 class 0x010601
[    0.227348] pci 0000:00:11.0: reg 0x10: [io  0xf140-0xf147]
[    0.227359] pci 0000:00:11.0: reg 0x14: [io  0xf130-0xf133]
[    0.227367] pci 0000:00:11.0: reg 0x18: [io  0xf120-0xf127]
[    0.227375] pci 0000:00:11.0: reg 0x1c: [io  0xf110-0xf113]
[    0.227382] pci 0000:00:11.0: reg 0x20: [io  0xf100-0xf10f]
[    0.227402] pci 0000:00:11.0: reg 0x24: [mem 0xfe96c000-0xfe96c3ff]
[    0.227438] pci 0000:00:11.0: PME# supported from D3hot
[    0.227502] pci 0000:00:14.0: [1022:790b] type 00 class 0x0c0500
[    0.227653] pci 0000:00:14.3: [1022:790e] type 00 class 0x060100
[    0.227805] pci 0000:00:18.0: [1022:1570] type 00 class 0x060000
[    0.227861] pci 0000:00:18.1: [1022:1571] type 00 class 0x060000
[    0.227916] pci 0000:00:18.2: [1022:1572] type 00 class 0x060000
[    0.227985] pci 0000:00:18.3: [1022:1573] type 00 class 0x060000
[    0.228045] pci 0000:00:18.4: [1022:1574] type 00 class 0x060000
[    0.228112] pci 0000:00:18.5: [1022:1575] type 00 class 0x060000
[    0.228230] pci 0000:01:00.0: [1022:43bb] type 00 class 0x0c0330
[    0.228253] pci 0000:01:00.0: reg 0x10: [mem 0xfe8a0000-0xfe8a7fff 64bit]
[    0.228294] pci 0000:01:00.0: enabling Extended Tags
[    0.228359] pci 0000:01:00.0: PME# supported from D3hot D3cold
[    0.228434] pci 0000:01:00.1: [1022:43b7] type 00 class 0x010601
[    0.228486] pci 0000:01:00.1: reg 0x24: [mem 0xfe880000-0xfe89ffff]
[    0.228501] pci 0000:01:00.1: reg 0x30: [mem 0xfe800000-0xfe87ffff pref]
[    0.228508] pci 0000:01:00.1: enabling Extended Tags
[    0.228547] pci 0000:01:00.1: PME# supported from D3hot D3cold
[    0.228615] pci 0000:01:00.2: [1022:43b2] type 01 class 0x060400
[    0.228667] pci 0000:01:00.2: enabling Extended Tags
[    0.228708] pci 0000:01:00.2: PME# supported from D3hot D3cold
[    0.228799] pci 0000:00:02.4: PCI bridge to [bus 01-05]
[    0.228803] pci 0000:00:02.4:   bridge window [io  0xe000-0xefff]
[    0.228805] pci 0000:00:02.4:   bridge window [mem 0xfe700000-0xfe8fffff]
[    0.228924] pci 0000:02:00.0: [1022:43b4] type 01 class 0x060400
[    0.228969] pci 0000:02:00.0: enabling Extended Tags
[    0.229017] pci 0000:02:00.0: PME# supported from D3hot D3cold
[    0.229092] pci 0000:02:01.0: [1022:43b4] type 01 class 0x060400
[    0.229137] pci 0000:02:01.0: enabling Extended Tags
[    0.229230] pci 0000:02:01.0: PME# supported from D3hot D3cold
[    0.229340] pci 0000:02:04.0: [1022:43b4] type 01 class 0x060400
[    0.229388] pci 0000:02:04.0: enabling Extended Tags
[    0.229436] pci 0000:02:04.0: PME# supported from D3hot D3cold
[    0.229523] pci 0000:01:00.2: PCI bridge to [bus 02-05]
[    0.229528] pci 0000:01:00.2:   bridge window [io  0xe000-0xefff]
[    0.229531] pci 0000:01:00.2:   bridge window [mem 0xfe700000-0xfe7fffff]
[    0.229591] pci 0000:03:00.0: [10ec:8168] type 00 class 0x020000
[    0.229633] pci 0000:03:00.0: reg 0x10: [io  0xe000-0xe0ff]
[    0.229669] pci 0000:03:00.0: reg 0x18: [mem 0xfe704000-0xfe704fff 64bit]
[    0.229692] pci 0000:03:00.0: reg 0x20: [mem 0xfe700000-0xfe703fff 64bit]
[    0.229858] pci 0000:03:00.0: supports D1 D2
[    0.229859] pci 0000:03:00.0: PME# supported from D0 D1 D2 D3hot D3cold
[    0.230052] pci 0000:02:00.0: PCI bridge to [bus 03]
[    0.230057] pci 0000:02:00.0:   bridge window [io  0xe000-0xefff]
[    0.230060] pci 0000:02:00.0:   bridge window [mem 0xfe700000-0xfe7fffff]
[    0.230112] pci 0000:02:01.0: PCI bridge to [bus 04]
[    0.230159] pci 0000:02:04.0: PCI bridge to [bus 05]
[    0.230800] ACPI: PCI Interrupt Link [LNKA] (IRQs 4 5 7 10 11 14 15) *0
[    0.230847] ACPI: PCI Interrupt Link [LNKB] (IRQs 4 5 7 10 11 14 15) *0
[    0.230881] ACPI: PCI Interrupt Link [LNKC] (IRQs 4 5 7 10 11 14 15) *0
[    0.230918] ACPI: PCI Interrupt Link [LNKD] (IRQs 4 5 7 10 11 14 15) *0
[    0.230952] ACPI: PCI Interrupt Link [LNKE] (IRQs 4 5 7 10 11 14 15) *0
[    0.231058] ACPI: PCI Interrupt Link [LNKF] (IRQs 4 5 7 10 11 14 15) *0
[    0.231087] ACPI: PCI Interrupt Link [LNKG] (IRQs 4 5 7 10 11 14 15) *0
[    0.231115] ACPI: PCI Interrupt Link [LNKH] (IRQs 4 5 7 10 11 14 15) *0
[    0.231625] pci 0000:00:01.0: vgaarb: setting as boot VGA device
[    0.231625] pci 0000:00:01.0: vgaarb: VGA device added: decodes=io+mem,owns=io+mem,locks=none
[    0.231625] pci 0000:00:01.0: vgaarb: bridge control possible
[    0.231625] vgaarb: loaded
[    0.231625] SCSI subsystem initialized
[    0.231625] libata version 3.00 loaded.
[    0.231625] ACPI: bus type USB registered
[    0.231625] usbcore: registered new interface driver usbfs
[    0.231625] usbcore: registered new interface driver hub
[    0.231625] usbcore: registered new device driver usb
[    0.231625] pps_core: LinuxPPS API ver. 1 registered
[    0.231625] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.231630] PTP clock support registered
[    0.231797] EDAC MC: Ver: 3.0.0
[    0.231797] Registered efivars operations
[    0.245557] Advanced Linux Sound Architecture Driver Initialized.
[    0.245565] PCI: Using ACPI for IRQ routing
[    0.247738] PCI: pci_cache_line_size set to 64 bytes
[    0.247790] e820: reserve RAM buffer [mem 0x9f1f6018-0x9fffffff]
[    0.247791] e820: reserve RAM buffer [mem 0x9f205018-0x9fffffff]
[    0.247791] e820: reserve RAM buffer [mem 0xd46cf000-0xd7ffffff]
[    0.247792] e820: reserve RAM buffer [mem 0xda5c1000-0xdbffffff]
[    0.247793] e820: reserve RAM buffer [mem 0xda80c000-0xdbffffff]
[    0.247793] e820: reserve RAM buffer [mem 0xde000000-0xdfffffff]
[    0.247794] e820: reserve RAM buffer [mem 0x1ff000000-0x1ffffffff]
[    0.248387] NetLabel: Initializing
[    0.248387] NetLabel:  domain hash size = 128
[    0.248387] NetLabel:  protocols = UNLABELED CIPSOv4 CALIPSO
[    0.248387] NetLabel:  unlabeled traffic allowed by default
[    0.248422] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0
[    0.248426] hpet0: 3 comparators, 32-bit 14.318180 MHz counter
[    0.251393] clocksource: Switched to clocksource tsc-early
[    0.259499] VFS: Disk quotas dquot_6.6.0
[    0.259519] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[    0.259577] pnp: PnP ACPI init
[    0.259694] system 00:00: [mem 0xf8000000-0xfbffffff] has been reserved
[    0.259702] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active)
[    0.259763] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
[    0.259812] system 00:02: [mem 0xc0000000-0xdfffffff] could not be reserved
[    0.259817] system 00:02: Plug and Play ACPI device, IDs PNP0c02 (active)
[    0.259865] pnp 00:03: Plug and Play ACPI device, IDs PNP0b00 (active)
[    0.259958] system 00:04: [io  0x0300-0x030f] has been reserved
[    0.259960] system 00:04: [io  0x0230-0x023f] has been reserved
[    0.259961] system 00:04: [io  0x0290-0x029f] has been reserved
[    0.259966] system 00:04: Plug and Play ACPI device, IDs PNP0c02 (active)
[    0.260149] pnp 00:05: [dma 0 disabled]
[    0.260183] pnp 00:05: Plug and Play ACPI device, IDs PNP0501 (active)
[    0.260308] system 00:06: [io  0x04d0-0x04d1] has been reserved
[    0.260310] system 00:06: [io  0x040b] has been reserved
[    0.260311] system 00:06: [io  0x04d6] has been reserved
[    0.260312] system 00:06: [io  0x0c00-0x0c01] has been reserved
[    0.260313] system 00:06: [io  0x0c14] has been reserved
[    0.260314] system 00:06: [io  0x0c50-0x0c51] has been reserved
[    0.260315] system 00:06: [io  0x0c52] has been reserved
[    0.260316] system 00:06: [io  0x0c6c] has been reserved
[    0.260317] system 00:06: [io  0x0c6f] has been reserved
[    0.260318] system 00:06: [io  0x0cd0-0x0cd1] has been reserved
[    0.260319] system 00:06: [io  0x0cd2-0x0cd3] has been reserved
[    0.260320] system 00:06: [io  0x0cd4-0x0cd5] has been reserved
[    0.260321] system 00:06: [io  0x0cd6-0x0cd7] has been reserved
[    0.260322] system 00:06: [io  0x0cd8-0x0cdf] has been reserved
[    0.260324] system 00:06: [io  0x0800-0x089f] has been reserved
[    0.260325] system 00:06: [io  0x0b00-0x0b0f] has been reserved
[    0.260326] system 00:06: [io  0x0b20-0x0b3f] has been reserved
[    0.260327] system 00:06: [io  0x0900-0x090f] has been reserved
[    0.260328] system 00:06: [io  0x0910-0x091f] has been reserved
[    0.260329] system 00:06: [mem 0xfec00000-0xfec00fff] could not be reserved
[    0.260331] system 00:06: [mem 0xfec01000-0xfec01fff] could not be reserved
[    0.260332] system 00:06: [mem 0xfedc0000-0xfedc0fff] has been reserved
[    0.260333] system 00:06: [mem 0xfee00000-0xfee00fff] has been reserved
[    0.260334] system 00:06: [mem 0xfed80000-0xfed8ffff] has been reserved
[    0.260335] system 00:06: [mem 0xfec10000-0xfec10fff] has been reserved
[    0.260337] system 00:06: [mem 0xff000000-0xffffffff] has been reserved
[    0.260342] system 00:06: Plug and Play ACPI device, IDs PNP0c02 (active)
[    0.260694] pnp: PnP ACPI: found 7 devices
[    0.267001] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
[    0.267047] pci 0000:02:00.0: PCI bridge to [bus 03]
[    0.267050] pci 0000:02:00.0:   bridge window [io  0xe000-0xefff]
[    0.267054] pci 0000:02:00.0:   bridge window [mem 0xfe700000-0xfe7fffff]
[    0.267062] pci 0000:02:01.0: PCI bridge to [bus 04]
[    0.267072] pci 0000:02:04.0: PCI bridge to [bus 05]
[    0.267081] pci 0000:01:00.2: PCI bridge to [bus 02-05]
[    0.267083] pci 0000:01:00.2:   bridge window [io  0xe000-0xefff]
[    0.267087] pci 0000:01:00.2:   bridge window [mem 0xfe700000-0xfe7fffff]
[    0.267094] pci 0000:00:02.4: PCI bridge to [bus 01-05]
[    0.267096] pci 0000:00:02.4:   bridge window [io  0xe000-0xefff]
[    0.267098] pci 0000:00:02.4:   bridge window [mem 0xfe700000-0xfe8fffff]
[    0.267105] pci_bus 0000:00: resource 4 [io  0x0000-0x03af window]
[    0.267106] pci_bus 0000:00: resource 5 [io  0x03e0-0x0cf7 window]
[    0.267107] pci_bus 0000:00: resource 6 [io  0x03b0-0x03df window]
[    0.267108] pci_bus 0000:00: resource 7 [io  0x0d00-0xffff window]
[    0.267109] pci_bus 0000:00: resource 8 [mem 0x000a0000-0x000bffff window]
[    0.267110] pci_bus 0000:00: resource 9 [mem 0x000c0000-0x000dffff window]
[    0.267111] pci_bus 0000:00: resource 10 [mem 0xe0000000-0xfec2ffff window]
[    0.267112] pci_bus 0000:00: resource 11 [mem 0xfee00000-0xffffffff window]
[    0.267113] pci_bus 0000:01: resource 0 [io  0xe000-0xefff]
[    0.267114] pci_bus 0000:01: resource 1 [mem 0xfe700000-0xfe8fffff]
[    0.267115] pci_bus 0000:02: resource 0 [io  0xe000-0xefff]
[    0.267116] pci_bus 0000:02: resource 1 [mem 0xfe700000-0xfe7fffff]
[    0.267118] pci_bus 0000:03: resource 0 [io  0xe000-0xefff]
[    0.267118] pci_bus 0000:03: resource 1 [mem 0xfe700000-0xfe7fffff]
[    0.267193] NET: Registered protocol family 2
[    0.267349] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes)
[    0.267376] TCP established hash table entries: 65536 (order: 7, 524288 bytes)
[    0.267471] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
[    0.267644] TCP: Hash tables configured (established 65536 bind 65536)
[    0.267724] UDP hash table entries: 4096 (order: 5, 131072 bytes)
[    0.267752] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes)
[    0.267840] NET: Registered protocol family 1
[    0.268009] RPC: Registered named UNIX socket transport module.
[    0.268010] RPC: Registered udp transport module.
[    0.268010] RPC: Registered tcp transport module.
[    0.268010] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.268122] pci 0000:00:01.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff]
[    0.268126] pci 0000:00:01.1: Linked as a consumer to 0000:00:01.0
[    0.268443] PCI: CLS 64 bytes, default 64
[    0.268476] Unpacking initramfs...
[    0.578101] Freeing initrd memory: 26636K
[    0.578123] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
[    0.578125] software IO TLB: mapped [mem 0xd03ae000-0xd43ae000] (64MB)
[    0.578182] amd_uncore: AMD NB counters detected
[    0.578252] LVT offset 0 assigned for vector 0x400
[    0.578288] perf: AMD IBS detected (0x000007ff)
[    0.578721] check: Scanning for low memory corruption every 60 seconds
[    0.579320] Initialise system trusted keyrings
[    0.579375] workingset: timestamp_bits=56 max_order=21 bucket_order=0
[    0.581434] NFS: Registering the id_resolver key type
[    0.581447] Key type id_resolver registered
[    0.581447] Key type id_legacy registered
[    0.599607] Key type asymmetric registered
[    0.599608] Asymmetric key parser 'x509' registered
[    0.599625] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
[    0.599627] io scheduler noop registered
[    0.599628] io scheduler deadline registered
[    0.599665] io scheduler cfq registered (default)
[    0.599666] io scheduler mq-deadline registered
[    0.599667] io scheduler kyber registered
[    0.600305] efifb: probing for efifb
[    0.600321] efifb: framebuffer at 0xe0000000, using 3072k, total 3072k
[    0.600322] efifb: mode is 1024x768x32, linelength=4096, pages=1
[    0.600322] efifb: scrolling: redraw
[    0.600323] efifb: Truecolor: size=8:8:8:8, shift=24:16:8:0
[    0.601375] Console: switching to colour frame buffer device 128x48
[    0.602283] fb0: EFI VGA frame buffer device
[    0.602391] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input0
[    0.602400] ACPI: Power Button [PWRB]
[    0.602434] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input1
[    0.602448] ACPI: Power Button [PWRF]
[    0.602559] ACPI: Video Device [VGA2] (multi-head: yes  rom: no  post: no)
[    0.602739] acpi device:52: registered as cooling_device0
[    0.602777] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:02/input/input2
[    0.603166] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
[    0.623778] 00:05: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
[    0.624168] Non-volatile memory driver v1.3
[    0.624195] Linux agpgart interface v0.103
[    0.626411] loop: module loaded
[    0.626540] ahci 0000:00:11.0: version 3.0
[    0.626685] ahci 0000:00:11.0: AHCI 0001.0300 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
[    0.626688] ahci 0000:00:11.0: flags: 64bit ncq sntf ilck pm led clo pmp fbs pio slum part 
[    0.626866] scsi host0: ahci
[    0.626922] ata1: SATA max UDMA/133 abar m1024@0xfe96c000 port 0xfe96c100 irq 19
[    0.627054] ahci 0000:01:00.1: SSS flag set, parallel bus scan disabled
[    0.837258] ahci 0000:01:00.1: AHCI 0001.0301 32 slots 8 ports 6 Gbps 0x33 impl SATA mode
[    0.837260] ahci 0000:01:00.1: flags: 64bit ncq sntf stag pm led clo only pmp pio slum part sxs deso sadm sds apst 
[    0.837861] scsi host1: ahci
[    0.837968] scsi host2: ahci
[    0.838069] scsi host3: ahci
[    0.838157] scsi host4: ahci
[    0.838241] scsi host5: ahci
[    0.838319] scsi host6: ahci
[    0.838400] scsi host7: ahci
[    0.838490] scsi host8: ahci
[    0.838529] ata2: SATA max UDMA/133 abar m131072@0xfe880000 port 0xfe880100 irq 32
[    0.838531] ata3: SATA max UDMA/133 abar m131072@0xfe880000 port 0xfe880180 irq 32
[    0.838532] ata4: DUMMY
[    0.838533] ata5: DUMMY
[    0.838535] ata6: SATA max UDMA/133 abar m131072@0xfe880000 port 0xfe880300 irq 32
[    0.838536] ata7: SATA max UDMA/133 abar m131072@0xfe880000 port 0xfe880380 irq 32
[    0.838537] ata8: DUMMY
[    0.838538] ata9: DUMMY
[    0.838676] e100: Intel(R) PRO/100 Network Driver, 3.5.24-k2-NAPI
[    0.838677] e100: Copyright(c) 1999-2006 Intel Corporation
[    0.838687] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
[    0.838687] e1000: Copyright (c) 1999-2006 Intel Corporation.
[    0.838699] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
[    0.838699] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
[    0.838713] sky2: driver version 1.30
[    0.844099] libphy: r8169: probed
[    0.844361] r8169 0000:03:00.0 eth0: RTL8168h/8111h, b0:6e:bf:bc:cb:9e, XID 54100800, IRQ 33
[    0.844363] r8169 0000:03:00.0 eth0: jumbo features [frames: 9200 bytes, tx checksumming: ko]
[    0.844469] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    0.844470] ehci-pci: EHCI PCI platform driver
[    0.844481] ehci-platform: EHCI generic platform driver
[    0.844494] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[    0.844497] ohci-pci: OHCI PCI platform driver
[    0.844507] uhci_hcd: USB Universal Host Controller Interface driver
[    0.844654] xhci_hcd 0000:00:10.0: xHCI Host Controller
[    0.844693] xhci_hcd 0000:00:10.0: new USB bus registered, assigned bus number 1
[    0.844866] xhci_hcd 0000:00:10.0: hcc params 0x014040c3 hci version 0x100 quirks 0x0000000000000410
[    0.845134] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.20
[    0.845136] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    0.845137] usb usb1: Product: xHCI Host Controller
[    0.845138] usb usb1: Manufacturer: Linux 4.20.0-rc2+ xhci-hcd
[    0.845139] usb usb1: SerialNumber: 0000:00:10.0
[    0.845263] hub 1-0:1.0: USB hub found
[    0.845277] hub 1-0:1.0: 4 ports detected
[    0.845496] xhci_hcd 0000:00:10.0: xHCI Host Controller
[    0.845523] xhci_hcd 0000:00:10.0: new USB bus registered, assigned bus number 2
[    0.845525] xhci_hcd 0000:00:10.0: Host supports USB 3.0  SuperSpeed
[    0.851794] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
[    0.851811] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.20
[    0.851812] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    0.851813] usb usb2: Product: xHCI Host Controller
[    0.851814] usb usb2: Manufacturer: Linux 4.20.0-rc2+ xhci-hcd
[    0.851815] usb usb2: SerialNumber: 0000:00:10.0
[    0.851883] hub 2-0:1.0: USB hub found
[    0.851891] hub 2-0:1.0: 4 ports detected
[    0.852079] xhci_hcd 0000:01:00.0: xHCI Host Controller
[    0.852110] xhci_hcd 0000:01:00.0: new USB bus registered, assigned bus number 3
[    0.907444] xhci_hcd 0000:01:00.0: hcc params 0x0200ef81 hci version 0x110 quirks 0x0000000048000410
[    0.907649] usb usb3: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 4.20
[    0.907655] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    0.907656] usb usb3: Product: xHCI Host Controller
[    0.907657] usb usb3: Manufacturer: Linux 4.20.0-rc2+ xhci-hcd
[    0.907658] usb usb3: SerialNumber: 0000:01:00.0
[    0.907743] hub 3-0:1.0: USB hub found
[    0.907758] hub 3-0:1.0: 10 ports detected
[    0.911997] xhci_hcd 0000:01:00.0: xHCI Host Controller
[    0.912033] xhci_hcd 0000:01:00.0: new USB bus registered, assigned bus number 4
[    0.912036] xhci_hcd 0000:01:00.0: Host supports USB 3.10 Enhanced SuperSpeed
[    0.912063] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
[    0.912081] usb usb4: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 4.20
[    0.912082] usb usb4: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[    0.912083] usb usb4: Product: xHCI Host Controller
[    0.912084] usb usb4: Manufacturer: Linux 4.20.0-rc2+ xhci-hcd
[    0.912085] usb usb4: SerialNumber: 0000:01:00.0
[    0.912148] hub 4-0:1.0: USB hub found
[    0.912177] hub 4-0:1.0: 4 ports detected
[    0.913924] usbcore: registered new interface driver usblp
[    0.913945] usbcore: registered new interface driver usb-storage
[    0.913980] i8042: PNP: No PS/2 controller found.
[    0.914159] rtc_cmos 00:03: RTC can wake from S4
[    0.914283] rtc_cmos 00:03: registered as rtc0
[    0.914296] rtc_cmos 00:03: alarms up to one month, y3k, 114 bytes nvram, hpet irqs
[    0.914436] device-mapper: ioctl: 4.39.0-ioctl (2018-04-03) initialised: dm-devel@redhat.com
[    0.914442] EFI Variables Facility v0.08 2004-May-17
[    0.923650] hidraw: raw HID events driver (C) Jiri Kosina
[    0.923836] usbcore: registered new interface driver usbhid
[    0.923837] usbhid: USB HID core driver
[    0.924198] snd_hda_intel 0000:00:01.1: Force to non-snoop mode
[    0.924219] snd_hda_intel 0000:00:09.2: enabling device (0004 -> 0006)
[    0.924674] Initializing XFRM netlink socket
[    0.924784] NET: Registered protocol family 10
[    0.925023] Segment Routing with IPv6
[    0.925165] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[    0.925302] NET: Registered protocol family 17
[    0.925318] Key type dns_resolver registered
[    0.925668] microcode: CPU0: patch_level=0x06006118
[    0.925673] microcode: CPU1: patch_level=0x06006118
[    0.925677] microcode: CPU2: patch_level=0x06006118
[    0.925681] microcode: CPU3: patch_level=0x06006118
[    0.925720] microcode: Microcode Update Driver: v2.2.
[    0.925733] sched_clock: Marking stable (925470552, 242018)->(1037116645, -111404075)
[    0.925922] registered taskstats version 1
[    0.925922] Loading compiled-in X.509 certificates
[    0.926174]   Magic number: 10:217:893
[    0.926246] printk: console [netcon0] enabled
[    0.926246] netconsole: network logging started
[    0.926354] acpi_cpufreq: overriding BIOS provided _PSD data
[    0.926500] cfg80211: Loading compiled-in X.509 certificates for regulatory database
[    0.929171] hdaudio hdaudioC0D0: Unable to bind the codec
[    0.929238] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
[    0.929248] ALSA device list:
[    0.929249]   No soundcards found.
[    0.929341] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[    0.929343] cfg80211: failed to load regulatory.db
[    0.933970] random: fast init done
[    0.935482] hdaudio hdaudioC1D0: Unable to bind the codec
[    1.145780] ata1: SATA link down (SStatus 0 SControl 300)
[    1.300750] usb 3-7: new high-speed USB device number 2 using xhci_hcd
[    1.306981] ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
[    1.313813] ata2.00: ATA-8: KINGSTON SV300S37A120G, 608ABBF0, max UDMA/133
[    1.313818] ata2.00: 234441648 sectors, multi 1: LBA48 NCQ (depth 32), AA
[    1.323520] ata2.00: configured for UDMA/133
[    1.323769] scsi 1:0:0:0: Direct-Access     ATA      KINGSTON SV300S3 BBF0 PQ: 0 ANSI: 5
[    1.324203] sd 1:0:0:0: Attached scsi generic sg0 type 0
[    1.324250] sd 1:0:0:0: [sda] 234441648 512-byte logical blocks: (120 GB/112 GiB)
[    1.324268] sd 1:0:0:0: [sda] Write Protect is off
[    1.324270] sd 1:0:0:0: [sda] Mode Sense: 00 3a 00 00
[    1.324309] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
[    1.325535]  sda: sda1 sda2 sda3 sda4
[    1.326141] sd 1:0:0:0: [sda] Attached SCSI disk
[    1.500550] ata3: SATA link down (SStatus 0 SControl 300)
[    1.504619] usb 3-7: New USB device found, idVendor=0bda, idProduct=8152, bcdDevice=20.00
[    1.504625] usb 3-7: New USB device strings: Mfr=1, Product=2, SerialNumber=3
[    1.504628] usb 3-7: Product: USB 10/100 LAN
[    1.504630] usb 3-7: Manufacturer: CMI
[    1.504632] usb 3-7: SerialNumber: 70886B8245CF
[    1.619538] tsc: Refined TSC clocksource calibration: 3792.881 MHz
[    1.619565] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x6d58273f81c, max_idle_ns: 881591146675 ns
[    1.619631] clocksource: Switched to clocksource tsc
[    1.690548] usb 3-10: new high-speed USB device number 3 using xhci_hcd
[    1.811854] ata6: SATA link down (SStatus 0 SControl 300)
[    1.889745] usb 3-10: New USB device found, idVendor=0409, idProduct=005a, bcdDevice= 1.00
[    1.889750] usb 3-10: New USB device strings: Mfr=0, Product=0, SerialNumber=0
[    1.894655] hub 3-10:1.0: USB hub found
[    1.897631] hub 3-10:1.0: 4 ports detected
[    2.123981] ata7: SATA link down (SStatus 0 SControl 300)
[    2.124704] Freeing unused kernel image memory: 1232K
[    2.129586] Write protecting the kernel read-only data: 18432k
[    2.130695] Freeing unused kernel image memory: 2012K
[    2.131381] Freeing unused kernel image memory: 1260K
[    2.131396] Run /init as init process
[    2.179257] systemd[1]: systemd 238 running in system mode. (+PAM +AUDIT +SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=hybrid)
[    2.191739] systemd[1]: Detected architecture x86-64.
[    2.191745] systemd[1]: Running in initial RAM disk.
[    2.192965] systemd[1]: Set hostname to <carrizo>.
[    2.228472] usb 3-10.4: new low-speed USB device number 4 using xhci_hcd
[    2.253622] systemd[1]: File /usr/lib/systemd/system/systemd-journald.service:35 configures an IP firewall (IPAddressDeny=any), but the local system does not support BPF/cgroup based firewalling.
[    2.253628] systemd[1]: Proceeding WITHOUT firewalling in effect! (This warning is only shown for the first loaded unit using IP firewalling.)
[    2.259140] random: systemd: uninitialized urandom read (16 bytes read)
[    2.259155] systemd[1]: Reached target Timers.
[    2.259208] random: systemd: uninitialized urandom read (16 bytes read)
[    2.259213] systemd[1]: Reached target Slices.
[    2.259226] random: systemd: uninitialized urandom read (16 bytes read)
[    2.259292] systemd[1]: Listening on udev Control Socket.
[    2.259323] systemd[1]: Listening on udev Kernel Socket.
[    2.317889] audit: type=1130 audit(1543593221.137:2): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-vconsole-setup comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
[    2.317893] audit: type=1131 audit(1543593221.137:3): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-vconsole-setup comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
[    2.328977] audit: type=1130 audit(1543593221.148:4): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-journald comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
[    2.335598] audit: type=1130 audit(1543593221.155:5): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=dracut-cmdline comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
[    2.335824] audit: type=1130 audit(1543593221.155:6): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-tmpfiles-setup comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
[    2.368876] audit: type=1130 audit(1543593221.188:7): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=dracut-pre-udev comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
[    2.379740] audit: type=1130 audit(1543593221.199:8): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-udevd comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
[    2.450863] audit: type=1130 audit(1543593221.267:9): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=systemd-udev-trigger comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
[    2.474537] audit: type=1130 audit(1543593221.293:10): pid=1 uid=0 auid=4294967295 ses=4294967295 subj=kernel msg='unit=plymouth-start comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success'
[    2.479673] usbcore: registered new interface driver r8152
[    2.485853] r8169 0000:03:00.0 enp3s0: renamed from eth0
[    2.556804] usb 3-10.4: New USB device found, idVendor=046d, idProduct=c31c, bcdDevice=64.00
[    2.556809] usb 3-10.4: New USB device strings: Mfr=1, Product=2, SerialNumber=0
[    2.556812] usb 3-10.4: Product: USB Keyboard
[    2.556814] usb 3-10.4: Manufacturer: Logitech
[    2.662425] input: Logitech USB Keyboard as /devices/pci0000:00/0000:00:02.4/0000:01:00.0/usb3/3-10/3-10.4/3-10.4:1.0/0003:046D:C31C.0001/input/input3
[    2.672622] usb 3-7: reset high-speed USB device number 2 using xhci_hcd
[    2.714998] hid-generic 0003:046D:C31C.0001: input,hidraw0: USB HID v1.10 Keyboard [Logitech USB Keyboard] on usb-0000:01:00.0-10.4/input0
[    2.841550] input: Logitech USB Keyboard Consumer Control as /devices/pci0000:00/0000:00:02.4/0000:01:00.0/usb3/3-10/3-10.4/3-10.4:1.1/0003:046D:C31C.0002/input/input4
[    2.893837] input: Logitech USB Keyboard System Control as /devices/pci0000:00/0000:00:02.4/0000:01:00.0/usb3/3-10/3-10.4/3-10.4:1.1/0003:046D:C31C.0002/input/input5
[    2.894021] hid-generic 0003:046D:C31C.0002: input,hidraw1: USB HID v1.10 Device [Logitech USB Keyboard] on usb-0000:01:00.0-10.4/input1
[    2.934355] input: Logitech USB Keyboard as /devices/pci0000:00/0000:00:02.4/0000:01:00.0/usb3/3-10/3-10.4/3-10.4:1.2/0003:046D:C31C.0003/input/input6
[    2.934553] hid-generic 0003:046D:C31C.0003: input,hidraw2: USB HID v1.10 Mouse [Logitech USB Keyboard] on usb-0000:01:00.0-10.4/input2
[    2.944029] systemd-udevd (2272) used greatest stack depth: 13896 bytes left
[    2.944191] systemd-udevd (2274) used greatest stack depth: 13680 bytes left
[    2.992717] EXT4-fs (sda4): mounted filesystem with ordered data mode. Opts: (null)
[    3.016040] systemd-fstab-g (2346) used greatest stack depth: 13624 bytes left
[    3.137738] r8152 3-7:1.0 eth0: v1.09.9
[    3.138728] r8152 3-7:1.0 enp1s0f0u7: renamed from eth0
[    3.157407] systemd-udevd (2390) used greatest stack depth: 13552 bytes left
[    3.333490] systemd-journald[1433]: Received SIGTERM from PID 1 (systemd).
[    3.353819] printk: systemd: 15 output lines suppressed due to ratelimiting
[    3.426840] SELinux:  Disabled at runtime.
[    3.469918] systemd[1]: systemd 238 running in system mode. (+PAM +AUDIT +SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=hybrid)
[    3.481696] systemd[1]: Detected architecture x86-64.
[    3.482730] systemd[1]: Set hostname to <carrizo>.
[    3.524027] systemd-sysv-ge (2426) used greatest stack depth: 13104 bytes left
[    3.602771] systemd[1]: File /usr/lib/systemd/system/systemd-journald.service:35 configures an IP firewall (IPAddressDeny=any), but the local system does not support BPF/cgroup based firewalling.
[    3.602774] systemd[1]: Proceeding WITHOUT firewalling in effect! (This warning is only shown for the first loaded unit using IP firewalling.)
[    3.698131] systemd[1]: Stopped Switch Root.
[    3.698241] systemd[1]: systemd-journald.service: Service has no hold-off time, scheduling restart.
[    3.698326] systemd[1]: systemd-journald.service: Scheduled restart job, restart counter is at 1.
[    3.698338] systemd[1]: Stopped Journal Service.
[    3.698890] systemd[1]: Starting Journal Service...
[    3.708346] EXT4-fs (sda4): re-mounted. Opts: (null)
[    3.738656] systemd-journald[2431]: Received request to flush runtime journal from PID 1
[    4.088859] Adding 7721980k swap on /dev/sda3.  Priority:-2 extents:1 across:7721980k SS
[    4.242481] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: (null)
[    4.754325] IPv6: ADDRCONF(NETDEV_UP): enp1s0f0u7: link is not ready
[    4.919174] IPv6: ADDRCONF(NETDEV_UP): enp1s0f0u7: link is not ready
[    4.922168] IPv6: ADDRCONF(NETDEV_UP): enp3s0: link is not ready
[    4.924786] Generic PHY r8169-300:00: attached PHY driver [Generic PHY] (mii_bus:phy_addr=r8169-300:00, irq=IGNORE)
[    5.010366] IPv6: ADDRCONF(NETDEV_UP): enp3s0: link is not ready
[    5.536273] IPv6: ADDRCONF(NETDEV_CHANGE): enp1s0f0u7: link becomes ready
[    5.552258] r8152 3-7:1.0 enp1s0f0u7: carrier on
[    5.906456] random: crng init done
[    5.906458] random: 7 urandom warning(s) missed due to ratelimiting
[    6.742754] libvirtd (3501) used greatest stack depth: 12992 bytes left
[   15.165422] [drm] amdgpu kernel modesetting enabled.
[   15.165451] checking generic (e0000000 300000) vs hw (e0000000 10000000)
[   15.165460] fb0: switching to amdgpudrmfb from EFI VGA
[   15.165566] Console: switching to colour dummy device 80x25
[   15.166223] [drm] initializing kernel modesetting (CARRIZO 0x1002:0x9874 0x1043:0x8719 0xE1).
[   15.166242] [drm] register mmio base: 0xFE900000
[   15.166243] [drm] register mmio size: 262144
[   15.166253] [drm] add ip block number 0 <vi_common>
[   15.166254] [drm] add ip block number 1 <gmc_v8_0>
[   15.166255] [drm] add ip block number 2 <cz_ih>
[   15.166256] [drm] add ip block number 3 <gfx_v8_0>
[   15.166257] [drm] add ip block number 4 <sdma_v3_0>
[   15.166257] [drm] add ip block number 5 <powerplay>
[   15.166258] [drm] add ip block number 6 <dm>
[   15.166259] [drm] add ip block number 7 <uvd_v6_0>
[   15.166260] [drm] add ip block number 8 <vce_v3_0>
[   15.166269] [drm] UVD is enabled in physical mode
[   15.166271] [drm] VCE enabled in physical mode
[   15.177608] [drm] BIOS signature incorrect 0 0
[   15.177668] ATOM BIOS: 109-C95010-003
[   15.177747] [drm] vm size is 64 GB, 2 levels, block size is 10-bit, fragment size is 9-bit
[   15.177753] amdgpu 0000:00:01.0: VRAM: 512M 0x000000F400000000 - 0x000000F41FFFFFFF (512M used)
[   15.177754] amdgpu 0000:00:01.0: GART: 1024M 0x000000FF00000000 - 0x000000FF3FFFFFFF
[   15.177758] [drm] Detected VRAM RAM=512M, BAR=512M
[   15.177759] [drm] RAM width 128bits UNKNOWN
[   15.177823] [TTM] Zone  kernel: Available graphics memory: 3792884 kiB
[   15.177824] [TTM] Zone   dma32: Available graphics memory: 2097152 kiB
[   15.177825] [TTM] Initializing pool allocator
[   15.177829] [TTM] Initializing DMA pool allocator
[   15.177864] [drm] amdgpu: 512M of VRAM memory ready
[   15.177865] [drm] amdgpu: 3072M of GTT memory ready.
[   15.177879] [drm] GART: num cpu pages 262144, num gpu pages 262144
[   15.178375] [drm] PCIE GART of 1024M enabled (table at 0x000000F400300000).
[   15.184582] [drm] Found UVD firmware Version: 1.91 Family ID: 11
[   15.184590] [drm] UVD ENC is disabled
[   15.185999] [drm] Found VCE firmware Version: 52.4 Binary ID: 3
[   15.192044] [drm] DM_PPLIB: values for Engine clock
[   15.192046] [drm] DM_PPLIB:	 450000
[   15.192046] [drm] DM_PPLIB:	 576000
[   15.192046] [drm] DM_PPLIB:	 685720
[   15.192047] [drm] DM_PPLIB:	 800000
[   15.192047] [drm] DM_PPLIB:	 900000
[   15.192048] [drm] DM_PPLIB:	 960000
[   15.192048] [drm] DM_PPLIB:	 1028580
[   15.192049] [drm] DM_PPLIB:	 1107700
[   15.192049] [drm] DM_PPLIB: Validation clocks:
[   15.192050] [drm] DM_PPLIB:    engine_max_clock: 110770
[   15.192050] [drm] DM_PPLIB:    memory_max_clock: 106600
[   15.192051] [drm] DM_PPLIB:    level           : 8
[   15.192052] [drm] DM_PPLIB: values for Display clock
[   15.192053] [drm] DM_PPLIB:	 300000
[   15.192053] [drm] DM_PPLIB:	 400000
[   15.192053] [drm] DM_PPLIB:	 496560
[   15.192054] [drm] DM_PPLIB:	 626090
[   15.192054] [drm] DM_PPLIB:	 685720
[   15.192055] [drm] DM_PPLIB:	 757900
[   15.192055] [drm] DM_PPLIB:	 800000
[   15.192055] [drm] DM_PPLIB:	 847060
[   15.192056] [drm] DM_PPLIB: Validation clocks:
[   15.192056] [drm] DM_PPLIB:    engine_max_clock: 110770
[   15.192057] [drm] DM_PPLIB:    memory_max_clock: 106600
[   15.192057] [drm] DM_PPLIB:    level           : 8
[   15.192058] [drm] DM_PPLIB: values for Memory clock
[   15.192058] [drm] DM_PPLIB:	 667000
[   15.192059] [drm] DM_PPLIB:	 1066000
[   15.192059] [drm] DM_PPLIB: Validation clocks:
[   15.192060] [drm] DM_PPLIB:    engine_max_clock: 110770
[   15.192060] [drm] DM_PPLIB:    memory_max_clock: 106600
[   15.192061] [drm] DM_PPLIB:    level           : 8
[   15.201417] [drm] Display Core initialized with v3.1.68!
[   15.227974] [drm] SADs count is: -524, don't need to read it
[   15.228617] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[   15.228619] [drm] Driver supports precise vblank timestamp query.
[   15.255059] [drm] UVD initialized successfully.
[   15.456422] [drm] VCE initialized successfully.
[   15.457615] [drm] fb mappable at 0x1FF8DC000
[   15.457617] [drm] vram apper at 0x1FF000000
[   15.457618] [drm] size 8294400
[   15.457619] [drm] fb depth is 24
[   15.457620] [drm]    pitch is 7680
[   15.457722] fbcon: amdgpudrmfb (fb0) is primary device
[   15.472516] Console: switching to colour frame buffer device 240x67
[   15.492892] amdgpu 0000:00:01.0: fb0: amdgpudrmfb frame buffer device
[   15.498003] [drm] Initialized amdgpu 3.27.0 20150101 for 0000:00:01.0 on minor 0
[   15.498474] modprobe (3576) used greatest stack depth: 12120 bytes left
[   15.877154] BUG: unable to handle kernel NULL pointer dereference at 0000000000000000
[   15.877158] #PF error: [normal kernel read fault]
[   15.877160] PGD 1f12a8067 P4D 1f12a8067 PUD 1f2135067 PMD 0 
[   15.877163] Oops: 0000 [#1] SMP NOPTI
[   15.877167] CPU: 0 PID: 3661 Comm: Xorg Not tainted 4.20.0-rc2+ #1
[   15.877168] Hardware name: System manufacturer System Product Name/TUF B350M-PLUS GAMING, BIOS 4011 04/19/2018
[   15.877174] RIP: 0010:change_page_attr_set_clr+0x1f/0x320
[   15.877176] Code: ff 66 2e 0f 1f 84 00 00 00 00 00 41 57 49 89 ff 41 56 45 89 ce 41 55 49 89 cd b9 09 00 00 00 41 54 55 53 48 89 d3 48 83 ec 78 <4c> 8b 17 65 48 8b 04 25 28 00 00 00 48 89 44 24 70 31 c0 48 8d 6c
[   15.877177] RSP: 0018:ffffa8dc8133f760 EFLAGS: 00010286
[   15.877179] RAX: 0000000000000200 RBX: 0000000000000010 RCX: 0000000000000009
[   15.877180] RDX: 0000000000000010 RSI: 0000000000000200 RDI: 0000000000000000
[   15.877181] RBP: 0000000000000001 R08: 0000000000000000 R09: 0000000000000004
[   15.877182] R10: 0000000000000000 R11: 0000000000000000 R12: 00000000000001ff
[   15.877183] R13: 0000000000000000 R14: 0000000000000004 R15: 0000000000000000
[   15.877185] FS:  00007f3cd1760ac0(0000) GS:ffff8e0337000000(0000) knlGS:0000000000000000
[   15.877186] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   15.877187] CR2: 0000000000000000 CR3: 00000001edc56000 CR4: 00000000001406f0
[   15.877188] Call Trace:
[   15.877193]  ? pat_pagerange_is_ram+0x6e/0x90
[   15.877194]  ? reserve_memtype+0x87/0x280
[   15.877196]  _set_pages_array+0xf4/0x130
[   15.877203]  ttm_set_pages_caching+0x14/0x40 [ttm]
[   15.877206]  ttm_alloc_new_pages.isra.14.constprop.20+0xa2/0x140 [ttm]
[   15.877209]  ttm_pool_populate+0x2c9/0x700 [ttm]
[   15.877212]  ? kvmalloc_node+0x39/0x60
[   15.877215]  ? __kmalloc_node+0x183/0x240
[   15.877217]  ttm_populate_and_map_pages+0x1f/0x250 [ttm]
[   15.877219]  ttm_tt_populate.part.9+0x19/0x60 [ttm]
[   15.877222]  ttm_tt_bind+0x43/0x50 [ttm]
[   15.877225]  ttm_bo_handle_move_mem+0x25a/0x4e0 [ttm]
[   15.877301]  ? amdgpu_bo_subtract_pin_size+0x50/0x50 [amdgpu]
[   15.877304]  ttm_bo_validate+0x113/0x130 [ttm]
[   15.877361]  ? amdgpu_bo_subtract_pin_size+0x50/0x50 [amdgpu]
[   15.877364]  ? drm_hdmi_avi_infoframe_from_display_mode+0x81/0x110
[   15.877366]  ttm_bo_init_reserved+0x260/0x390 [ttm]
[   15.877386]  amdgpu_bo_do_create+0x1e8/0x420 [amdgpu]
[   15.877406]  ? amdgpu_bo_subtract_pin_size+0x50/0x50 [amdgpu]
[   15.877425]  amdgpu_bo_create+0x3b/0x1e0 [amdgpu]
[   15.877428]  ? _cond_resched+0x10/0x20
[   15.877431]  ? find_next_iomem_res+0x31/0x110
[   15.877450]  amdgpu_gem_object_create+0x99/0x120 [amdgpu]
[   15.877471]  amdgpu_gem_create_ioctl+0xf8/0x290 [amdgpu]
[   15.877491]  ? amdgpu_gem_object_close+0x1a0/0x1a0 [amdgpu]
[   15.877493]  drm_ioctl_kernel+0xa4/0xf0
[   15.877495]  drm_ioctl+0x1d5/0x360
[   15.877515]  ? amdgpu_gem_object_close+0x1a0/0x1a0 [amdgpu]
[   15.877533]  amdgpu_drm_ioctl+0x44/0x80 [amdgpu]
[   15.877536]  do_vfs_ioctl+0x9f/0x610
[   15.877538]  ksys_ioctl+0x5b/0x90
[   15.877539]  __x64_sys_ioctl+0x11/0x20
[   15.877542]  do_syscall_64+0x43/0xf0
[   15.877544]  entry_SYSCALL_64_after_hwframe+0x44/0xa9
[   15.877546] RIP: 0033:0x7f3cce983c57
[   15.877548] Code: 00 00 90 48 8b 05 49 82 2c 00 64 c7 00 26 00 00 00 48 c7 c0 ff ff ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 19 82 2c 00 f7 d8 64 89 01 48
[   15.877549] RSP: 002b:00007ffd7cd22208 EFLAGS: 00000202 ORIG_RAX: 0000000000000010
[   15.877550] RAX: ffffffffffffffda RBX: 0000000000000011 RCX: 00007f3cce983c57
[   15.877551] RDX: 00007ffd7cd222b0 RSI: 00000000c0206440 RDI: 000000000000000c
[   15.877552] RBP: 00007ffd7cd22240 R08: 0000000001e84270 R09: 0000000000000000
[   15.877553] R10: 0000000001b9c010 R11: 0000000000000202 R12: 0000000000000000
[   15.877554] R13: 0000000000000005 R14: 000000000084b2c0 R15: 0000000000000000
[   15.877555] Modules linked in: amdgpu chash gpu_sched ttm r8152 efivarfs
[   15.877559] CR2: 0000000000000000
[   15.877561] ---[ end trace bb7dae5733651bde ]---
[   15.877563] RIP: 0010:change_page_attr_set_clr+0x1f/0x320
[   15.877564] Code: ff 66 2e 0f 1f 84 00 00 00 00 00 41 57 49 89 ff 41 56 45 89 ce 41 55 49 89 cd b9 09 00 00 00 41 54 55 53 48 89 d3 48 83 ec 78 <4c> 8b 17 65 48 8b 04 25 28 00 00 00 48 89 44 24 70 31 c0 48 8d 6c
[   15.877565] RSP: 0018:ffffa8dc8133f760 EFLAGS: 00010286
[   15.877567] RAX: 0000000000000200 RBX: 0000000000000010 RCX: 0000000000000009
[   15.877568] RDX: 0000000000000010 RSI: 0000000000000200 RDI: 0000000000000000
[   15.877568] RBP: 0000000000000001 R08: 0000000000000000 R09: 0000000000000004
[   15.877569] R10: 0000000000000000 R11: 0000000000000000 R12: 00000000000001ff
[   15.877570] R13: 0000000000000000 R14: 0000000000000004 R15: 0000000000000000
[   15.877572] FS:  00007f3cd1760ac0(0000) GS:ffff8e0337000000(0000) knlGS:0000000000000000
[   15.877573] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   15.877574] CR2: 0000000000000000 CR3: 00000001edc56000 CR4: 00000000001406f0

Re: [PATCH 2/4] x86/mm/cpa: Fix cpa_flush_array()

[Dave Hansen]

> +void __cpa_flush_array(void *data)
>  {
> -	unsigned int i, level;
> +	struct cpa_data *cpa = data;
> +	unsigned int i;
>  
> -	if (__cpa_flush_range(baddr, numpages, cache))
> +	for (i = 0; i < cpa->numpages; i++)
> +		__flush_tlb_one_kernel(__cpa_addr(cpa, i));
> +}

While I guess it won't _hurt_ anything, we do have cases where
__cpa_addr() can return 0.  So, won't this be flushing virtual address
0x0 unnecessarily for those?

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[Peter Zijlstra]

On Fri, Nov 30, 2018 at 04:19:46PM +0000, StDenis, Tom wrote:
> On 2018-11-30 10:31 a.m., Peter Zijlstra wrote:

> > I pushed them out to:
> > 
> >    git://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git x86/mm
> > 
> > I hope that works; I'm out for a few hours, but should check on email
> > again tonight.
> > 
> 
> NAK I get a failure in TTM on init with your x86/mm branch (see attached 
> dmesg).

*sigh*, it's been one of those days. Ok, I'll go write some cpa
selftests or something so that I have code that uses this stuff.

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[StDenis, Tom]

On 2018-11-30 12:48 p.m., Peter Zijlstra wrote:
> On Fri, Nov 30, 2018 at 04:19:46PM +0000, StDenis, Tom wrote:
>> On 2018-11-30 10:31 a.m., Peter Zijlstra wrote:
> 
>>> I pushed them out to:
>>>
>>>     git://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git x86/mm
>>>
>>> I hope that works; I'm out for a few hours, but should check on email
>>> again tonight.
>>>
>>
>> NAK I get a failure in TTM on init with your x86/mm branch (see attached
>> dmesg).
> 
> *sigh*, it's been one of those days. Ok, I'll go write some cpa
> selftests or something so that I have code that uses this stuff.
> 

Well the ttm crash could be completely unrelated the problem is your 
x86/mm branch is not up to date with master and doesn't include drm fixes.

Tom

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[Peter Zijlstra]

On Fri, Nov 30, 2018 at 03:27:02PM +0000, StDenis, Tom wrote:
> I can apply the patch you attached but the inline patches just don't 
> apply.  Could be my imap client (thunderbird) mangled them but I've 
> applied patches this way before.  could you attach them instead please?

That's arguably a bug in Thunderbird; but there's already upstream quilt
changes (that I used to have before Debian helpfully updated my quilt
package) that should remedy this as well.

It seems some MUA's get horribly confused about the
"Content-Disposition: inline; filename=$patch" header quilt-mail adds.

I've once again removed that from my local copy; hopefully the next time
Debian updates that package it will actually be with a new enough
version to also include those changes :/

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[Peter Zijlstra]

On Fri, Nov 30, 2018 at 05:49:34PM +0000, StDenis, Tom wrote:
> On 2018-11-30 12:48 p.m., Peter Zijlstra wrote:
> > On Fri, Nov 30, 2018 at 04:19:46PM +0000, StDenis, Tom wrote:
> >> On 2018-11-30 10:31 a.m., Peter Zijlstra wrote:
> > 
> >>> I pushed them out to:
> >>>
> >>>     git://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git x86/mm
> >>>
> >>> I hope that works; I'm out for a few hours, but should check on email
> >>> again tonight.
> >>>
> >>
> >> NAK I get a failure in TTM on init with your x86/mm branch (see attached
> >> dmesg).
> > 
> > *sigh*, it's been one of those days. Ok, I'll go write some cpa
> > selftests or something so that I have code that uses this stuff.
> > 
> 
> Well the ttm crash could be completely unrelated the problem is your 
> x86/mm branch is not up to date with master and doesn't include drm fixes.

Well, it crashes right in the middle of the CPA code, and I'm having a
horrible day, so I'm thinking I screwed up rather than anything else.

Also, some level of selftests would be good to have in any case I
figure.

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[Peter Zijlstra]

On Fri, Nov 30, 2018 at 04:19:46PM +0000, StDenis, Tom wrote:
> NAK I get a failure in TTM on init with your x86/mm branch (see attached 
> dmesg).

So the good news is that with some additional self-tests I can trivially
reproduce this. The bad news is that an otherwise straight forward
cleanup seems to make CPA horribly mad at me.

And since we're somewhat late in the release cycle, I suppose we should
do the simple thing first, and then I can try and figure out this CPA
mess later.

So how about this relatively simple partial revert to sort the problem.

---
Subject: x86/mm/cpa: Fix cpa_flush_array() TLB invalidation

In commit:

  a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")

I misread the cpa array code and incorrectly used
tlb_flush_kernel_range(), resulting in missing TLB flushes and
consequent failures.

Instead do a full invalidate in this case -- for now.

Fixes: a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")
Reported-by: "StDenis, Tom" <Tom.StDenis@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/x86/mm/pageattr.c | 24 ++++++++++++++++--------
 1 file changed, 16 insertions(+), 8 deletions(-)

diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index bac35001d896..61bc7d1800d7 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -285,20 +285,16 @@ static void cpa_flush_all(unsigned long cache)
 	on_each_cpu(__cpa_flush_all, (void *) cache, 1);
 }
 
-static bool __cpa_flush_range(unsigned long start, int numpages, int cache)
+static bool __inv_flush_all(int cache)
 {
 	BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
 
-	WARN_ON(PAGE_ALIGN(start) != start);
-
 	if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {
 		cpa_flush_all(cache);
 		return true;
 	}
 
-	flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);
-
-	return !cache;
+	return false;
 }
 
 static void cpa_flush_range(unsigned long start, int numpages, int cache)
@@ -306,7 +302,14 @@ static void cpa_flush_range(unsigned long start, int numpages, int cache)
 	unsigned int i, level;
 	unsigned long addr;
 
-	if (__cpa_flush_range(start, numpages, cache))
+	WARN_ON(PAGE_ALIGN(start) != start);
+
+	if (__inv_flush_all(cache))
+		return;
+
+	flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);
+
+	if (!cache)
 		return;
 
 	/*
@@ -332,7 +335,12 @@ static void cpa_flush_array(unsigned long baddr, unsigned long *start,
 {
 	unsigned int i, level;
 
-	if (__cpa_flush_range(baddr, numpages, cache))
+	if (__inv_flush_all(cache))
+		return;
+
+	flush_tlb_all();
+
+	if (!cache)
 		return;
 
 	/*

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[StDenis, Tom]

Hi Peter,

After updating my UMDs (mesa/etc) over the weekend I cannot reproduce 
the bug to begin with.  I'll try jumping directly to the intersection 
and see if I can reproduce the fault there otherwise I'll have to 
rollback my umds.

Hopefully I can test this tomorrow.

Tom

On 2018-12-03 10:41 a.m., Peter Zijlstra wrote:
> On Fri, Nov 30, 2018 at 04:19:46PM +0000, StDenis, Tom wrote:
>> NAK I get a failure in TTM on init with your x86/mm branch (see attached
>> dmesg).
> 
> So the good news is that with some additional self-tests I can trivially
> reproduce this. The bad news is that an otherwise straight forward
> cleanup seems to make CPA horribly mad at me.
> 
> And since we're somewhat late in the release cycle, I suppose we should
> do the simple thing first, and then I can try and figure out this CPA
> mess later.
> 
> So how about this relatively simple partial revert to sort the problem.
> 
> ---
> Subject: x86/mm/cpa: Fix cpa_flush_array() TLB invalidation
> 
> In commit:
> 
>    a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")
> 
> I misread the cpa array code and incorrectly used
> tlb_flush_kernel_range(), resulting in missing TLB flushes and
> consequent failures.
> 
> Instead do a full invalidate in this case -- for now.
> 
> Fixes: a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")
> Reported-by: "StDenis, Tom" <Tom.StDenis@amd.com>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
> ---
>   arch/x86/mm/pageattr.c | 24 ++++++++++++++++--------
>   1 file changed, 16 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
> index bac35001d896..61bc7d1800d7 100644
> --- a/arch/x86/mm/pageattr.c
> +++ b/arch/x86/mm/pageattr.c
> @@ -285,20 +285,16 @@ static void cpa_flush_all(unsigned long cache)
>   	on_each_cpu(__cpa_flush_all, (void *) cache, 1);
>   }
>   
> -static bool __cpa_flush_range(unsigned long start, int numpages, int cache)
> +static bool __inv_flush_all(int cache)
>   {
>   	BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
>   
> -	WARN_ON(PAGE_ALIGN(start) != start);
> -
>   	if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {
>   		cpa_flush_all(cache);
>   		return true;
>   	}
>   
> -	flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);
> -
> -	return !cache;
> +	return false;
>   }
>   
>   static void cpa_flush_range(unsigned long start, int numpages, int cache)
> @@ -306,7 +302,14 @@ static void cpa_flush_range(unsigned long start, int numpages, int cache)
>   	unsigned int i, level;
>   	unsigned long addr;
>   
> -	if (__cpa_flush_range(start, numpages, cache))
> +	WARN_ON(PAGE_ALIGN(start) != start);
> +
> +	if (__inv_flush_all(cache))
> +		return;
> +
> +	flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);
> +
> +	if (!cache)
>   		return;
>   
>   	/*
> @@ -332,7 +335,12 @@ static void cpa_flush_array(unsigned long baddr, unsigned long *start,
>   {
>   	unsigned int i, level;
>   
> -	if (__cpa_flush_range(baddr, numpages, cache))
> +	if (__inv_flush_all(cache))
> +		return;
> +
> +	flush_tlb_all();
> +
> +	if (!cache)
>   		return;
>   
>   	/*
> 

Re: [PATCH 0/4] x86/mm/cpa: Fix cpa-array TLB invalidation

[StDenis, Tom]

Hi Peter,

Good news is that I got our opengl test running on your x86/mm branch. 
The commit a2b4306c50b5de2ca955cd73ac57c2ac6426ee15 (current tip of 
x86/mm) is good.  For sanity I jumped back and found  this commit
a2aa52ab16efbee40ad118ebac4a5e438f5b43ee doesn't work.

Thanks,
Tom



On 2018-12-03 2:26 p.m., Tom St Denis wrote:
> Hi Peter,
> 
> After updating my UMDs (mesa/etc) over the weekend I cannot reproduce 
> the bug to begin with.  I'll try jumping directly to the intersection 
> and see if I can reproduce the fault there otherwise I'll have to 
> rollback my umds.
> 
> Hopefully I can test this tomorrow.
> 
> Tom
> 
> On 2018-12-03 10:41 a.m., Peter Zijlstra wrote:
>> On Fri, Nov 30, 2018 at 04:19:46PM +0000, StDenis, Tom wrote:
>>> NAK I get a failure in TTM on init with your x86/mm branch (see attached
>>> dmesg).
>>
>> So the good news is that with some additional self-tests I can trivially
>> reproduce this. The bad news is that an otherwise straight forward
>> cleanup seems to make CPA horribly mad at me.
>>
>> And since we're somewhat late in the release cycle, I suppose we should
>> do the simple thing first, and then I can try and figure out this CPA
>> mess later.
>>
>> So how about this relatively simple partial revert to sort the problem.
>>
>> ---
>> Subject: x86/mm/cpa: Fix cpa_flush_array() TLB invalidation
>>
>> In commit:
>>
>>    a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")
>>
>> I misread the cpa array code and incorrectly used
>> tlb_flush_kernel_range(), resulting in missing TLB flushes and
>> consequent failures.
>>
>> Instead do a full invalidate in this case -- for now.
>>
>> Fixes: a7295fd53c39 ("x86/mm/cpa: Use flush_tlb_kernel_range()")
>> Reported-by: "StDenis, Tom" <Tom.StDenis@amd.com>
>> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
>> ---
>>   arch/x86/mm/pageattr.c | 24 ++++++++++++++++--------
>>   1 file changed, 16 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
>> index bac35001d896..61bc7d1800d7 100644
>> --- a/arch/x86/mm/pageattr.c
>> +++ b/arch/x86/mm/pageattr.c
>> @@ -285,20 +285,16 @@ static void cpa_flush_all(unsigned long cache)
>>       on_each_cpu(__cpa_flush_all, (void *) cache, 1);
>>   }
>> -static bool __cpa_flush_range(unsigned long start, int numpages, int 
>> cache)
>> +static bool __inv_flush_all(int cache)
>>   {
>>       BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
>> -    WARN_ON(PAGE_ALIGN(start) != start);
>> -
>>       if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {
>>           cpa_flush_all(cache);
>>           return true;
>>       }
>> -    flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);
>> -
>> -    return !cache;
>> +    return false;
>>   }
>>   static void cpa_flush_range(unsigned long start, int numpages, int 
>> cache)
>> @@ -306,7 +302,14 @@ static void cpa_flush_range(unsigned long start, 
>> int numpages, int cache)
>>       unsigned int i, level;
>>       unsigned long addr;
>> -    if (__cpa_flush_range(start, numpages, cache))
>> +    WARN_ON(PAGE_ALIGN(start) != start);
>> +
>> +    if (__inv_flush_all(cache))
>> +        return;
>> +
>> +    flush_tlb_kernel_range(start, start + PAGE_SIZE * numpages);
>> +
>> +    if (!cache)
>>           return;
>>       /*
>> @@ -332,7 +335,12 @@ static void cpa_flush_array(unsigned long baddr, 
>> unsigned long *start,
>>   {
>>       unsigned int i, level;
>> -    if (__cpa_flush_range(baddr, numpages, cache))
>> +    if (__inv_flush_all(cache))
>> +        return;
>> +
>> +    flush_tlb_all();
>> +
>> +    if (!cache)
>>           return;
>>       /*
>>
>