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From: Marc Zyngier <maz@kernel.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Mark Rutland <mark.rutland@arm.com>,
	julien.thierry.kdev@gmail.com,
	Douglas Anderson <dianders@chromium.org>,
	Daniel Thompson <daniel.thompson@linaro.org>,
	Jason Wessel <jason.wessel@windriver.com>,
	Masayoshi Mizuma <msys.mizuma@gmail.com>,
	ito-yuichi@fujitsu.com, kgdb-bugreport@lists.sourceforge.net,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 5/5] arm64: ipi_nmi: Add support for NMI backtrace
Date: Wed, 21 Oct 2020 11:32:00 +0100	[thread overview]
Message-ID: <ebf30013b05e8d038a63fe189f250b4b@kernel.org> (raw)
In-Reply-To: <CAFA6WYMe02J6Laa0PWDW4849KGnw8Hu2H5d6UfppeaaE4-Z0vw@mail.gmail.com>

On 2020-10-20 10:13, Sumit Garg wrote:
> On Mon, 19 Oct 2020 at 17:50, Marc Zyngier <maz@kernel.org> wrote:
>> 
>> On 2020-10-14 12:12, Sumit Garg wrote:
>> > Enable NMI backtrace support on arm64 using IPI turned as an NMI
>> > leveraging pseudo NMIs support. It is now possible for users to get a
>> > backtrace of a CPU stuck in hard-lockup using magic SYSRQ.
>> >
>> > Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
>> > ---
>> >  arch/arm64/include/asm/irq.h |  6 ++++++
>> >  arch/arm64/kernel/ipi_nmi.c  | 12 +++++++++++-
>> >  2 files changed, 17 insertions(+), 1 deletion(-)
>> >
>> > diff --git a/arch/arm64/include/asm/irq.h
>> > b/arch/arm64/include/asm/irq.h
>> > index b2b0c64..e840bf1 100644
>> > --- a/arch/arm64/include/asm/irq.h
>> > +++ b/arch/arm64/include/asm/irq.h
>> > @@ -6,6 +6,12 @@
>> >
>> >  #include <asm-generic/irq.h>
>> >
>> > +#ifdef CONFIG_SMP
>> > +extern void arch_trigger_cpumask_backtrace(const cpumask_t *mask,
>> > +                                        bool exclude_self);
>> > +#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
>> > +#endif
>> > +
>> >  struct pt_regs;
>> >
>> >  static inline int nr_legacy_irqs(void)
>> > diff --git a/arch/arm64/kernel/ipi_nmi.c b/arch/arm64/kernel/ipi_nmi.c
>> > index e0a9e03..e1dc19d 100644
>> > --- a/arch/arm64/kernel/ipi_nmi.c
>> > +++ b/arch/arm64/kernel/ipi_nmi.c
>> > @@ -9,6 +9,7 @@
>> >  #include <linux/interrupt.h>
>> >  #include <linux/irq.h>
>> >  #include <linux/kgdb.h>
>> > +#include <linux/nmi.h>
>> >  #include <linux/smp.h>
>> >
>> >  #include <asm/nmi.h>
>> > @@ -25,12 +26,21 @@ void arch_send_call_nmi_func_ipi_mask(cpumask_t
>> > *mask)
>> >       __ipi_send_mask(ipi_desc, mask);
>> >  }
>> >
>> > +void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool
>> > exclude_self)
>> > +{
>> > +     nmi_trigger_cpumask_backtrace(mask, exclude_self,
>> > +                                   arch_send_call_nmi_func_ipi_mask);
>> > +}
>> > +
>> >  static irqreturn_t ipi_nmi_handler(int irq, void *data)
>> >  {
>> >       unsigned int cpu = smp_processor_id();
>> >
>> > -     ipi_kgdb_nmicallback(cpu, get_irq_regs());
>> > +     if (nmi_cpu_backtrace(get_irq_regs()))
>> > +             goto out;
>> >
>> > +     ipi_kgdb_nmicallback(cpu, get_irq_regs());
>> > +out:
>> >       return IRQ_HANDLED;
>> >  }
>> 
>> Can't you have *both* a request for a backtrace and a KGDB call?
>> It really shouldn't be either/or. It also outlines how well shared
>> interrupts work with edge triggered signalling...
> 
> Unfortunately, NMIs doesn't seem to support shared mode [1].

You are totally missing the point: shared interrupts *cannot* work
reliably with edge signalling. What I am saying here is that you need
implement the sharing yourself in this function.

         M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2020-10-21 10:32 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-14 11:12 [PATCH v5 0/5] arm64: Add framework to turn an IPI as NMI Sumit Garg
2020-10-14 11:12 ` [PATCH v5 1/5] arm64: Add framework to turn " Sumit Garg
2020-10-15  1:15   ` Masayoshi Mizuma
2020-10-19 11:37   ` Marc Zyngier
2020-10-20  6:43     ` Sumit Garg
2020-10-20 10:08       ` Marc Zyngier
2020-10-20 11:22         ` Sumit Garg
2020-10-20 12:25           ` Daniel Thompson
2020-10-20 12:32             ` Marc Zyngier
2020-10-21  5:22               ` Sumit Garg
2020-10-21 10:27           ` Marc Zyngier
2020-10-22 11:52             ` Sumit Garg
2020-10-19 11:56   ` Marc Zyngier
2020-10-20  7:07     ` Sumit Garg
2020-10-14 11:12 ` [PATCH v5 2/5] irqchip/gic-v3: Enable support for SGIs to act as NMIs Sumit Garg
2020-10-15  1:16   ` Masayoshi Mizuma
2020-10-19 12:07   ` Marc Zyngier
2020-10-20  7:24     ` Sumit Garg
2020-10-14 11:12 ` [PATCH v5 3/5] arm64: smp: Allocate and setup IPI as NMI Sumit Garg
2020-10-15  1:16   ` Masayoshi Mizuma
2020-10-19 11:59   ` Marc Zyngier
2020-10-20  7:16     ` Sumit Garg
2020-10-14 11:12 ` [PATCH v5 4/5] arm64: kgdb: Round up cpus using " Sumit Garg
2020-10-19 12:15   ` Marc Zyngier
2020-10-20  8:51     ` Sumit Garg
2020-10-14 11:12 ` [PATCH v5 5/5] arm64: ipi_nmi: Add support for NMI backtrace Sumit Garg
2020-10-15  1:17   ` Masayoshi Mizuma
2020-10-19 12:20   ` Marc Zyngier
2020-10-20  9:13     ` Sumit Garg
2020-10-21 10:32       ` Marc Zyngier [this message]
2020-10-21 11:28         ` Sumit Garg

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