From: Ming Qian <ming.qian@nxp.com>
To: mchehab@kernel.org, shawnguo@kernel.org, robh+dt@kernel.org,
s.hauer@pengutronix.de
Cc: hverkuil-cisco@xs4all.nl, kernel@pengutronix.de,
festevam@gmail.com, linux-imx@nxp.com, aisheng.dong@nxp.com,
linux-media@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 02/13] media:Add nt8 and nt10 video format.
Date: Mon, 13 Sep 2021 17:11:04 +0800 [thread overview]
Message-ID: <ed68bb2ba3d3491ff508cce482303ad9485b8c09.1631521295.git.ming.qian@nxp.com> (raw)
In-Reply-To: <cover.1631521295.git.ming.qian@nxp.com>
NT8 is 8-bit tiled nv12 format used by amphion decoder.
NT10 is 10-bit tiled format used by amphion decoder.
The tile size is 8x128
Signed-off-by: Ming Qian <ming.qian@nxp.com>
Signed-off-by: Shijie Qin <shijie.qin@nxp.com>
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
---
.../userspace-api/media/v4l/pixfmt-yuv-planar.rst | 15 +++++++++++++++
drivers/media/v4l2-core/v4l2-ioctl.c | 2 ++
include/uapi/linux/videodev2.h | 4 ++++
3 files changed, 21 insertions(+)
diff --git a/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst
index 090c091affd2..ce3419d95691 100644
--- a/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst
+++ b/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst
@@ -254,6 +254,8 @@ of the luma plane.
.. _V4L2-PIX-FMT-NV12MT:
.. _V4L2-PIX-FMT-NV12MT-16X16:
+.. _V4L2_PIX_FMT_NV12_8L128:
+.. _V4L2_PIX_FMT_NV12_10BE_8L128:
NV12MT and MV12MT_16X16
-----------------------
@@ -276,6 +278,19 @@ If the vertical resolution is an odd number of macroblocks, the last row of
macroblocks is stored in linear order. The layouts of the luma and chroma
planes are identical.
+``V4L2_PIX_FMT_NV12_8L128`` stores pixel in 2D 8x128 tiles, and stores
+tiles linearly in memory. The line stride must be aligned to a multiple of 256.
+The image height must be aligned to a multiple of 128. The layouts of the
+luma and chroma planes are identical.
+
+``V4L2_PIX_FMT_NV12_10BE_8L128`` stores 10 bits pixel in 2D 8x128 tiles,
+and stores tiles linearly in memory. the data is arranged at the big end.
+The line stride must be aligned to a multiple of 256 bytes. The image
+height must be aligned to a multiple of 128. The layouts of the luma
+and chroma planes are identical. Note the tile size is 8bytes multiplied
+by 128 bytes, it means that the low bits and high bits of one pixel
+may be in differnt tiles.
+
.. _nv12mt:
.. kernel-figure:: nv12mt.svg
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c
index 05d5db3d85e5..22f97a1cfbeb 100644
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
@@ -1367,6 +1367,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
case V4L2_META_FMT_VIVID: descr = "Vivid Metadata"; break;
case V4L2_META_FMT_RK_ISP1_PARAMS: descr = "Rockchip ISP1 3A Parameters"; break;
case V4L2_META_FMT_RK_ISP1_STAT_3A: descr = "Rockchip ISP1 3A Statistics"; break;
+ case V4L2_PIX_FMT_NV12_8L128: descr = "Y/CbCr 4:2:0 (8x128 Linear)"; break;
+ case V4L2_PIX_FMT_NV12_10BE_8L128: descr = "Y/CbCr 4:2:0 10BE(8x128 Linear)"; break;
default:
/* Compressed formats */
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
index 9260791b8438..167c0e40ec06 100644
--- a/include/uapi/linux/videodev2.h
+++ b/include/uapi/linux/videodev2.h
@@ -627,6 +627,10 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_YUV444M v4l2_fourcc('Y', 'M', '2', '4') /* 24 YUV444 planar */
#define V4L2_PIX_FMT_YVU444M v4l2_fourcc('Y', 'M', '4', '2') /* 24 YVU444 planar */
+/* Tiled YUV formats */
+#define V4L2_PIX_FMT_NV12_8L128 v4l2_fourcc('N', 'A', '1', '2') /* Y/CbCr 4:2:0 8x128 tiles */
+#define V4L2_PIX_FMT_NV12_10BE_8L128 v4l2_fourcc('N', 'T', '1', '2') /* Y/CbCr 4:2:0 10-bit 8x128 tiles */
+
/* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */
#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */
#define V4L2_PIX_FMT_SGBRG8 v4l2_fourcc('G', 'B', 'R', 'G') /* 8 GBGB.. RGRG.. */
--
2.32.0
next prev parent reply other threads:[~2021-09-13 9:12 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-13 9:11 [PATCH v9 00/13] amphion video decoder/encoder driver Ming Qian
2021-09-13 9:11 ` [PATCH v9 01/13] dt-bindings: media: amphion: add amphion video codec bindings Ming Qian
2021-09-13 9:11 ` Ming Qian [this message]
2021-09-13 9:11 ` [PATCH v9 03/13] media: amphion: add amphion vpu device driver Ming Qian
2021-09-13 9:11 ` [PATCH v9 04/13] media: amphion: add vpu core driver Ming Qian
2021-09-22 13:10 ` Nicolas Dufresne
2021-09-23 10:32 ` [EXT] " Ming Qian
2021-09-23 14:27 ` Nicolas Dufresne
2021-09-24 1:52 ` [EXT] " Ming Qian
2021-09-13 9:11 ` [PATCH v9 05/13] media: amphion: implement vpu core communication based on mailbox Ming Qian
2021-09-13 9:11 ` [PATCH v9 06/13] media: amphion: add vpu v4l2 m2m support Ming Qian
2021-09-23 14:39 ` Nicolas Dufresne
2021-09-24 1:58 ` [EXT] " Ming Qian
2021-09-13 9:11 ` [PATCH v9 07/13] media: amphion: add v4l2 m2m vpu encoder stateful driver Ming Qian
2021-09-23 14:22 ` Nicolas Dufresne
2021-09-24 1:47 ` [EXT] " Ming Qian
2021-09-13 9:11 ` [PATCH v9 08/13] media: amphion: add v4l2 m2m vpu decoder " Ming Qian
2021-09-13 9:11 ` [PATCH v9 09/13] media: amphion: implement windsor encoder rpc interface Ming Qian
2021-09-13 9:11 ` [PATCH v9 10/13] media: amphion: implement malone decoder " Ming Qian
2021-09-13 9:11 ` [PATCH v9 11/13] ARM64: dts: freescale: imx8q: add imx vpu codec entries Ming Qian
2021-09-22 12:55 ` Nicolas Dufresne
2021-09-23 10:31 ` [EXT] " Ming Qian
2021-09-23 13:27 ` Nicolas Dufresne
2021-09-13 9:11 ` [PATCH v9 12/13] firmware: imx: scu-pd: imx8q: add vpu mu resources Ming Qian
2021-09-13 9:11 ` [PATCH v9 13/13] MAINTAINERS: add AMPHION VPU CODEC V4L2 driver entry Ming Qian
2021-09-22 14:13 ` [PATCH v9 00/13] amphion video decoder/encoder driver Nicolas Dufresne
2021-09-23 10:45 ` [EXT] " Ming Qian
2021-09-23 13:33 ` Nicolas Dufresne
2021-09-24 1:43 ` Ming Qian
2021-10-11 9:12 ` Hans Verkuil
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