[PATCH 0/5] arm: bcmbca: introduce the bcmbca architecture and 47622 SOC

[PATCH 0/5] arm: bcmbca: introduce the bcmbca architecture and 47622 SOC

[William Zhang]

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This change introduces Broadcom's ARCH_BCMBCA architecture for
armv7 and armv8 based Broadband SoCs. We expect to send additional
patches for each SoC in the near future.

The first SoC supported in this arch is Broadcom's ARM A7 based 47622
SOC. The initial support includes a bare-bone dts for quad core ARM A7
with a ARM PL011 uart. Linux kernel image can be built with
multi_v7_defconfig.


William Zhang (5):
  dt-bindings: arm: add bcmbca device tree binding document
  arm: bcmbca: add arch bcmbca machine entry
  ARM: dts: add dts files for bcmbca soc 47622
  MAINTAINERS: update MAINTAINERS file
  ARM: multi_v7_defconfig: enable CONFIG_ARCH_BCMBCA in armv7 defconfig

 .../bindings/arm/bcm/brcm,bcmbca.yaml         |  33 +++++
 MAINTAINERS                                   |  14 ++
 arch/arm/boot/dts/Makefile                    |   2 +
 arch/arm/boot/dts/bcm47622.dtsi               | 126 ++++++++++++++++++
 arch/arm/boot/dts/bcm947622.dts               |  30 +++++
 arch/arm/configs/multi_v7_defconfig           |   1 +
 arch/arm/mach-bcm/Kconfig                     |  12 ++
 7 files changed, 218 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
 create mode 100644 arch/arm/boot/dts/bcm47622.dtsi
 create mode 100644 arch/arm/boot/dts/bcm947622.dts

-- 
2.17.1


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[PATCH 1/5] dt-bindings: arm: add bcmbca device tree binding document

[William Zhang]

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Add arch bcmbca device tree binding document for Broadcom ARM based
broadband SoC chipsets. In this change, only BCM47622 is added. Other
chipsets will be added in the future.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
---

 .../bindings/arm/bcm/brcm,bcmbca.yaml         | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml

diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
new file mode 100644
index 000000000000..5fb455840417
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/bcm/brcm,bcmbca.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom Broadband SoC device tree bindings
+
+description:
+  Broadcom Broadband SoCs include family of high performance DSL/PON/Wireless
+  chips that can be used as home gateway, router and WLAN AP for residential,
+  enterprise and carrier applications.
+
+maintainers:
+  - William Zhang <william.zhang@broadcom.com>
+  - Anand Gore <anand.gore@broadcom.com>
+  - Kursad Oney <kursad.oney@broadcom.com>
+
+properties:
+  $nodename:
+    const: '/'
+  compatible:
+    oneOf:
+      - description: BCM47622 based boards
+        items:
+          - enum:
+              - brcm,bcm947622
+          - const: brcm,bcm47622
+          - const: brcm,bcmbca
+
+additionalProperties: true
+
+...
-- 
2.17.1


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[PATCH 2/5] arm: bcmbca: add arch bcmbca machine entry

[William Zhang]

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Update mach-bcm Kconfig to add ARCH_BCMBCA config and select the
required configs for Broadcom Broadband SoC chipsets

Signed-off-by: William Zhang <william.zhang@broadcom.com>
---

 arch/arm/mach-bcm/Kconfig | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 8db655c3e321..f73a056bf560 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -218,4 +218,16 @@ config ARCH_BRCMSTB
 	  This enables support for Broadcom ARM-based set-top box chipsets,
 	  including the 7445 family of chips.
 
+config ARCH_BCMBCA
+	bool "Broadcom Broadband SoC"
+	depends on ARCH_MULTI_V7
+	select ARM_AMBA
+	select ARM_GIC
+	select HAVE_ARM_ARCH_TIMER
+	help
+	  Say Y if you intend to run the kernel on a Broadcom Broadband ARM-based
+	  BCA chipset.
+
+	  This enables support for Broadcom BCA ARM-based broadband chipsets,
+	  including the DSL, PON and Wireless family of chips.
 endif
-- 
2.17.1


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[PATCH 3/5] ARM: dts: add dts files for bcmbca soc 47622

[William Zhang]

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Add dts for ARMv7 based broadband SoC BCM47622. bcm47622.dtsi is the
SoC description dts header and bcm947622.dts is a simple dts file for
Broadcom BCM947622 Reference board that only enable the UART port.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
---

 arch/arm/boot/dts/Makefile      |   2 +
 arch/arm/boot/dts/bcm47622.dtsi | 126 ++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/bcm947622.dts |  30 ++++++++
 3 files changed, 158 insertions(+)
 create mode 100644 arch/arm/boot/dts/bcm47622.dtsi
 create mode 100644 arch/arm/boot/dts/bcm947622.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7c16f8a2b738..ff0054d55590 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -179,6 +179,8 @@ dtb-$(CONFIG_ARCH_BERLIN) += \
 	berlin2q-marvell-dmp.dtb
 dtb-$(CONFIG_ARCH_BRCMSTB) += \
 	bcm7445-bcm97445svmb.dtb
+dtb-$(CONFIG_ARCH_BCMBCA) += \
+	bcm947622.dtb
 dtb-$(CONFIG_ARCH_CLPS711X) += \
 	ep7211-edb7211.dtb
 dtb-$(CONFIG_ARCH_DAVINCI) += \
diff --git a/arch/arm/boot/dts/bcm47622.dtsi b/arch/arm/boot/dts/bcm47622.dtsi
new file mode 100644
index 000000000000..b41116dbfa6a
--- /dev/null
+++ b/arch/arm/boot/dts/bcm47622.dtsi
@@ -0,0 +1,126 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	compatible = "brcm,bcm47622";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	interrupt-parent = <&gic>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		CA7_0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x0>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+
+		CA7_1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x1>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+		CA7_2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x2>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+		CA7_3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x3>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+		L2_0: l2-cache0 {
+			compatible = "cache";
+		};
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+		arm,cpu-registers-not-fw-configured;
+	};
+
+	pmu: pmu {
+		compatible = "arm,cortex-a7-pmu";
+		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&CA7_0>, <&CA7_1>,
+			<&CA7_2>, <&CA7_3>;
+	};
+
+	clocks: clocks {
+		periph_clk: periph_clk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <200000000>;
+		};
+		uart_clk: uart_clk {
+			compatible = "fixed-factor-clock";
+			#clock-cells = <0>;
+			clocks = <&periph_clk>;
+			clock-div = <4>;
+			clock-mult = <1>;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+		cpu_off = <1>;
+		cpu_on = <2>;
+	};
+
+	axi@81000000 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x81000000 0x818000>;
+
+		gic: interrupt-controller@1000 {
+			compatible = "arm,cortex-a7-gic";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			interrupt-controller;
+			reg = <0x1000 0x1000>,
+				<0x2000 0x2000>;
+		};
+	};
+
+	periph-bus@ff800000 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0xff800000 0x800000>;
+
+		uart0: serial@12000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x12000 0x1000>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&uart_clk>, <&uart_clk>;
+			clock-names = "uartclk", "apb_pclk";
+			status = "disabled";
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/bcm947622.dts b/arch/arm/boot/dts/bcm947622.dts
new file mode 100644
index 000000000000..6f083724ab8e
--- /dev/null
+++ b/arch/arm/boot/dts/bcm947622.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm47622.dtsi"
+
+/ {
+	model = "Broadcom BCM947622 Reference Board";
+	compatible = "brcm,bcm947622", "brcm,bcm47622", "brcm,bcmbca";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x08000000>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
-- 
2.17.1


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[PATCH 4/5] MAINTAINERS: update MAINTAINERS file

[William Zhang]

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Add maintainters, SCM tree, files and directories for the new BCMBCA
arch. Only add 47622 for this change and will update in the future
when more SoCs are supported.

Signed-off-by: William Zhang <william.zhang@broadcom.com>
---

 MAINTAINERS | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 61d9f114c37f..20f24577f6f2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3740,6 +3740,20 @@ F:	drivers/net/dsa/bcm_sf2*
 F:	include/linux/dsa/brcm.h
 F:	include/linux/platform_data/b53.h
 
+BROADCOM BCMBCA ARM ARCHITECTURE
+M:	William Zhang <william.zhang@broadcom.com>
+M:	Anand Gore <anand.gore@broadcom.com>
+M:	Kursad Oney <kursad.oney@broadcom.com>
+M:	bcm-kernel-feedback-list@broadcom.com
+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S:	Maintained
+T:	git git://github.com/broadcom/stblinux.git
+F:	Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+F:	arch/arm/boot/dts/bcm47622.dtsi
+F:	arch/arm/boot/dts/bcm947622.dts
+N:	bcmbca
+N:	bcm[9]?47622
+
 BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
 M:	Nicolas Saenz Julienne <nsaenz@kernel.org>
 L:	bcm-kernel-feedback-list@broadcom.com
-- 
2.17.1


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[PATCH 5/5] ARM: multi_v7_defconfig: enable CONFIG_ARCH_BCMBCA in armv7 defconfig

[William Zhang]

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Enable CONFIG_ARCH_BCMBCA in multi_v7_defconfig. This config can be
used to build a basic kernel for BCM47622 booting to console.

Signed-off-by: William Zhang <william.zhang@broadcom.com>

---

 arch/arm/configs/multi_v7_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 6e0c8c19b35c..8d333560bbca 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -29,6 +29,7 @@ CONFIG_ARCH_BCM2835=y
 CONFIG_ARCH_BCM_53573=y
 CONFIG_ARCH_BCM_63XX=y
 CONFIG_ARCH_BRCMSTB=y
+CONFIG_ARCH_BCMBCA=y
 CONFIG_ARCH_BERLIN=y
 CONFIG_MACH_BERLIN_BG2=y
 CONFIG_MACH_BERLIN_BG2CD=y
-- 
2.17.1


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Re: [PATCH 3/5] ARM: dts: add dts files for bcmbca soc 47622

[Krzysztof Kozlowski]

On 11/04/2022 19:28, William Zhang wrote:
> Add dts for ARMv7 based broadband SoC BCM47622. bcm47622.dtsi is the
> SoC description dts header and bcm947622.dts is a simple dts file for
> Broadcom BCM947622 Reference board that only enable the UART port.
> 


Thank you for your patch. There is something to discuss/improve.

> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
> +	compatible = "brcm,bcm47622";

This does not match your bindings. Even if it is not used.

> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +
> +	interrupt-parent = <&gic>;
> +
> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		CA7_0: cpu@0 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a7";
> +			reg = <0x0>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +
> +		CA7_1: cpu@1 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a7";
> +			reg = <0x1>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +		CA7_2: cpu@2 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a7";
> +			reg = <0x2>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +		CA7_3: cpu@3 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a7";
> +			reg = <0x3>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +		L2_0: l2-cache0 {
> +			compatible = "cache";
> +		};
> +	};
> +
> +	timer {
> +		compatible = "arm,armv7-timer";
> +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> +		arm,cpu-registers-not-fw-configured;
> +	};
> +
> +	pmu: pmu {
> +		compatible = "arm,cortex-a7-pmu";
> +		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> +			<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
> +			<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> +			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-affinity = <&CA7_0>, <&CA7_1>,
> +			<&CA7_2>, <&CA7_3>;
> +	};
> +
> +	clocks: clocks {
> +		periph_clk: periph_clk {

No underscores in node names.

> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <200000000>;
> +		};
> +		uart_clk: uart_clk {
> +			compatible = "fixed-factor-clock";
> +			#clock-cells = <0>;
> +			clocks = <&periph_clk>;
> +			clock-div = <4>;
> +			clock-mult = <1>;
> +		};
> +	};
> +
> +	psci {
> +		compatible = "arm,psci-0.2";
> +		method = "smc";
> +		cpu_off = <1>;
> +		cpu_on = <2>;
> +	};
> +
> +	axi@81000000 {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0 0x81000000 0x818000>;
> +
> +		gic: interrupt-controller@1000 {
> +			compatible = "arm,cortex-a7-gic";
> +			#interrupt-cells = <3>;
> +			#address-cells = <0>;
> +			interrupt-controller;
> +			reg = <0x1000 0x1000>,
> +				<0x2000 0x2000>;
> +		};
> +	};
> +
> +	periph-bus@ff800000 {

just "bus" to be generic?



Best regards,
Krzysztof

Re: [PATCH 1/5] dt-bindings: arm: add bcmbca device tree binding document

[Krzysztof Kozlowski]

On 11/04/2022 19:28, William Zhang wrote:
> Add arch bcmbca device tree binding document for Broadcom ARM based
> broadband SoC chipsets. In this change, only BCM47622 is added. Other
> chipsets will be added in the future.
> 
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
> ---
> 


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

Re: [PATCH 3/5] ARM: dts: add dts files for bcmbca soc 47622

[William Zhang]

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Hi Krzysztof,

On 4/12/22 04:27, Krzysztof Kozlowski wrote:
> On 11/04/2022 19:28, William Zhang wrote:
>> Add dts for ARMv7 based broadband SoC BCM47622. bcm47622.dtsi is the
>> SoC description dts header and bcm947622.dts is a simple dts file for
>> Broadcom BCM947622 Reference board that only enable the UART port.
>>
> 
> 
> Thank you for your patch. There is something to discuss/improve.
> 
>> + */
>> +
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include <dt-bindings/interrupt-controller/irq.h>
>> +
>> +/ {
>> +	compatible = "brcm,bcm47622";
> 
> This does not match your bindings. Even if it is not used.
Did I miss anything? But it matches one of the compatible strings in 
brcm,bcmbca.yaml.

> 
>> +	#address-cells = <1>;
>> +	#size-cells = <1>;
>> +
>> +	interrupt-parent = <&gic>;
>> +
>> +	cpus {
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		CA7_0: cpu@0 {
>> +			device_type = "cpu";
>> +			compatible = "arm,cortex-a7";
>> +			reg = <0x0>;
>> +			next-level-cache = <&L2_0>;
>> +			enable-method = "psci";
>> +		};
>> +
>> +		CA7_1: cpu@1 {
>> +			device_type = "cpu";
>> +			compatible = "arm,cortex-a7";
>> +			reg = <0x1>;
>> +			next-level-cache = <&L2_0>;
>> +			enable-method = "psci";
>> +		};
>> +		CA7_2: cpu@2 {
>> +			device_type = "cpu";
>> +			compatible = "arm,cortex-a7";
>> +			reg = <0x2>;
>> +			next-level-cache = <&L2_0>;
>> +			enable-method = "psci";
>> +		};
>> +		CA7_3: cpu@3 {
>> +			device_type = "cpu";
>> +			compatible = "arm,cortex-a7";
>> +			reg = <0x3>;
>> +			next-level-cache = <&L2_0>;
>> +			enable-method = "psci";
>> +		};
>> +		L2_0: l2-cache0 {
>> +			compatible = "cache";
>> +		};
>> +	};
>> +
>> +	timer {
>> +		compatible = "arm,armv7-timer";
>> +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> +			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> +			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> +			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>> +		arm,cpu-registers-not-fw-configured;
>> +	};
>> +
>> +	pmu: pmu {
>> +		compatible = "arm,cortex-a7-pmu";
>> +		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
>> +			<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
>> +			<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
>> +			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
>> +		interrupt-affinity = <&CA7_0>, <&CA7_1>,
>> +			<&CA7_2>, <&CA7_3>;
>> +	};
>> +
>> +	clocks: clocks {
>> +		periph_clk: periph_clk {
> 
> No underscores in node names.
Will update

> 
>> +			compatible = "fixed-clock";
>> +			#clock-cells = <0>;
>> +			clock-frequency = <200000000>;
>> +		};
>> +		uart_clk: uart_clk {
>> +			compatible = "fixed-factor-clock";
>> +			#clock-cells = <0>;
>> +			clocks = <&periph_clk>;
>> +			clock-div = <4>;
>> +			clock-mult = <1>;
>> +		};
>> +	};
>> +
>> +	psci {
>> +		compatible = "arm,psci-0.2";
>> +		method = "smc";
>> +		cpu_off = <1>;
>> +		cpu_on = <2>;
>> +	};
>> +
>> +	axi@81000000 {
>> +		compatible = "simple-bus";
>> +		#address-cells = <1>;
>> +		#size-cells = <1>;
>> +		ranges = <0 0x81000000 0x818000>;
>> +
>> +		gic: interrupt-controller@1000 {
>> +			compatible = "arm,cortex-a7-gic";
>> +			#interrupt-cells = <3>;
>> +			#address-cells = <0>;
>> +			interrupt-controller;
>> +			reg = <0x1000 0x1000>,
>> +				<0x2000 0x2000>;
>> +		};
>> +	};
>> +
>> +	periph-bus@ff800000 {
> 
> just "bus" to be generic?
This node represents the peripheral bus in the soc. Would prefer to use 
the specific name unless it is not allowed by the linux dts.

> 
> 
> 
> Best regards,
> Krzysztof

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Re: [PATCH 3/5] ARM: dts: add dts files for bcmbca soc 47622

[Krzysztof Kozlowski]

On 12/04/2022 17:37, William Zhang wrote:
>>> +/ {
>>> +	compatible = "brcm,bcm47622";
>>
>> This does not match your bindings. Even if it is not used.
> Did I miss anything? But it matches one of the compatible strings in 
> brcm,bcmbca.yaml.

Your bindings expect that this compatible is followed with "brcm,bcmbca".

(...)

>>> +	periph-bus@ff800000 {
>>
>> just "bus" to be generic?
> This node represents the peripheral bus in the soc. Would prefer to use 
> the specific name unless it is not allowed by the linux dts.

It is allowed but the Devicetree spec explicitly asks for generic names
and gives example: bus ("2.2.2 Generic Names Recommendation"). Specific
names are discouraged.

Best regards,
Krzysztof

Re: [PATCH 4/5] MAINTAINERS: update MAINTAINERS file

[Joe Perches]

On Mon, 2022-04-11 at 10:28 -0700, William Zhang wrote:
> Add maintainters, SCM tree, files and directories for the new BCMBCA

typo of maintainers

> arch. Only add 47622 for this change and will update in the future
> when more SoCs are supported.
[]
> diff --git a/MAINTAINERS b/MAINTAINERS
[]
> @@ -3740,6 +3740,20 @@ F:	drivers/net/dsa/bcm_sf2*
>  F:	include/linux/dsa/brcm.h
>  F:	include/linux/platform_data/b53.h
>  
> +BROADCOM BCMBCA ARM ARCHITECTURE
> +M:	William Zhang <william.zhang@broadcom.com>
> +M:	Anand Gore <anand.gore@broadcom.com>
> +M:	Kursad Oney <kursad.oney@broadcom.com>
> +M:	bcm-kernel-feedback-list@broadcom.com

Unnamed exploders are not maintainers.

Maybe:

R:	Broadcom BCMBCA reviewers <bcm-kernel-feedback-list@broadcom.com>

> +L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
> +S:	Maintained
> +T:	git git://github.com/broadcom/stblinux.git
> +F:	Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
> +F:	arch/arm/boot/dts/bcm47622.dtsi
> +F:	arch/arm/boot/dts/bcm947622.dts
> +N:	bcmbca
> +N:	bcm[9]?47622

bcm9?47622 is simpler, though it doesn't seem this is actually useful.
Where is it actually used in files other than the ones already listed?

Re: [PATCH 4/5] MAINTAINERS: update MAINTAINERS file

[William Zhang]

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Hi Joe,

On 4/12/22 09:38, Joe Perches wrote:
> On Mon, 2022-04-11 at 10:28 -0700, William Zhang wrote:
>> Add maintainters, SCM tree, files and directories for the new BCMBCA
> 
> typo of maintainers
Thanks for catching that.

> 
>> arch. Only add 47622 for this change and will update in the future
>> when more SoCs are supported.
> []
>> diff --git a/MAINTAINERS b/MAINTAINERS
> []
>> @@ -3740,6 +3740,20 @@ F:	drivers/net/dsa/bcm_sf2*
>>   F:	include/linux/dsa/brcm.h
>>   F:	include/linux/platform_data/b53.h
>>   
>> +BROADCOM BCMBCA ARM ARCHITECTURE
>> +M:	William Zhang <william.zhang@broadcom.com>
>> +M:	Anand Gore <anand.gore@broadcom.com>
>> +M:	Kursad Oney <kursad.oney@broadcom.com>
>> +M:	bcm-kernel-feedback-list@broadcom.com
> 
> Unnamed exploders are not maintainers.
> 
> Maybe:
> 
> R:	Broadcom BCMBCA reviewers <bcm-kernel-feedback-list@broadcom.com>
Copied from other BCM entry in this file. It is mailing list which does 
not really need an name. And I guess it is better to be put under L as 
other BCM entry does.

> 
>> +L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
>> +S:	Maintained
>> +T:	git git://github.com/broadcom/stblinux.git
>> +F:	Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
>> +F:	arch/arm/boot/dts/bcm47622.dtsi
>> +F:	arch/arm/boot/dts/bcm947622.dts
>> +N:	bcmbca
>> +N:	bcm[9]?47622
> 
> bcm9?47622 is simpler, though it doesn't seem this is actually useful.
> Where is it actually used in files other than the ones already listed?
> 
We may have future changes for 47622.
> 

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Re: [PATCH 3/5] ARM: dts: add dts files for bcmbca soc 47622

[William Zhang]

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On 4/12/22 09:27, Krzysztof Kozlowski wrote:
> On 12/04/2022 17:37, William Zhang wrote:
>>>> +/ {
>>>> +	compatible = "brcm,bcm47622";
>>>
>>> This does not match your bindings. Even if it is not used.
>> Did I miss anything? But it matches one of the compatible strings in
>> brcm,bcmbca.yaml.
> 
> Your bindings expect that this compatible is followed with "brcm,bcmbca".
> 
> (...)
Thanks! My misunderstanding.
> 
>>>> +	periph-bus@ff800000 {
>>>
>>> just "bus" to be generic?
>> This node represents the peripheral bus in the soc. Would prefer to use
>> the specific name unless it is not allowed by the linux dts.
> 
> It is allowed but the Devicetree spec explicitly asks for generic names
> and gives example: bus ("2.2.2 Generic Names Recommendation"). Specific
> names are discouraged.
Will use bus.
> 
> Best regards,
> Krzysztof

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Re: [PATCH 4/5] MAINTAINERS: update MAINTAINERS file

[Joe Perches]

On Tue, 2022-04-12 at 11:37 -0700, William Zhang wrote:
> Hi Joe,
> 
> On 4/12/22 09:38, Joe Perches wrote:
> > On Mon, 2022-04-11 at 10:28 -0700, William Zhang wrote:
> > > Add maintainters, SCM tree, files and directories for the new BCMBCA
> > 
> > typo of maintainers
> Thanks for catching that.
> 
> > 
> > > arch. Only add 47622 for this change and will update in the future
> > > when more SoCs are supported.
> > []
> > > diff --git a/MAINTAINERS b/MAINTAINERS
> > []
> > > @@ -3740,6 +3740,20 @@ F:	drivers/net/dsa/bcm_sf2*
> > >   F:	include/linux/dsa/brcm.h
> > >   F:	include/linux/platform_data/b53.h
> > >   
> > > +BROADCOM BCMBCA ARM ARCHITECTURE
> > > +M:	William Zhang <william.zhang@broadcom.com>
> > > +M:	Anand Gore <anand.gore@broadcom.com>
> > > +M:	Kursad Oney <kursad.oney@broadcom.com>
> > > +M:	bcm-kernel-feedback-list@broadcom.com
> > 
> > Unnamed exploders are not maintainers.
> > 
> > Maybe:
> > 
> > R:	Broadcom BCMBCA reviewers <bcm-kernel-feedback-list@broadcom.com>
> Copied from other BCM entry in this file. It is mailing list which does 
> not really need an name. And I guess it is better to be put under L as 
> other BCM entry does.

I just sent a patch to convert all of these to R:

https://lore.kernel.org/lkml/04eb301f5b3adbefdd78e76657eff0acb3e3d87f.camel@perches.com/T/#u

Re: [PATCH 4/5] MAINTAINERS: update MAINTAINERS file

[William Zhang]

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On 4/12/22 11:40, Joe Perches wrote:
> On Tue, 2022-04-12 at 11:37 -0700, William Zhang wrote:
>> Hi Joe,
>>
>> On 4/12/22 09:38, Joe Perches wrote:
>>> On Mon, 2022-04-11 at 10:28 -0700, William Zhang wrote:
>>>> Add maintainters, SCM tree, files and directories for the new BCMBCA
>>>
>>> typo of maintainers
>> Thanks for catching that.
>>
>>>
>>>> arch. Only add 47622 for this change and will update in the future
>>>> when more SoCs are supported.
>>> []
>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> []
>>>> @@ -3740,6 +3740,20 @@ F:	drivers/net/dsa/bcm_sf2*
>>>>    F:	include/linux/dsa/brcm.h
>>>>    F:	include/linux/platform_data/b53.h
>>>>    
>>>> +BROADCOM BCMBCA ARM ARCHITECTURE
>>>> +M:	William Zhang <william.zhang@broadcom.com>
>>>> +M:	Anand Gore <anand.gore@broadcom.com>
>>>> +M:	Kursad Oney <kursad.oney@broadcom.com>
>>>> +M:	bcm-kernel-feedback-list@broadcom.com
>>>
>>> Unnamed exploders are not maintainers.
>>>
>>> Maybe:
>>>
>>> R:	Broadcom BCMBCA reviewers <bcm-kernel-feedback-list@broadcom.com>
>> Copied from other BCM entry in this file. It is mailing list which does
>> not really need an name. And I guess it is better to be put under L as
>> other BCM entry does.
> 
> I just sent a patch to convert all of these to R:
> 
> https://lore.kernel.org/lkml/04eb301f5b3adbefdd78e76657eff0acb3e3d87f.camel@perches.com/T/#u
> 
> 
Email crossed.  Just saw your patch. thanks!

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