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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: wei.fang@nxp.com, davem@davemloft.net, edumazet@google.com,
	kuba@kernel.org, pabeni@redhat.com, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, andrew@lunn.ch,
	f.fainelli@gmail.com, hkallweit1@gmail.com,
	linux@armlinux.org.uk
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next 1/2] dt-bindings: net: tja11xx: add nxp,refclk_in property
Date: Fri, 19 Aug 2022 12:14:01 +0300	[thread overview]
Message-ID: <f0f6e8af-4006-e0e8-544b-f2f892d79a1f@linaro.org> (raw)
In-Reply-To: <20220819074729.1496088-2-wei.fang@nxp.com>

On 19/08/2022 10:47, wei.fang@nxp.com wrote:
> From: Wei Fang <wei.fang@nxp.com>
> 
> TJA110x REF_CLK can be configured as interface reference clock
> intput or output when the RMII mode enabled. This patch add the
> property to make the REF_CLK can be configurable.
> 
> Signed-off-by: Wei Fang <wei.fang@nxp.com>
> ---
>  .../devicetree/bindings/net/nxp,tja11xx.yaml    | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
> index d51da24f3505..c51ee52033e8 100644
> --- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
> +++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
> @@ -31,6 +31,22 @@ patternProperties:
>          description:
>            The ID number for the child PHY. Should be +1 of parent PHY.
>  
> +      nxp,rmii_refclk_in:

No underscores in properties.

> +        type: boolean
> +        description: |
> +          The REF_CLK is provided for both transmitted and receivced data

typo: received

> +          in RMII mode. This clock signal is provided by the PHY and is
> +          typically derived from an external 25MHz crystal. Alternatively,
> +          a 50MHz clock signal generated by an external oscillator can be
> +          connected to pin REF_CLK. A third option is to connect a 25MHz
> +          clock to pin CLK_IN_OUT. So, the REF_CLK should be configured
> +          as input or output according to the actual circuit connection.
> +          If present, indicates that the REF_CLK will be configured as
> +          interface reference clock input when RMII mode enabled.
> +          If not present, the REF_CLK will be configured as interface
> +          reference clock output when RMII mode enabled.
> +          Only supported on TJA1100 and TJA1101.

Then disallow it on other variants.

Shouldn't this be just "clocks" property?


Best regards,
Krzysztof

  reply	other threads:[~2022-08-19  9:14 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-19  7:47 [PATCH net-next 0/2] add interface mode select and RMII wei.fang
2022-08-19  7:47 ` [PATCH net-next 1/2] dt-bindings: net: tja11xx: add nxp,refclk_in property wei.fang
2022-08-19  9:14   ` Krzysztof Kozlowski [this message]
2022-08-19  9:37     ` Wei Fang
2022-08-19 11:37       ` Krzysztof Kozlowski
2022-08-19 12:44         ` Andrew Lunn
2022-08-19 12:52           ` Krzysztof Kozlowski
2022-08-19  7:47 ` [PATCH net-next 2/2] net: phy: tja11xx: add interface mode and RMII REF_CLK support wei.fang
2022-08-19 12:50   ` Andrew Lunn
2022-08-22  1:16     ` Wei Fang

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