* [PATCH 1/2] arm64: dts: qcom: Correct "gpiio" typo in msm8996-pins
@ 2018-12-14 17:01 jakob.wuhrer
2018-12-14 17:01 ` [PATCH 2/2] arm64: dts: qcom: Add more msm8996 uarts jakob.wuhrer
2019-01-14 22:18 ` [PATCH 1/2] arm64: dts: qcom: Correct "gpiio" typo in msm8996-pins Stephen Boyd
0 siblings, 2 replies; 4+ messages in thread
From: jakob.wuhrer @ 2018-12-14 17:01 UTC (permalink / raw)
To: andy.gross, david.brown
Cc: Jakob Wuhrer, Rob Herring, Mark Rutland, linux-arm-msm,
linux-soc, devicetree, linux-kernel
From: Jakob Wuhrer <jakobwuhrer@airmail.cc>
gpiio5 is missspelt in msm8996-pins.dtsi, fix that.
Signed-off-by: Jakob Wuhrer <jakobwuhrer@airmail.cc>
---
arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
index c5c42e9..1d1f7f9 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
@@ -139,7 +139,7 @@
};
pinconf {
- pins = "gpio4", "gpiio5", "gpio6", "gpio7";
+ pins = "gpio4", "gpio5", "gpio6", "gpio7";
drive-strength = <2>;
bias-disable;
};
--
1.8.3.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] arm64: dts: qcom: Add more msm8996 uarts
2018-12-14 17:01 [PATCH 1/2] arm64: dts: qcom: Correct "gpiio" typo in msm8996-pins jakob.wuhrer
@ 2018-12-14 17:01 ` jakob.wuhrer
2019-01-12 16:22 ` Jakob Wuhrer
2019-01-14 22:18 ` [PATCH 1/2] arm64: dts: qcom: Correct "gpiio" typo in msm8996-pins Stephen Boyd
1 sibling, 1 reply; 4+ messages in thread
From: jakob.wuhrer @ 2018-12-14 17:01 UTC (permalink / raw)
To: andy.gross, david.brown
Cc: Jakob Wuhrer, Rob Herring, Mark Rutland, linux-arm-msm,
linux-soc, devicetree, linux-kernel
From: Jakob Wuhrer <jakobwuhrer@airmail.cc>
msm8996 has 12 uarts, but the devicetree only lists 3. Add the
pinmuxing and the main devicetree entries for the others.
Signed-off-by: Jakob Wuhrer <jakobwuhrer@airmail.cc>
---
arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 524 +++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/msm8996.dtsi | 80 +++++
2 files changed, 604 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
index 1d1f7f9..99056b6 100644
--- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
@@ -495,4 +495,528 @@
bias-disable;
};
};
+
+ blsp1_uart0_2pins_default: blsp1_uart0_2pins {
+ pinmux {
+ function = "blsp_uart1";
+ pins = "gpio0", "gpio1";
+ };
+ pinconf {
+ pins = "gpio0", "gpio1";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart0_2pins_sleep: blsp1_uart0_2pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio0", "gpio1";
+ };
+ pinconf {
+ pins = "gpio0", "gpio1";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart0_4pins_default: blsp1_uart0_4pins {
+ pinmux {
+ function = "blsp_uart1";
+ pins = "gpio0", "gpio1", "gpio2", "gpio3";
+ };
+
+ pinconf {
+ pins = "gpio0", "gpio1", "gpio2", "gpio3";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart0_4pins_sleep: blsp1_uart0_4pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio0", "gpio1", "gpio2", "gpio3";
+ };
+
+ pinconf {
+ pins = "gpio0", "gpio1", "gpio2", "gpio3";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart1_2pins_default: blsp1_uart1_2pins {
+ pinmux {
+ function = "blsp_uart2";
+ pins = "gpio41", "gpio42";
+ };
+ pinconf {
+ pins = "gpio41", "gpio42";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart1_2pins_sleep: blsp1_uart1_2pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio41", "gpio42";
+ };
+ pinconf {
+ pins = "gpio41", "gpio42";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart1_4pins_default: blsp1_uart1_4pins {
+ pinmux {
+ function = "blsp_uart2";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ };
+
+ pinconf {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart1_4pins_sleep: blsp1_uart1_4pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ };
+
+ pinconf {
+ pins = "gpio41", "gpio42", "gpio43", "gpio44";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart2_2pins_default: blsp1_uart2_2pins {
+ pinmux {
+ function = "blsp_uart3";
+ pins = "gpio45", "gpio46";
+ };
+ pinconf {
+ pins = "gpio45", "gpio46";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart2_2pins_sleep: blsp1_uart2_2pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio45", "gpio46";
+ };
+ pinconf {
+ pins = "gpio45", "gpio46";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart2_4pins_default: blsp1_uart2_4pins {
+ pinmux {
+ function = "blsp_uart3";
+ pins = "gpio45", "gpio46", "gpio47", "gpio48";
+ };
+
+ pinconf {
+ pins = "gpio45", "gpio46", "gpio47", "gpio48";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart2_4pins_sleep: blsp1_uart2_4pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio45", "gpio46", "gpio47", "gpio48";
+ };
+
+ pinconf {
+ pins = "gpio45", "gpio46", "gpio47", "gpio48";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart3_2pins_default: blsp1_uart3_2pins {
+ pinmux {
+ function = "blsp_uart4";
+ pins = "gpio65", "gpio66";
+ };
+ pinconf {
+ pins = "gpio65", "gpio66";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart3_2pins_sleep: blsp1_uart3_2pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio65", "gpio66";
+ };
+ pinconf {
+ pins = "gpio65", "gpio66";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart3_4pins_default: blsp1_uart3_4pins {
+ pinmux {
+ function = "blsp_uart4";
+ pins = "gpio65", "gpio66", "gpio67", "gpio68";
+ };
+
+ pinconf {
+ pins = "gpio65", "gpio66", "gpio67", "gpio68";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart3_4pins_sleep: blsp1_uart3_4pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio65", "gpio66", "gpio67", "gpio68";
+ };
+
+ pinconf {
+ pins = "gpio65", "gpio66", "gpio67", "gpio68";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart4_2pins_default: blsp1_uart4_2pins {
+ pinmux {
+ function = "blsp_uart5";
+ pins = "gpio81", "gpio82";
+ };
+ pinconf {
+ pins = "gpio81", "gpio82";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart4_2pins_sleep: blsp1_uart4_2pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio81", "gpio82";
+ };
+ pinconf {
+ pins = "gpio81", "gpio82";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart4_4pins_default: blsp1_uart4_4pins {
+ pinmux {
+ function = "blsp_uart5";
+ pins = "gpio81", "gpio82", "gpio83", "gpio84";
+ };
+
+ pinconf {
+ pins = "gpio81", "gpio82", "gpio83", "gpio84";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart4_4pins_sleep: blsp1_uart4_4pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio81", "gpio82", "gpio83", "gpio84";
+ };
+
+ pinconf {
+ pins = "gpio81", "gpio82", "gpio83", "gpio84";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart5_2pins_default: blsp1_uart5_2pins {
+ pinmux {
+ function = "blsp_uart6";
+ pins = "gpio25", "gpio26";
+ };
+ pinconf {
+ pins = "gpio25", "gpio26";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart5_2pins_sleep: blsp1_uart5_2pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio25", "gpio26";
+ };
+ pinconf {
+ pins = "gpio25", "gpio26";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart5_4pins_default: blsp1_uart5_4pins {
+ pinmux {
+ function = "blsp_uart6";
+ pins = "gpio25", "gpio26", "gpio27", "gpio28";
+ };
+
+ pinconf {
+ pins = "gpio25", "gpio26", "gpio27", "gpio28";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart5_4pins_sleep: blsp1_uart5_4pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio25", "gpio26", "gpio27", "gpio28";
+ };
+
+ pinconf {
+ pins = "gpio25", "gpio26", "gpio27", "gpio28";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart0_2pins_default: blsp2_uart0_2pins {
+ pinmux {
+ function = "blsp_uart7";
+ pins = "gpio53", "gpio54";
+ };
+ pinconf {
+ pins = "gpio53", "gpio54";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart0_2pins_sleep: blsp2_uart0_2pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio53", "gpio54";
+ };
+ pinconf {
+ pins = "gpio53", "gpio54";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart0_4pins_default: blsp2_uart0_4pins {
+ pinmux {
+ function = "blsp_uart7";
+ pins = "gpio53", "gpio54", "gpio55", "gpio56";
+ };
+
+ pinconf {
+ pins = "gpio53", "gpio54", "gpio55", "gpio56";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart0_4pins_sleep: blsp2_uart0_4pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio53", "gpio54", "gpio55", "gpio56";
+ };
+
+ pinconf {
+ pins = "gpio53", "gpio54", "gpio55", "gpio56";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart3_2pins_default: blsp2_uart3_2pins {
+ pinmux {
+ function = "blsp_uart10";
+ pins = "gpio8", "gpio9";
+ };
+ pinconf {
+ pins = "gpio8", "gpio9";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart3_2pins_sleep: blsp2_uart3_2pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio8", "gpio9";
+ };
+ pinconf {
+ pins = "gpio8", "gpio9";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart3_4pins_default: blsp2_uart3_4pins {
+ pinmux {
+ function = "blsp_uart10";
+ pins = "gpio8", "gpio9", "gpio10", "gpio11";
+ };
+
+ pinconf {
+ pins = "gpio8", "gpio9", "gpio10", "gpio11";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart3_4pins_sleep: blsp2_uart3_4pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio8", "gpio9", "gpio10", "gpio11";
+ };
+
+ pinconf {
+ pins = "gpio8", "gpio9", "gpio10", "gpio11";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart4_2pins_alt_default: blsp2_uart4_2pins_alt {
+ pinmux {
+ function = "blsp_uart11";
+ pins = "gpio100", "gpio101";
+ };
+ pinconf {
+ pins = "gpio100", "gpio101";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart4_2pins_alt_sleep: blsp2_uart4_2pins_alt_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio100", "gpio101";
+ };
+ pinconf {
+ pins = "gpio100", "gpio101";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart4_2pins_default: blsp2_uart4_2pins {
+ pinmux {
+ function = "blsp_uart11";
+ pins = "gpio58", "gpio59";
+ };
+ pinconf {
+ pins = "gpio58", "gpio59";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart4_2pins_sleep: blsp2_uart4_2pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio58", "gpio59";
+ };
+ pinconf {
+ pins = "gpio58", "gpio59";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart4_4pins_default: blsp2_uart4_4pins {
+ pinmux {
+ function = "blsp_uart11";
+ pins = "gpio58", "gpio59", "gpio60", "gpio61";
+ };
+
+ pinconf {
+ pins = "gpio58", "gpio59", "gpio60", "gpio61";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart4_4pins_sleep: blsp2_uart4_4pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio58", "gpio59", "gpio60", "gpio61";
+ };
+
+ pinconf {
+ pins = "gpio58", "gpio59", "gpio60", "gpio61";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart5_2pins_default: blsp2_uart5_2pins {
+ pinmux {
+ function = "blsp_uart12";
+ pins = "gpio85", "gpio86";
+ };
+ pinconf {
+ pins = "gpio85", "gpio86";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart5_2pins_sleep: blsp2_uart5_2pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio85", "gpio86";
+ };
+ pinconf {
+ pins = "gpio85", "gpio86";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart5_4pins_default: blsp2_uart5_4pins {
+ pinmux {
+ function = "blsp_uart12";
+ pins = "gpio85", "gpio86", "gpio87", "gpio88";
+ };
+
+ pinconf {
+ pins = "gpio85", "gpio86", "gpio87", "gpio88";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp2_uart5_4pins_sleep: blsp2_uart5_4pins_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio85", "gpio86", "gpio87", "gpio88";
+ };
+
+ pinconf {
+ pins = "gpio85", "gpio86", "gpio87", "gpio88";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 13bb964..c2a5062 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -435,6 +435,16 @@
#clock-cells = <1>;
};
+ blsp1_uart0: serial@756f000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x0756f000 0x1000>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
blsp1_uart1: serial@7570000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x07570000 0x1000>;
@@ -445,6 +455,76 @@
status = "disabled";
};
+ blsp1_uart2: serial@7571000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x07571000 0x1000>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
+ blsp1_uart3: serial@7572000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x07572000 0x1000>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_UART4_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
+ blsp1_uart4: serial@7573000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x07573000 0x1000>;
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_UART5_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
+ blsp1_uart5: serial@7574000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x07574000 0x1000>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_UART6_APPS_CLK>,
+ <&gcc GCC_BLSP1_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
+ blsp2_uart3: serial@75b2000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x075b2000 0x1000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP2_UART4_APPS_CLK>,
+ <&gcc GCC_BLSP2_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
+ blsp2_uart4: serial@75b3000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x075b3000 0x1000>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP2_UART5_APPS_CLK>,
+ <&gcc GCC_BLSP2_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
+ blsp2_uart5: serial@75b4000 {
+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ reg = <0x075b4000 0x1000>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP2_UART6_APPS_CLK>,
+ <&gcc GCC_BLSP2_AHB_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
blsp1_spi0: spi@7575000 {
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x07575000 0x600>;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: Add more msm8996 uarts
2018-12-14 17:01 ` [PATCH 2/2] arm64: dts: qcom: Add more msm8996 uarts jakob.wuhrer
@ 2019-01-12 16:22 ` Jakob Wuhrer
0 siblings, 0 replies; 4+ messages in thread
From: Jakob Wuhrer @ 2019-01-12 16:22 UTC (permalink / raw)
To: jakob.wuhrer, andy.gross, david.brown
Cc: Rob Herring, Mark Rutland, linux-arm-msm, linux-soc, devicetree,
linux-kernel
Hi everyone,
Did I submit these to the right lists?
If so, could someone please take a look at these patches?
On another note: I think the mailing lists might be a bit overzealous
with respect to what it blocks, I was unable to submit patches using an
@airmail.cc email account.
thanks in advance,
Jakob Wuhrer
On 12/14/18 6:01 PM, jakob.wuhrer@gmail.com wrote:
> From: Jakob Wuhrer <jakobwuhrer@airmail.cc>
>
> msm8996 has 12 uarts, but the devicetree only lists 3. Add the
> pinmuxing and the main devicetree entries for the others.
>
> Signed-off-by: Jakob Wuhrer <jakobwuhrer@airmail.cc>
> ---
> arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 524 +++++++++++++++++++++++++++++
> arch/arm64/boot/dts/qcom/msm8996.dtsi | 80 +++++
> 2 files changed, 604 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
> index 1d1f7f9..99056b6 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi
> @@ -495,4 +495,528 @@
> bias-disable;
> };
> };
> +
> + blsp1_uart0_2pins_default: blsp1_uart0_2pins {
> + pinmux {
> + function = "blsp_uart1";
> + pins = "gpio0", "gpio1";
> + };
> + pinconf {
> + pins = "gpio0", "gpio1";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart0_2pins_sleep: blsp1_uart0_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio0", "gpio1";
> + };
> + pinconf {
> + pins = "gpio0", "gpio1";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart0_4pins_default: blsp1_uart0_4pins {
> + pinmux {
> + function = "blsp_uart1";
> + pins = "gpio0", "gpio1", "gpio2", "gpio3";
> + };
> +
> + pinconf {
> + pins = "gpio0", "gpio1", "gpio2", "gpio3";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart0_4pins_sleep: blsp1_uart0_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio0", "gpio1", "gpio2", "gpio3";
> + };
> +
> + pinconf {
> + pins = "gpio0", "gpio1", "gpio2", "gpio3";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart1_2pins_default: blsp1_uart1_2pins {
> + pinmux {
> + function = "blsp_uart2";
> + pins = "gpio41", "gpio42";
> + };
> + pinconf {
> + pins = "gpio41", "gpio42";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart1_2pins_sleep: blsp1_uart1_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio41", "gpio42";
> + };
> + pinconf {
> + pins = "gpio41", "gpio42";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart1_4pins_default: blsp1_uart1_4pins {
> + pinmux {
> + function = "blsp_uart2";
> + pins = "gpio41", "gpio42", "gpio43", "gpio44";
> + };
> +
> + pinconf {
> + pins = "gpio41", "gpio42", "gpio43", "gpio44";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart1_4pins_sleep: blsp1_uart1_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio41", "gpio42", "gpio43", "gpio44";
> + };
> +
> + pinconf {
> + pins = "gpio41", "gpio42", "gpio43", "gpio44";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart2_2pins_default: blsp1_uart2_2pins {
> + pinmux {
> + function = "blsp_uart3";
> + pins = "gpio45", "gpio46";
> + };
> + pinconf {
> + pins = "gpio45", "gpio46";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart2_2pins_sleep: blsp1_uart2_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio45", "gpio46";
> + };
> + pinconf {
> + pins = "gpio45", "gpio46";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart2_4pins_default: blsp1_uart2_4pins {
> + pinmux {
> + function = "blsp_uart3";
> + pins = "gpio45", "gpio46", "gpio47", "gpio48";
> + };
> +
> + pinconf {
> + pins = "gpio45", "gpio46", "gpio47", "gpio48";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart2_4pins_sleep: blsp1_uart2_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio45", "gpio46", "gpio47", "gpio48";
> + };
> +
> + pinconf {
> + pins = "gpio45", "gpio46", "gpio47", "gpio48";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart3_2pins_default: blsp1_uart3_2pins {
> + pinmux {
> + function = "blsp_uart4";
> + pins = "gpio65", "gpio66";
> + };
> + pinconf {
> + pins = "gpio65", "gpio66";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart3_2pins_sleep: blsp1_uart3_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio65", "gpio66";
> + };
> + pinconf {
> + pins = "gpio65", "gpio66";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart3_4pins_default: blsp1_uart3_4pins {
> + pinmux {
> + function = "blsp_uart4";
> + pins = "gpio65", "gpio66", "gpio67", "gpio68";
> + };
> +
> + pinconf {
> + pins = "gpio65", "gpio66", "gpio67", "gpio68";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart3_4pins_sleep: blsp1_uart3_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio65", "gpio66", "gpio67", "gpio68";
> + };
> +
> + pinconf {
> + pins = "gpio65", "gpio66", "gpio67", "gpio68";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart4_2pins_default: blsp1_uart4_2pins {
> + pinmux {
> + function = "blsp_uart5";
> + pins = "gpio81", "gpio82";
> + };
> + pinconf {
> + pins = "gpio81", "gpio82";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart4_2pins_sleep: blsp1_uart4_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio81", "gpio82";
> + };
> + pinconf {
> + pins = "gpio81", "gpio82";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart4_4pins_default: blsp1_uart4_4pins {
> + pinmux {
> + function = "blsp_uart5";
> + pins = "gpio81", "gpio82", "gpio83", "gpio84";
> + };
> +
> + pinconf {
> + pins = "gpio81", "gpio82", "gpio83", "gpio84";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart4_4pins_sleep: blsp1_uart4_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio81", "gpio82", "gpio83", "gpio84";
> + };
> +
> + pinconf {
> + pins = "gpio81", "gpio82", "gpio83", "gpio84";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart5_2pins_default: blsp1_uart5_2pins {
> + pinmux {
> + function = "blsp_uart6";
> + pins = "gpio25", "gpio26";
> + };
> + pinconf {
> + pins = "gpio25", "gpio26";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart5_2pins_sleep: blsp1_uart5_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio25", "gpio26";
> + };
> + pinconf {
> + pins = "gpio25", "gpio26";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart5_4pins_default: blsp1_uart5_4pins {
> + pinmux {
> + function = "blsp_uart6";
> + pins = "gpio25", "gpio26", "gpio27", "gpio28";
> + };
> +
> + pinconf {
> + pins = "gpio25", "gpio26", "gpio27", "gpio28";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp1_uart5_4pins_sleep: blsp1_uart5_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio25", "gpio26", "gpio27", "gpio28";
> + };
> +
> + pinconf {
> + pins = "gpio25", "gpio26", "gpio27", "gpio28";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart0_2pins_default: blsp2_uart0_2pins {
> + pinmux {
> + function = "blsp_uart7";
> + pins = "gpio53", "gpio54";
> + };
> + pinconf {
> + pins = "gpio53", "gpio54";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart0_2pins_sleep: blsp2_uart0_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio53", "gpio54";
> + };
> + pinconf {
> + pins = "gpio53", "gpio54";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart0_4pins_default: blsp2_uart0_4pins {
> + pinmux {
> + function = "blsp_uart7";
> + pins = "gpio53", "gpio54", "gpio55", "gpio56";
> + };
> +
> + pinconf {
> + pins = "gpio53", "gpio54", "gpio55", "gpio56";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart0_4pins_sleep: blsp2_uart0_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio53", "gpio54", "gpio55", "gpio56";
> + };
> +
> + pinconf {
> + pins = "gpio53", "gpio54", "gpio55", "gpio56";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart3_2pins_default: blsp2_uart3_2pins {
> + pinmux {
> + function = "blsp_uart10";
> + pins = "gpio8", "gpio9";
> + };
> + pinconf {
> + pins = "gpio8", "gpio9";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart3_2pins_sleep: blsp2_uart3_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio8", "gpio9";
> + };
> + pinconf {
> + pins = "gpio8", "gpio9";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart3_4pins_default: blsp2_uart3_4pins {
> + pinmux {
> + function = "blsp_uart10";
> + pins = "gpio8", "gpio9", "gpio10", "gpio11";
> + };
> +
> + pinconf {
> + pins = "gpio8", "gpio9", "gpio10", "gpio11";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart3_4pins_sleep: blsp2_uart3_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio8", "gpio9", "gpio10", "gpio11";
> + };
> +
> + pinconf {
> + pins = "gpio8", "gpio9", "gpio10", "gpio11";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart4_2pins_alt_default: blsp2_uart4_2pins_alt {
> + pinmux {
> + function = "blsp_uart11";
> + pins = "gpio100", "gpio101";
> + };
> + pinconf {
> + pins = "gpio100", "gpio101";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart4_2pins_alt_sleep: blsp2_uart4_2pins_alt_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio100", "gpio101";
> + };
> + pinconf {
> + pins = "gpio100", "gpio101";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart4_2pins_default: blsp2_uart4_2pins {
> + pinmux {
> + function = "blsp_uart11";
> + pins = "gpio58", "gpio59";
> + };
> + pinconf {
> + pins = "gpio58", "gpio59";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart4_2pins_sleep: blsp2_uart4_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio58", "gpio59";
> + };
> + pinconf {
> + pins = "gpio58", "gpio59";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart4_4pins_default: blsp2_uart4_4pins {
> + pinmux {
> + function = "blsp_uart11";
> + pins = "gpio58", "gpio59", "gpio60", "gpio61";
> + };
> +
> + pinconf {
> + pins = "gpio58", "gpio59", "gpio60", "gpio61";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart4_4pins_sleep: blsp2_uart4_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio58", "gpio59", "gpio60", "gpio61";
> + };
> +
> + pinconf {
> + pins = "gpio58", "gpio59", "gpio60", "gpio61";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart5_2pins_default: blsp2_uart5_2pins {
> + pinmux {
> + function = "blsp_uart12";
> + pins = "gpio85", "gpio86";
> + };
> + pinconf {
> + pins = "gpio85", "gpio86";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart5_2pins_sleep: blsp2_uart5_2pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio85", "gpio86";
> + };
> + pinconf {
> + pins = "gpio85", "gpio86";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart5_4pins_default: blsp2_uart5_4pins {
> + pinmux {
> + function = "blsp_uart12";
> + pins = "gpio85", "gpio86", "gpio87", "gpio88";
> + };
> +
> + pinconf {
> + pins = "gpio85", "gpio86", "gpio87", "gpio88";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + blsp2_uart5_4pins_sleep: blsp2_uart5_4pins_sleep {
> + pinmux {
> + function = "gpio";
> + pins = "gpio85", "gpio86", "gpio87", "gpio88";
> + };
> +
> + pinconf {
> + pins = "gpio85", "gpio86", "gpio87", "gpio88";
> + drive-strength = <2>;
> + bias-disable;
> + };
> + };
> };
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 13bb964..c2a5062 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -435,6 +435,16 @@
> #clock-cells = <1>;
> };
>
> + blsp1_uart0: serial@756f000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0x0756f000 0x1000>;
> + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
> + <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
> + };
> +
> blsp1_uart1: serial@7570000 {
> compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> reg = <0x07570000 0x1000>;
> @@ -445,6 +455,76 @@
> status = "disabled";
> };
>
> + blsp1_uart2: serial@7571000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0x07571000 0x1000>;
> + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
> + <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
> + };
> +
> + blsp1_uart3: serial@7572000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0x07572000 0x1000>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_UART4_APPS_CLK>,
> + <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
> + };
> +
> + blsp1_uart4: serial@7573000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0x07573000 0x1000>;
> + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_UART5_APPS_CLK>,
> + <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
> + };
> +
> + blsp1_uart5: serial@7574000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0x07574000 0x1000>;
> + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_UART6_APPS_CLK>,
> + <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
> + };
> +
> + blsp2_uart3: serial@75b2000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0x075b2000 0x1000>;
> + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP2_UART4_APPS_CLK>,
> + <&gcc GCC_BLSP2_AHB_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
> + };
> +
> + blsp2_uart4: serial@75b3000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0x075b3000 0x1000>;
> + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP2_UART5_APPS_CLK>,
> + <&gcc GCC_BLSP2_AHB_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
> + };
> +
> + blsp2_uart5: serial@75b4000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0x075b4000 0x1000>;
> + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP2_UART6_APPS_CLK>,
> + <&gcc GCC_BLSP2_AHB_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
> + };
> +
> blsp1_spi0: spi@7575000 {
> compatible = "qcom,spi-qup-v2.2.1";
> reg = <0x07575000 0x600>;
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] arm64: dts: qcom: Correct "gpiio" typo in msm8996-pins
2018-12-14 17:01 [PATCH 1/2] arm64: dts: qcom: Correct "gpiio" typo in msm8996-pins jakob.wuhrer
2018-12-14 17:01 ` [PATCH 2/2] arm64: dts: qcom: Add more msm8996 uarts jakob.wuhrer
@ 2019-01-14 22:18 ` Stephen Boyd
1 sibling, 0 replies; 4+ messages in thread
From: Stephen Boyd @ 2019-01-14 22:18 UTC (permalink / raw)
To: andy.gross, david.brown, jakob.wuhrer
Cc: Jakob Wuhrer, Rob Herring, Mark Rutland, linux-arm-msm,
linux-soc, devicetree, linux-kernel
Quoting jakob.wuhrer@gmail.com (2018-12-14 09:01:30)
> From: Jakob Wuhrer <jakobwuhrer@airmail.cc>
>
> gpiio5 is missspelt in msm8996-pins.dtsi, fix that.
>
> Signed-off-by: Jakob Wuhrer <jakobwuhrer@airmail.cc>
> ---
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2019-01-14 22:18 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-12-14 17:01 [PATCH 1/2] arm64: dts: qcom: Correct "gpiio" typo in msm8996-pins jakob.wuhrer
2018-12-14 17:01 ` [PATCH 2/2] arm64: dts: qcom: Add more msm8996 uarts jakob.wuhrer
2019-01-12 16:22 ` Jakob Wuhrer
2019-01-14 22:18 ` [PATCH 1/2] arm64: dts: qcom: Correct "gpiio" typo in msm8996-pins Stephen Boyd
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