* [v2 1/9] hwmon: (nct7904) Add error handling in probe function.
@ 2019-06-17 8:08 Amy.Shih
2019-06-17 8:10 ` [v2 2/9] hwmon: (nct7904) Changes comments " Amy.Shih
` (7 more replies)
0 siblings, 8 replies; 11+ messages in thread
From: Amy.Shih @ 2019-06-17 8:08 UTC (permalink / raw)
To: she90122
Cc: amy.shih, oakley.ding, jia.sui, Jean Delvare, Guenter Roeck,
linux-hwmon, linux-kernel
From: "amy.shih" <amy.shih@advantech.com.tw>
When register read and write operations return errors, needs to add
error handling.
Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
---
Changes in v2:
- Check for errors on register read and write operations.
drivers/hwmon/nct7904.c | 23 ++++++++++++++++++-----
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index 5708171197e7..401ed4a4a576 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -506,6 +506,8 @@ static int nct7904_probe(struct i2c_client *client,
/* CPU_TEMP attributes */
ret = nct7904_read_reg(data, BANK_0, VT_ADC_CTRL0_REG);
+ if (ret < 0)
+ return ret;
if ((ret & 0x6) == 0x6)
data->tcpu_mask |= 1; /* TR1 */
@@ -518,11 +520,15 @@ static int nct7904_probe(struct i2c_client *client,
/* LTD */
ret = nct7904_read_reg(data, BANK_0, VT_ADC_CTRL2_REG);
+ if (ret < 0)
+ return ret;
if ((ret & 0x02) == 0x02)
data->tcpu_mask |= 0x10;
/* Multi-Function detecting for Volt and TR/TD */
ret = nct7904_read_reg(data, BANK_0, VT_ADC_MD_REG);
+ if (ret < 0)
+ return ret;
for (i = 0; i < 4; i++) {
val = (ret & (0x03 << i)) >> (i * 2);
@@ -533,22 +539,29 @@ static int nct7904_probe(struct i2c_client *client,
/* PECI */
ret = nct7904_read_reg(data, BANK_2, PFE_REG);
+ if (ret < 0)
+ return ret;
if (ret & 0x80) {
data->enable_dts = 1; //Enable DTS & PECI
} else {
ret = nct7904_read_reg(data, BANK_2, TSI_CTRL_REG);
+ if (ret < 0)
+ return ret;
if (ret & 0x80)
data->enable_dts = 0x3; //Enable DTS & TSI
}
/* Check DTS enable status */
if (data->enable_dts) {
- data->has_dts =
- nct7904_read_reg(data, BANK_0, DTS_T_CTRL0_REG) & 0xF;
+ ret = nct7904_read_reg(data, BANK_0, DTS_T_CTRL0_REG);
+ if (ret < 0)
+ return ret;
+ data->has_dts = ret & 0xF;
if (data->enable_dts & 0x2) {
- data->has_dts |=
- (nct7904_read_reg(data, BANK_0, DTS_T_CTRL1_REG) & 0xF)
- << 4;
+ ret = nct7904_read_reg(data, BANK_0, DTS_T_CTRL1_REG);
+ if (ret < 0)
+ return ret;
+ data->has_dts |= (ret & 0xF) << 4;
}
}
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [v2 2/9] hwmon: (nct7904) Changes comments in probe function.
2019-06-17 8:08 [v2 1/9] hwmon: (nct7904) Add error handling in probe function Amy.Shih
@ 2019-06-17 8:10 ` Amy.Shih
2019-06-17 8:11 ` [v2 3/9] hwmon: (nct7904) Add extra sysfs support for fan, voltage and temperature Amy.Shih
` (6 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Amy.Shih @ 2019-06-17 8:10 UTC (permalink / raw)
To: she90122
Cc: amy.shih, oakley.ding, jia.sui, Jean Delvare, Guenter Roeck,
linux-hwmon, linux-kernel
From: "amy.shih" <amy.shih@advantech.com.tw>
Linux style for comments is the C89 "/* ... */" style,
changes the comments to Linux style.
Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
---
Changes in v2:
- Fix wrong style of comments.
drivers/hwmon/nct7904.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index 401ed4a4a576..710c30562fc1 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -542,13 +542,13 @@ static int nct7904_probe(struct i2c_client *client,
if (ret < 0)
return ret;
if (ret & 0x80) {
- data->enable_dts = 1; //Enable DTS & PECI
+ data->enable_dts = 1; /* Enable DTS & PECI */
} else {
ret = nct7904_read_reg(data, BANK_2, TSI_CTRL_REG);
if (ret < 0)
return ret;
if (ret & 0x80)
- data->enable_dts = 0x3; //Enable DTS & TSI
+ data->enable_dts = 0x3; /* Enable DTS & TSI */
}
/* Check DTS enable status */
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [v2 3/9] hwmon: (nct7904) Add extra sysfs support for fan, voltage and temperature.
2019-06-17 8:08 [v2 1/9] hwmon: (nct7904) Add error handling in probe function Amy.Shih
2019-06-17 8:10 ` [v2 2/9] hwmon: (nct7904) Changes comments " Amy.Shih
@ 2019-06-17 8:11 ` Amy.Shih
2019-06-17 8:11 ` [v2 4/9] hwmon: (nct7904) Fix incorrect register setting for the high value high limit of voltage Amy.Shih
` (5 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Amy.Shih @ 2019-06-17 8:11 UTC (permalink / raw)
To: she90122
Cc: amy.shih, oakley.ding, jia.sui, Jean Delvare, Guenter Roeck,
linux-hwmon, linux-kernel
From: "amy.shih" <amy.shih@advantech.com.tw>
NCT-7904D also supports reading of channel limitation registers
and SMI status registers for fan, voltage and temperature monitoring,
and also supports reading of temperature sensor type which is thermal
diode, thermistor, AMD SB-TSI or Intel PECI, thus add below sysfs nodes:
-fan[1-*]_min
-fan[1-*]_alarm
-in[1-*]_min
-in[1-*]_max
-in[1-*]_alarm
-temp[1-*]_max
-temp[1-*]_max_hyst
-temp[1-*]_emergency
-temp[1-*]_emergency_hyst
-temp[1-*]_alarm
-temp[1-*]_type
Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
---
Changes in v2:
- Fix bad fallthrough in various switch statements.
- Fix the wrong declared of tmp as u8 in nct7904_write_in, declared tmp to int.
drivers/hwmon/nct7904.c | 469 ++++++++++++++++++++++++++++++++++++----
1 file changed, 424 insertions(+), 45 deletions(-)
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index 710c30562fc1..cdd67932938d 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -46,10 +46,33 @@
#define DTS_T_CTRL1_REG 0x27
#define VT_ADC_MD_REG 0x2E
+#define VSEN1_HV_LL_REG 0x02 /* Bank 1; 2 regs (HV/LV) per sensor */
+#define VSEN1_LV_LL_REG 0x03 /* Bank 1; 2 regs (HV/LV) per sensor */
+#define VSEN1_HV_HL_REG 0x00 /* Bank 1; 2 regs (HV/LV) per sensor */
+#define VSEN1_LV_HL_REG 0x01 /* Bank 1; 2 regs (HV/LV) per sensor */
+#define SMI_STS1_REG 0xC1 /* Bank 0; SMI Status Register */
+#define SMI_STS5_REG 0xC5 /* Bank 0; SMI Status Register */
+#define SMI_STS7_REG 0xC7 /* Bank 0; SMI Status Register */
+#define SMI_STS8_REG 0xC8 /* Bank 0; SMI Status Register */
+
#define VSEN1_HV_REG 0x40 /* Bank 0; 2 regs (HV/LV) per sensor */
#define TEMP_CH1_HV_REG 0x42 /* Bank 0; same as VSEN2_HV */
#define LTD_HV_REG 0x62 /* Bank 0; 2 regs in VSEN range */
+#define LTD_HV_HL_REG 0x44 /* Bank 1; 1 reg for LTD */
+#define LTD_LV_HL_REG 0x45 /* Bank 1; 1 reg for LTD */
+#define LTD_HV_LL_REG 0x46 /* Bank 1; 1 reg for LTD */
+#define LTD_LV_LL_REG 0x47 /* Bank 1; 1 reg for LTD */
+#define TEMP_CH1_CH_REG 0x05 /* Bank 1; 1 reg for LTD */
+#define TEMP_CH1_W_REG 0x06 /* Bank 1; 1 reg for LTD */
+#define TEMP_CH1_WH_REG 0x07 /* Bank 1; 1 reg for LTD */
+#define TEMP_CH1_C_REG 0x04 /* Bank 1; 1 reg per sensor */
+#define DTS_T_CPU1_C_REG 0x90 /* Bank 1; 1 reg per sensor */
+#define DTS_T_CPU1_CH_REG 0x91 /* Bank 1; 1 reg per sensor */
+#define DTS_T_CPU1_W_REG 0x92 /* Bank 1; 1 reg per sensor */
+#define DTS_T_CPU1_WH_REG 0x93 /* Bank 1; 1 reg per sensor */
#define FANIN1_HV_REG 0x80 /* Bank 0; 2 regs (HV/LV) per sensor */
+#define FANIN1_HV_HL_REG 0x60 /* Bank 1; 2 regs (HV/LV) per sensor */
+#define FANIN1_LV_HL_REG 0x61 /* Bank 1; 2 regs (HV/LV) per sensor */
#define T_CPU1_HV_REG 0xA0 /* Bank 0; 2 regs (HV/LV) per sensor */
#define PRTS_REG 0x03 /* Bank 2 */
@@ -58,6 +81,8 @@
#define FANCTL1_FMR_REG 0x00 /* Bank 3; 1 reg per channel */
#define FANCTL1_OUT_REG 0x10 /* Bank 3; 1 reg per channel */
+#define ENABLE_TSI BIT(1)
+
static const unsigned short normal_i2c[] = {
0x2d, 0x2e, I2C_CLIENT_END
};
@@ -72,6 +97,7 @@ struct nct7904_data {
u8 fan_mode[FANCTL_MAX];
u8 enable_dts;
u8 has_dts;
+ u8 temp_mode; /* 0: TR mode, 1: TD mode */
};
/* Access functions */
@@ -170,6 +196,25 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel,
rpm = 1350000 / cnt;
*val = rpm;
return 0;
+ case hwmon_fan_min:
+ ret = nct7904_read_reg16(data, BANK_1,
+ FANIN1_HV_HL_REG + channel * 2);
+ if (ret < 0)
+ return ret;
+ cnt = ((ret & 0xff00) >> 3) | (ret & 0x1f);
+ if (cnt == 0x1fff)
+ rpm = 0;
+ else
+ rpm = 1350000 / cnt;
+ *val = rpm;
+ return 0;
+ case hwmon_fan_alarm:
+ ret = nct7904_read_reg(data, BANK_0,
+ SMI_STS7_REG + (channel >> 3));
+ if (ret < 0)
+ return ret;
+ *val = (ret >> (channel & 0x07)) & 1;
+ return 0;
default:
return -EOPNOTSUPP;
}
@@ -179,8 +224,20 @@ static umode_t nct7904_fan_is_visible(const void *_data, u32 attr, int channel)
{
const struct nct7904_data *data = _data;
- if (attr == hwmon_fan_input && data->fanin_mask & (1 << channel))
- return 0444;
+ switch (attr) {
+ case hwmon_fan_input:
+ case hwmon_fan_alarm:
+ if (data->fanin_mask & (1 << channel))
+ return 0444;
+ break;
+ case hwmon_fan_min:
+ if (data->fanin_mask & (1 << channel))
+ return 0644;
+ break;
+ default:
+ break;
+ }
+
return 0;
}
@@ -211,6 +268,37 @@ static int nct7904_read_in(struct device *dev, u32 attr, int channel,
volt *= 6; /* 0.006V scale */
*val = volt;
return 0;
+ case hwmon_in_min:
+ ret = nct7904_read_reg16(data, BANK_1,
+ VSEN1_HV_LL_REG + index * 4);
+ if (ret < 0)
+ return ret;
+ volt = ((ret & 0xff00) >> 5) | (ret & 0x7);
+ if (index < 14)
+ volt *= 2; /* 0.002V scale */
+ else
+ volt *= 6; /* 0.006V scale */
+ *val = volt;
+ return 0;
+ case hwmon_in_max:
+ ret = nct7904_read_reg16(data, BANK_1,
+ VSEN1_HV_HL_REG + index * 4);
+ if (ret < 0)
+ return ret;
+ volt = ((ret & 0xff00) >> 5) | (ret & 0x7);
+ if (index < 14)
+ volt *= 2; /* 0.002V scale */
+ else
+ volt *= 6; /* 0.006V scale */
+ *val = volt;
+ return 0;
+ case hwmon_in_alarm:
+ ret = nct7904_read_reg(data, BANK_0,
+ SMI_STS1_REG + (index >> 3));
+ if (ret < 0)
+ return ret;
+ *val = (ret >> (index & 0x07)) & 1;
+ return 0;
default:
return -EOPNOTSUPP;
}
@@ -221,9 +309,20 @@ static umode_t nct7904_in_is_visible(const void *_data, u32 attr, int channel)
const struct nct7904_data *data = _data;
int index = nct7904_chan_to_index[channel];
- if (channel > 0 && attr == hwmon_in_input &&
- (data->vsen_mask & BIT(index)))
- return 0444;
+ switch (attr) {
+ case hwmon_in_input:
+ case hwmon_in_alarm:
+ if (channel > 0 && (data->vsen_mask & BIT(index)))
+ return 0444;
+ break;
+ case hwmon_in_min:
+ case hwmon_in_max:
+ if (channel > 0 && (data->vsen_mask & BIT(index)))
+ return 0644;
+ break;
+ default:
+ break;
+ }
return 0;
}
@@ -233,6 +332,7 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
{
struct nct7904_data *data = dev_get_drvdata(dev);
int ret, temp;
+ unsigned int reg1, reg2, reg3;
switch (attr) {
case hwmon_temp_input:
@@ -250,16 +350,100 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
temp = ((ret & 0xff00) >> 5) | (ret & 0x7);
*val = sign_extend32(temp, 10) * 125;
return 0;
+ case hwmon_temp_alarm:
+ if (channel < 5) {
+ ret = nct7904_read_reg(data, BANK_0,
+ SMI_STS1_REG);
+ if (ret < 0)
+ return ret;
+ *val = (ret >> (channel & 0x07)) & 1;
+ } else {
+ if ((channel - 5) < 4) {
+ ret = nct7904_read_reg(data, BANK_0,
+ SMI_STS7_REG +
+ ((channel - 5) >> 3));
+ if (ret < 0)
+ return ret;
+ *val = (ret >> ((channel - 5) & 0x07)) & 1;
+ } else {
+ ret = nct7904_read_reg(data, BANK_0,
+ SMI_STS8_REG +
+ ((channel - 5) >> 3));
+ if (ret < 0)
+ return ret;
+ *val = (ret >> (((channel - 5) & 0x07) - 4))
+ & 1;
+ }
+ }
+ return 0;
+ case hwmon_temp_type:
+ if (channel < 5) {
+ if ((data->tcpu_mask >> channel) & 0x01) {
+ if ((data->temp_mode >> channel) & 0x01)
+ *val = 3; /* TD */
+ else
+ *val = 4; /* TR */
+ } else {
+ *val = 0;
+ }
+ } else {
+ if ((data->has_dts >> (channel - 5)) & 0x01) {
+ if (data->enable_dts & ENABLE_TSI)
+ *val = 5; /* TSI */
+ else
+ *val = 6; /* PECI */
+ } else {
+ *val = 0;
+ }
+ }
+ return 0;
+ case hwmon_temp_max:
+ reg1 = LTD_HV_HL_REG;
+ reg2 = TEMP_CH1_C_REG;
+ reg3 = DTS_T_CPU1_C_REG;
+ break;
+ case hwmon_temp_max_hyst:
+ reg1 = LTD_LV_HL_REG;
+ reg2 = TEMP_CH1_CH_REG;
+ reg3 = DTS_T_CPU1_CH_REG;
+ break;
+ case hwmon_temp_emergency:
+ reg1 = LTD_HV_LL_REG;
+ reg2 = TEMP_CH1_W_REG;
+ reg3 = DTS_T_CPU1_W_REG;
+ break;
+ case hwmon_temp_emergency_hyst:
+ reg1 = LTD_LV_LL_REG;
+ reg2 = TEMP_CH1_WH_REG;
+ reg3 = DTS_T_CPU1_WH_REG;
+ break;
default:
return -EOPNOTSUPP;
}
+
+ if (channel == 4)
+ ret = nct7904_read_reg(data, BANK_1, reg1);
+ else if (channel < 5)
+ ret = nct7904_read_reg(data, BANK_1,
+ reg2 + channel * 8);
+ else
+ ret = nct7904_read_reg(data, BANK_1,
+ reg3 + (channel - 5) * 4);
+
+ if (ret < 0)
+ return ret;
+ *val = ret * 1000;
+ return 0;
}
static umode_t nct7904_temp_is_visible(const void *_data, u32 attr, int channel)
{
const struct nct7904_data *data = _data;
- if (attr == hwmon_temp_input) {
+ switch (attr) {
+ case hwmon_temp_input:
+ case hwmon_temp_alarm:
+ case hwmon_temp_type:
if (channel < 5) {
if (data->tcpu_mask & BIT(channel))
return 0444;
@@ -267,6 +451,21 @@ static umode_t nct7904_temp_is_visible(const void *_data, u32 attr, int channel)
if (data->has_dts & BIT(channel - 5))
return 0444;
}
+ break;
+ case hwmon_temp_max:
+ case hwmon_temp_max_hyst:
+ case hwmon_temp_emergency:
+ case hwmon_temp_emergency_hyst:
+ if (channel < 5) {
+ if (data->tcpu_mask & BIT(channel))
+ return 0644;
+ } else {
+ if (data->has_dts & BIT(channel - 5))
+ return 0644;
+ }
+ break;
+ default:
+ break;
}
return 0;
@@ -297,6 +496,137 @@ static int nct7904_read_pwm(struct device *dev, u32 attr, int channel,
}
}
+static int nct7904_write_temp(struct device *dev, u32 attr, int channel,
+ long val)
+{
+ struct nct7904_data *data = dev_get_drvdata(dev);
+ int ret;
+ unsigned int reg1, reg2, reg3;
+
+ val = clamp_val(val / 1000, -128, 127);
+
+ switch (attr) {
+ case hwmon_temp_max:
+ reg1 = LTD_HV_HL_REG;
+ reg2 = TEMP_CH1_C_REG;
+ reg3 = DTS_T_CPU1_C_REG;
+ break;
+ case hwmon_temp_max_hyst:
+ reg1 = LTD_LV_HL_REG;
+ reg2 = TEMP_CH1_CH_REG;
+ reg3 = DTS_T_CPU1_CH_REG;
+ break;
+ case hwmon_temp_emergency:
+ reg1 = LTD_HV_LL_REG;
+ reg2 = TEMP_CH1_W_REG;
+ reg3 = DTS_T_CPU1_W_REG;
+ break;
+ case hwmon_temp_emergency_hyst:
+ reg1 = LTD_LV_LL_REG;
+ reg2 = TEMP_CH1_WH_REG;
+ reg3 = DTS_T_CPU1_WH_REG;
+ break;
+ default:
+ return -EOPNOTSUPP;
+ }
+ if (channel == 4)
+ ret = nct7904_write_reg(data, BANK_1, reg1, val);
+ else if (channel < 5)
+ ret = nct7904_write_reg(data, BANK_1,
+ reg2 + channel * 8, val);
+ else
+ ret = nct7904_write_reg(data, BANK_1,
+ reg3 + (channel - 5) * 4, val);
+
+ return ret;
+}
+
+static int nct7904_write_fan(struct device *dev, u32 attr, int channel,
+ long val)
+{
+ struct nct7904_data *data = dev_get_drvdata(dev);
+ int ret;
+ u8 tmp;
+
+ switch (attr) {
+ case hwmon_fan_min:
+ if (val <= 0)
+ return 0x1fff;
+
+ val = clamp_val((1350000 + (val >> 1)) / val, 1, 0x1fff);
+ tmp = (val >> 5) & 0xff;
+ ret = nct7904_write_reg(data, BANK_1,
+ FANIN1_HV_HL_REG + channel * 2, tmp);
+ if (ret < 0)
+ return ret;
+ tmp = val & 0x1f;
+ ret = nct7904_write_reg(data, BANK_1,
+ FANIN1_LV_HL_REG + channel * 2, tmp);
+ return ret;
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
+static int nct7904_write_in(struct device *dev, u32 attr, int channel,
+ long val)
+{
+ struct nct7904_data *data = dev_get_drvdata(dev);
+ int ret, index, tmp;
+
+ index = nct7904_chan_to_index[channel];
+
+ if (index < 14)
+ val = val / 2; /* 0.002V scale */
+ else
+ val = val / 6; /* 0.006V scale */
+
+ val = clamp_val(val, 0, 0x7ff); /* Bit 15 is sign bit */
+
+ switch (attr) {
+ case hwmon_in_min:
+ tmp = nct7904_read_reg(data, BANK_1,
+ VSEN1_LV_LL_REG + index * 4);
+ if (tmp < 0)
+ return tmp;
+ tmp &= ~0x7;
+ tmp |= val & 0x7;
+ ret = nct7904_write_reg(data, BANK_1,
+ VSEN1_LV_LL_REG + index * 4, tmp);
+ if (ret < 0)
+ return ret;
+ tmp = nct7904_read_reg(data, BANK_1,
+ VSEN1_HV_LL_REG + index * 4);
+ if (tmp < 0)
+ return tmp;
+ tmp = (val >> 3) & 0xff;
+ ret = nct7904_write_reg(data, BANK_1,
+ VSEN1_HV_LL_REG + index * 4, tmp);
+ return ret;
+ case hwmon_in_max:
+ tmp = nct7904_read_reg(data, BANK_1,
+ VSEN1_LV_HL_REG + index * 4);
+ if (tmp < 0)
+ return tmp;
+ tmp &= ~0x7;
+ tmp |= val & 0x7;
+ ret = nct7904_write_reg(data, BANK_1,
+ VSEN1_LV_HL_REG + index * 4, tmp);
+ if (ret < 0)
+ return ret;
+ tmp = nct7904_read_reg(data, BANK_1,
+ VSEN1_HV_LL_REG + index * 4);
+ if (tmp < 0)
+ return tmp;
+ tmp = (val >> 3) & 0xff;
+ ret = nct7904_write_reg(data, BANK_1,
+ VSEN1_HV_LL_REG + index * 4, tmp);
+ return ret;
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
static int nct7904_write_pwm(struct device *dev, u32 attr, int channel,
long val)
{
@@ -354,8 +684,14 @@ static int nct7904_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
switch (type) {
+ case hwmon_in:
+ return nct7904_write_in(dev, attr, channel, val);
+ case hwmon_fan:
+ return nct7904_write_fan(dev, attr, channel, val);
case hwmon_pwm:
return nct7904_write_pwm(dev, attr, channel, val);
+ case hwmon_temp:
+ return nct7904_write_temp(dev, attr, channel, val);
default:
return -EOPNOTSUPP;
}
@@ -404,51 +740,91 @@ static int nct7904_detect(struct i2c_client *client,
static const struct hwmon_channel_info *nct7904_info[] = {
HWMON_CHANNEL_INFO(in,
- HWMON_I_INPUT, /* dummy, skipped in is_visible */
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT,
- HWMON_I_INPUT),
+ /* dummy, skipped in is_visible */
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM,
+ HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
+ HWMON_I_ALARM),
HWMON_CHANNEL_INFO(fan,
- HWMON_F_INPUT,
- HWMON_F_INPUT,
- HWMON_F_INPUT,
- HWMON_F_INPUT,
- HWMON_F_INPUT,
- HWMON_F_INPUT,
- HWMON_F_INPUT,
- HWMON_F_INPUT),
+ HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
+ HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
+ HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
+ HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
+ HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
+ HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
+ HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
+ HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM),
HWMON_CHANNEL_INFO(pwm,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
HWMON_CHANNEL_INFO(temp,
- HWMON_T_INPUT,
- HWMON_T_INPUT,
- HWMON_T_INPUT,
- HWMON_T_INPUT,
- HWMON_T_INPUT,
- HWMON_T_INPUT,
- HWMON_T_INPUT,
- HWMON_T_INPUT,
- HWMON_T_INPUT),
+ HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
+ HWMON_T_EMERGENCY_HYST,
+ HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
+ HWMON_T_EMERGENCY_HYST,
+ HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
+ HWMON_T_EMERGENCY_HYST,
+ HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
+ HWMON_T_EMERGENCY_HYST,
+ HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
+ HWMON_T_EMERGENCY_HYST,
+ HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
+ HWMON_T_EMERGENCY_HYST,
+ HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
+ HWMON_T_EMERGENCY_HYST,
+ HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
+ HWMON_T_EMERGENCY_HYST,
+ HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
+ HWMON_T_EMERGENCY_HYST),
NULL
};
@@ -530,11 +906,14 @@ static int nct7904_probe(struct i2c_client *client,
if (ret < 0)
return ret;
+ data->temp_mode = 0;
for (i = 0; i < 4; i++) {
val = (ret & (0x03 << i)) >> (i * 2);
bit = (1 << i);
if (val == 0)
data->tcpu_mask &= ~bit;
+ else if (val == 0x1 || val == 0x2)
+ data->temp_mode |= bit;
}
/* PECI */
@@ -557,7 +936,7 @@ static int nct7904_probe(struct i2c_client *client,
if (ret < 0)
return ret;
data->has_dts = ret & 0xF;
- if (data->enable_dts & 0x2) {
+ if (data->enable_dts & ENABLE_TSI) {
ret = nct7904_read_reg(data, BANK_0, DTS_T_CTRL1_REG);
if (ret < 0)
return ret;
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [v2 4/9] hwmon: (nct7904) Fix incorrect register setting for the high value high limit of voltage.
2019-06-17 8:08 [v2 1/9] hwmon: (nct7904) Add error handling in probe function Amy.Shih
2019-06-17 8:10 ` [v2 2/9] hwmon: (nct7904) Changes comments " Amy.Shih
2019-06-17 8:11 ` [v2 3/9] hwmon: (nct7904) Add extra sysfs support for fan, voltage and temperature Amy.Shih
@ 2019-06-17 8:11 ` Amy.Shih
2019-06-17 8:12 ` [v2 5/9] hwmon: (nct7904) Fix incorrect register bit mapping of temperature alarm Amy.Shih
` (4 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Amy.Shih @ 2019-06-17 8:11 UTC (permalink / raw)
To: she90122
Cc: amy.shih, oakley.ding, jia.sui, Jean Delvare, Guenter Roeck,
linux-hwmon, linux-kernel
From: "amy.shih" <amy.shih@advantech.com.tw>
In function nct7904_write_in, the high value high limit of voltage
registers should be VSEN1_HV_HL_REG.
Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
---
Changes in v2:
- Fix incorrect register setting of voltage.
drivers/hwmon/nct7904.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index cdd67932938d..402c1bb2a99f 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -615,12 +615,12 @@ static int nct7904_write_in(struct device *dev, u32 attr, int channel,
if (ret < 0)
return ret;
tmp = nct7904_read_reg(data, BANK_1,
- VSEN1_HV_LL_REG + index * 4);
+ VSEN1_HV_HL_REG + index * 4);
if (tmp < 0)
return tmp;
tmp = (val >> 3) & 0xff;
ret = nct7904_write_reg(data, BANK_1,
- VSEN1_HV_LL_REG + index * 4, tmp);
+ VSEN1_HV_HL_REG + index * 4, tmp);
return ret;
default:
return -EOPNOTSUPP;
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [v2 5/9] hwmon: (nct7904) Fix incorrect register bit mapping of temperature alarm.
2019-06-17 8:08 [v2 1/9] hwmon: (nct7904) Add error handling in probe function Amy.Shih
` (2 preceding siblings ...)
2019-06-17 8:11 ` [v2 4/9] hwmon: (nct7904) Fix incorrect register setting for the high value high limit of voltage Amy.Shih
@ 2019-06-17 8:12 ` Amy.Shih
2019-06-17 8:14 ` [v2 6/9] hwmon: (nct7904) Fix wrong return code in function nct7904_write_fan Amy.Shih
` (3 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Amy.Shih @ 2019-06-17 8:12 UTC (permalink / raw)
To: she90122
Cc: amy.shih, oakley.ding, jia.sui, Jean Delvare, Guenter Roeck,
linux-hwmon, linux-kernel
From: "amy.shih" <amy.shih@advantech.com.tw>
In function nct7904_read_temp, the bit to shift for register
SMI_STS1_REG should be bit 1 & 3 & 5 &7 for TEMP_CH1~4.
Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
---
Changes in v2:
- Fix incorrect register bit mapping of temperature alarm.
drivers/hwmon/nct7904.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index 402c1bb2a99f..95348eebe8e4 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -356,7 +356,7 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
SMI_STS1_REG);
if (ret < 0)
return ret;
- *val = (ret >> (channel & 0x07)) & 1;
+ *val = (ret >> (((channel * 2) + 1) & 0x07)) & 1;
} else {
if ((channel - 5) < 4) {
ret = nct7904_read_reg(data, BANK_0,
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [v2 6/9] hwmon: (nct7904) Fix wrong return code in function nct7904_write_fan.
2019-06-17 8:08 [v2 1/9] hwmon: (nct7904) Add error handling in probe function Amy.Shih
` (3 preceding siblings ...)
2019-06-17 8:12 ` [v2 5/9] hwmon: (nct7904) Fix incorrect register bit mapping of temperature alarm Amy.Shih
@ 2019-06-17 8:14 ` Amy.Shih
2019-06-17 8:15 ` [v2 7/9] hwmon: (nct7904) Delete wrong comment in function nct7904_write_in Amy.Shih
` (2 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Amy.Shih @ 2019-06-17 8:14 UTC (permalink / raw)
To: she90122
Cc: amy.shih, oakley.ding, jia.sui, Jean Delvare, Guenter Roeck,
linux-hwmon, linux-kernel
From: "amy.shih" <amy.shih@advantech.com.tw>
In function nct7904_write_fan, the return code is either 0 or an
error code. 0x1fff is not a valid return code. Thus, set return
code to 0 when setting value is smaller or equal to 0.
Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
---
Changes in v2:
- Fix wrong return code 0x1fff in function nct7904_write_fan.
drivers/hwmon/nct7904.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index 95348eebe8e4..3fa3eb31d176 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -551,7 +551,7 @@ static int nct7904_write_fan(struct device *dev, u32 attr, int channel,
switch (attr) {
case hwmon_fan_min:
if (val <= 0)
- return 0x1fff;
+ return 0;
val = clamp_val((1350000 + (val >> 1)) / val, 1, 0x1fff);
tmp = (val >> 5) & 0xff;
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [v2 7/9] hwmon: (nct7904) Delete wrong comment in function nct7904_write_in.
2019-06-17 8:08 [v2 1/9] hwmon: (nct7904) Add error handling in probe function Amy.Shih
` (4 preceding siblings ...)
2019-06-17 8:14 ` [v2 6/9] hwmon: (nct7904) Fix wrong return code in function nct7904_write_fan Amy.Shih
@ 2019-06-17 8:15 ` Amy.Shih
2019-06-17 8:16 ` [v2 8/9] hwmon: (nct7904) Fix wrong attribute names for temperature Amy.Shih
2019-06-17 8:22 ` [v2 9/9] hwmon: (nct7904) Fix wrong registers setting " Amy.Shih
7 siblings, 0 replies; 11+ messages in thread
From: Amy.Shih @ 2019-06-17 8:15 UTC (permalink / raw)
To: she90122
Cc: amy.shih, oakley.ding, jia.sui, Jean Delvare, Guenter Roeck,
linux-hwmon, linux-kernel
From: "amy.shih" <amy.shih@advantech.com.tw>
In function nct7904_write_in, delete wrong comment "Bit 15 is sign bit".
Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
---
Changes in v2:
- Delete wrong comment in function nct7904_write_in.
drivers/hwmon/nct7904.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index 3fa3eb31d176..c74f919c0181 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -581,7 +581,7 @@ static int nct7904_write_in(struct device *dev, u32 attr, int channel,
else
val = val / 6; /* 0.006V scale */
- val = clamp_val(val, 0, 0x7ff); /* Bit 15 is sign bit */
+ val = clamp_val(val, 0, 0x7ff);
switch (attr) {
case hwmon_in_min:
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [v2 8/9] hwmon: (nct7904) Fix wrong attribute names for temperature.
2019-06-17 8:08 [v2 1/9] hwmon: (nct7904) Add error handling in probe function Amy.Shih
` (5 preceding siblings ...)
2019-06-17 8:15 ` [v2 7/9] hwmon: (nct7904) Delete wrong comment in function nct7904_write_in Amy.Shih
@ 2019-06-17 8:16 ` Amy.Shih
2019-06-17 8:20 ` Amy.Shih
2019-06-17 8:22 ` [v2 9/9] hwmon: (nct7904) Fix wrong registers setting " Amy.Shih
7 siblings, 1 reply; 11+ messages in thread
From: Amy.Shih @ 2019-06-17 8:16 UTC (permalink / raw)
To: she90122
Cc: amy.shih, oakley.ding, jia.sui, Jean Delvare, Guenter Roeck,
linux-hwmon, linux-kernel
From: "amy.shih" <amy.shih@advantech.com.tw>
Emergency attributes without crit attributes are not acceptable.
In datasheet there are registers labeled "critical", and there is
no mention of "emergency". Thus, set the attribute names from
"temp[1-*]_emergency" and "temp[1-*]_emergency_hyst" to
"temp[1-*]_crit" and "temp[1-*]_crit_hyst".
Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
---
Changes in v2:
- Fix wrong attribute names for temperature.
drivers/hwmon/nct7904.c | 48 ++++++++++++++++++++---------------------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index c74f919c0181..fc145c73a4e7 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -407,12 +407,12 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
reg2 = TEMP_CH1_CH_REG;
reg3 = DTS_T_CPU1_CH_REG;
break;
- case hwmon_temp_emergency:
+ case hwmon_temp_crit:
reg1 = LTD_HV_LL_REG;
reg2 = TEMP_CH1_W_REG;
reg3 = DTS_T_CPU1_W_REG;
break;
- case hwmon_temp_emergency_hyst:
+ case hwmon_temp_crit_hyst:
reg1 = LTD_LV_LL_REG;
reg2 = TEMP_CH1_WH_REG;
reg3 = DTS_T_CPU1_WH_REG;
@@ -454,8 +454,8 @@ static umode_t nct7904_temp_is_visible(const void *_data, u32 attr, int channel)
break;
case hwmon_temp_max:
case hwmon_temp_max_hyst:
- case hwmon_temp_emergency:
- case hwmon_temp_emergency_hyst:
+ case hwmon_temp_crit:
+ case hwmon_temp_crit_hyst:
if (channel < 5) {
if (data->tcpu_mask & BIT(channel))
return 0644;
@@ -516,12 +516,12 @@ static int nct7904_write_temp(struct device *dev, u32 attr, int channel,
reg2 = TEMP_CH1_CH_REG;
reg3 = DTS_T_CPU1_CH_REG;
break;
- case hwmon_temp_emergency:
+ case hwmon_temp_crit:
reg1 = LTD_HV_LL_REG;
reg2 = TEMP_CH1_W_REG;
reg3 = DTS_T_CPU1_W_REG;
break;
- case hwmon_temp_emergency_hyst:
+ case hwmon_temp_crit_hyst:
reg1 = LTD_LV_LL_REG;
reg2 = TEMP_CH1_WH_REG;
reg3 = DTS_T_CPU1_WH_REG;
@@ -799,32 +799,32 @@ static const struct hwmon_channel_info *nct7904_info[] = {
HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST),
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST),
NULL
};
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [v2 8/9] hwmon: (nct7904) Fix wrong attribute names for temperature.
2019-06-17 8:16 ` [v2 8/9] hwmon: (nct7904) Fix wrong attribute names for temperature Amy.Shih
@ 2019-06-17 8:20 ` Amy.Shih
0 siblings, 0 replies; 11+ messages in thread
From: Amy.Shih @ 2019-06-17 8:20 UTC (permalink / raw)
To: she90122
Cc: amy.shih, oakley.ding, jia.sui, Jean Delvare, Guenter Roeck,
linux-hwmon, linux-kernel
From: "amy.shih" <amy.shih@advantech.com.tw>
Emergency attributes without crit attributes are not acceptable.
In datasheet there are registers labeled "critical", and there is
no mention of "emergency". Thus, set the attribute names from
"temp[1-*]_emergency" and "temp[1-*]_emergency_hyst" to
"temp[1-*]_crit" and "temp[1-*]_crit_hyst".
Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
---
Changes in v2:
- Fix wrong attribute names for temperature.
drivers/hwmon/nct7904.c | 48 ++++++++++++++++++++---------------------
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index c74f919c0181..fc145c73a4e7 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -407,12 +407,12 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
reg2 = TEMP_CH1_CH_REG;
reg3 = DTS_T_CPU1_CH_REG;
break;
- case hwmon_temp_emergency:
+ case hwmon_temp_crit:
reg1 = LTD_HV_LL_REG;
reg2 = TEMP_CH1_W_REG;
reg3 = DTS_T_CPU1_W_REG;
break;
- case hwmon_temp_emergency_hyst:
+ case hwmon_temp_crit_hyst:
reg1 = LTD_LV_LL_REG;
reg2 = TEMP_CH1_WH_REG;
reg3 = DTS_T_CPU1_WH_REG;
@@ -454,8 +454,8 @@ static umode_t nct7904_temp_is_visible(const void *_data, u32 attr, int channel)
break;
case hwmon_temp_max:
case hwmon_temp_max_hyst:
- case hwmon_temp_emergency:
- case hwmon_temp_emergency_hyst:
+ case hwmon_temp_crit:
+ case hwmon_temp_crit_hyst:
if (channel < 5) {
if (data->tcpu_mask & BIT(channel))
return 0644;
@@ -516,12 +516,12 @@ static int nct7904_write_temp(struct device *dev, u32 attr, int channel,
reg2 = TEMP_CH1_CH_REG;
reg3 = DTS_T_CPU1_CH_REG;
break;
- case hwmon_temp_emergency:
+ case hwmon_temp_crit:
reg1 = LTD_HV_LL_REG;
reg2 = TEMP_CH1_W_REG;
reg3 = DTS_T_CPU1_W_REG;
break;
- case hwmon_temp_emergency_hyst:
+ case hwmon_temp_crit_hyst:
reg1 = LTD_LV_LL_REG;
reg2 = TEMP_CH1_WH_REG;
reg3 = DTS_T_CPU1_WH_REG;
@@ -799,32 +799,32 @@ static const struct hwmon_channel_info *nct7904_info[] = {
HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
HWMON_CHANNEL_INFO(temp,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST,
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST,
HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
- HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
- HWMON_T_EMERGENCY_HYST),
+ HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_CRIT |
+ HWMON_T_CRIT_HYST),
NULL
};
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [v2 9/9] hwmon: (nct7904) Fix wrong registers setting for temperature.
2019-06-17 8:08 [v2 1/9] hwmon: (nct7904) Add error handling in probe function Amy.Shih
` (6 preceding siblings ...)
2019-06-17 8:16 ` [v2 8/9] hwmon: (nct7904) Fix wrong attribute names for temperature Amy.Shih
@ 2019-06-17 8:22 ` Amy.Shih
7 siblings, 0 replies; 11+ messages in thread
From: Amy.Shih @ 2019-06-17 8:22 UTC (permalink / raw)
To: she90122
Cc: amy.shih, oakley.ding, jia.sui, Jean Delvare, Guenter Roeck,
linux-hwmon, linux-kernel
From: "amy.shih" <amy.shih@advantech.com.tw>
For "attributes temp[1-*]_max" and "temp[1-*]_max_hyst", should
show the reading of "WARNING TEMPERATURE" and "WARNING TEMPERATURE
HYSTERESIS" registers. For attribute "temp[1-*]_crit" and
"temp[1-*]_crit_hyst", shuld show the reading of "CRITICAL TEMPERATURE"
and "CRITICAL TEMPERATURE HYSTERESIS" registers in datasheet.
Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
---
Changes in v2:
- Fix wrong registers setting for temperature.
drivers/hwmon/nct7904.c | 32 ++++++++++++++++----------------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index fc145c73a4e7..d842c10ba11f 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -399,23 +399,23 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
return 0;
case hwmon_temp_max:
reg1 = LTD_HV_HL_REG;
- reg2 = TEMP_CH1_C_REG;
- reg3 = DTS_T_CPU1_C_REG;
+ reg2 = TEMP_CH1_W_REG;
+ reg3 = DTS_T_CPU1_W_REG;
break;
case hwmon_temp_max_hyst:
reg1 = LTD_LV_HL_REG;
- reg2 = TEMP_CH1_CH_REG;
- reg3 = DTS_T_CPU1_CH_REG;
+ reg2 = TEMP_CH1_WH_REG;
+ reg3 = DTS_T_CPU1_WH_REG;
break;
case hwmon_temp_crit:
reg1 = LTD_HV_LL_REG;
- reg2 = TEMP_CH1_W_REG;
- reg3 = DTS_T_CPU1_W_REG;
+ reg2 = TEMP_CH1_C_REG;
+ reg3 = DTS_T_CPU1_C_REG;
break;
case hwmon_temp_crit_hyst:
reg1 = LTD_LV_LL_REG;
- reg2 = TEMP_CH1_WH_REG;
- reg3 = DTS_T_CPU1_WH_REG;
+ reg2 = TEMP_CH1_CH_REG;
+ reg3 = DTS_T_CPU1_CH_REG;
break;
default:
return -EOPNOTSUPP;
@@ -508,23 +508,23 @@ static int nct7904_write_temp(struct device *dev, u32 attr, int channel,
switch (attr) {
case hwmon_temp_max:
reg1 = LTD_HV_HL_REG;
- reg2 = TEMP_CH1_C_REG;
- reg3 = DTS_T_CPU1_C_REG;
+ reg2 = TEMP_CH1_W_REG;
+ reg3 = DTS_T_CPU1_W_REG;
break;
case hwmon_temp_max_hyst:
reg1 = LTD_LV_HL_REG;
- reg2 = TEMP_CH1_CH_REG;
- reg3 = DTS_T_CPU1_CH_REG;
+ reg2 = TEMP_CH1_WH_REG;
+ reg3 = DTS_T_CPU1_WH_REG;
break;
case hwmon_temp_crit:
reg1 = LTD_HV_LL_REG;
- reg2 = TEMP_CH1_W_REG;
- reg3 = DTS_T_CPU1_W_REG;
+ reg2 = TEMP_CH1_C_REG;
+ reg3 = DTS_T_CPU1_C_REG;
break;
case hwmon_temp_crit_hyst:
reg1 = LTD_LV_LL_REG;
- reg2 = TEMP_CH1_WH_REG;
- reg3 = DTS_T_CPU1_WH_REG;
+ reg2 = TEMP_CH1_CH_REG;
+ reg3 = DTS_T_CPU1_CH_REG;
break;
default:
return -EOPNOTSUPP;
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [v2 3/9] hwmon: (nct7904) Add extra sysfs support for fan, voltage and temperature.
@ 2019-06-28 17:31 Guenter Roeck
0 siblings, 0 replies; 11+ messages in thread
From: Guenter Roeck @ 2019-06-28 17:31 UTC (permalink / raw)
To: Amy.Shih
Cc: she90122, oakley.ding, jia.sui, Jean Delvare, linux-hwmon, linux-kernel
On Mon, Jun 17, 2019 at 08:11:07AM +0000, Amy.Shih@advantech.com.tw wrote:
> From: "amy.shih" <amy.shih@advantech.com.tw>
>
> NCT-7904D also supports reading of channel limitation registers
> and SMI status registers for fan, voltage and temperature monitoring,
> and also supports reading of temperature sensor type which is thermal
> diode, thermistor, AMD SB-TSI or Intel PECI, thus add below sysfs nodes:
>
> -fan[1-*]_min
> -fan[1-*]_alarm
> -in[1-*]_min
> -in[1-*]_max
> -in[1-*]_alarm
> -temp[1-*]_max
> -temp[1-*]_max_hyst
> -temp[1-*]_emergency
> -temp[1-*]_emergency_hyst
> -temp[1-*]_alarm
> -temp[1-*]_type
>
> Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
Please resend from here with subsequent fixes of this patch squashed
into it.
Thanks,
Guenter
> ---
> Changes in v2:
> - Fix bad fallthrough in various switch statements.
> - Fix the wrong declared of tmp as u8 in nct7904_write_in, declared tmp to int.
>
> drivers/hwmon/nct7904.c | 469 ++++++++++++++++++++++++++++++++++++----
> 1 file changed, 424 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
> index 710c30562fc1..cdd67932938d 100644
> --- a/drivers/hwmon/nct7904.c
> +++ b/drivers/hwmon/nct7904.c
> @@ -46,10 +46,33 @@
> #define DTS_T_CTRL1_REG 0x27
> #define VT_ADC_MD_REG 0x2E
>
> +#define VSEN1_HV_LL_REG 0x02 /* Bank 1; 2 regs (HV/LV) per sensor */
> +#define VSEN1_LV_LL_REG 0x03 /* Bank 1; 2 regs (HV/LV) per sensor */
> +#define VSEN1_HV_HL_REG 0x00 /* Bank 1; 2 regs (HV/LV) per sensor */
> +#define VSEN1_LV_HL_REG 0x01 /* Bank 1; 2 regs (HV/LV) per sensor */
> +#define SMI_STS1_REG 0xC1 /* Bank 0; SMI Status Register */
> +#define SMI_STS5_REG 0xC5 /* Bank 0; SMI Status Register */
> +#define SMI_STS7_REG 0xC7 /* Bank 0; SMI Status Register */
> +#define SMI_STS8_REG 0xC8 /* Bank 0; SMI Status Register */
> +
> #define VSEN1_HV_REG 0x40 /* Bank 0; 2 regs (HV/LV) per sensor */
> #define TEMP_CH1_HV_REG 0x42 /* Bank 0; same as VSEN2_HV */
> #define LTD_HV_REG 0x62 /* Bank 0; 2 regs in VSEN range */
> +#define LTD_HV_HL_REG 0x44 /* Bank 1; 1 reg for LTD */
> +#define LTD_LV_HL_REG 0x45 /* Bank 1; 1 reg for LTD */
> +#define LTD_HV_LL_REG 0x46 /* Bank 1; 1 reg for LTD */
> +#define LTD_LV_LL_REG 0x47 /* Bank 1; 1 reg for LTD */
> +#define TEMP_CH1_CH_REG 0x05 /* Bank 1; 1 reg for LTD */
> +#define TEMP_CH1_W_REG 0x06 /* Bank 1; 1 reg for LTD */
> +#define TEMP_CH1_WH_REG 0x07 /* Bank 1; 1 reg for LTD */
> +#define TEMP_CH1_C_REG 0x04 /* Bank 1; 1 reg per sensor */
> +#define DTS_T_CPU1_C_REG 0x90 /* Bank 1; 1 reg per sensor */
> +#define DTS_T_CPU1_CH_REG 0x91 /* Bank 1; 1 reg per sensor */
> +#define DTS_T_CPU1_W_REG 0x92 /* Bank 1; 1 reg per sensor */
> +#define DTS_T_CPU1_WH_REG 0x93 /* Bank 1; 1 reg per sensor */
> #define FANIN1_HV_REG 0x80 /* Bank 0; 2 regs (HV/LV) per sensor */
> +#define FANIN1_HV_HL_REG 0x60 /* Bank 1; 2 regs (HV/LV) per sensor */
> +#define FANIN1_LV_HL_REG 0x61 /* Bank 1; 2 regs (HV/LV) per sensor */
> #define T_CPU1_HV_REG 0xA0 /* Bank 0; 2 regs (HV/LV) per sensor */
>
> #define PRTS_REG 0x03 /* Bank 2 */
> @@ -58,6 +81,8 @@
> #define FANCTL1_FMR_REG 0x00 /* Bank 3; 1 reg per channel */
> #define FANCTL1_OUT_REG 0x10 /* Bank 3; 1 reg per channel */
>
> +#define ENABLE_TSI BIT(1)
> +
> static const unsigned short normal_i2c[] = {
> 0x2d, 0x2e, I2C_CLIENT_END
> };
> @@ -72,6 +97,7 @@ struct nct7904_data {
> u8 fan_mode[FANCTL_MAX];
> u8 enable_dts;
> u8 has_dts;
> + u8 temp_mode; /* 0: TR mode, 1: TD mode */
> };
>
> /* Access functions */
> @@ -170,6 +196,25 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel,
> rpm = 1350000 / cnt;
> *val = rpm;
> return 0;
> + case hwmon_fan_min:
> + ret = nct7904_read_reg16(data, BANK_1,
> + FANIN1_HV_HL_REG + channel * 2);
> + if (ret < 0)
> + return ret;
> + cnt = ((ret & 0xff00) >> 3) | (ret & 0x1f);
> + if (cnt == 0x1fff)
> + rpm = 0;
> + else
> + rpm = 1350000 / cnt;
> + *val = rpm;
> + return 0;
> + case hwmon_fan_alarm:
> + ret = nct7904_read_reg(data, BANK_0,
> + SMI_STS7_REG + (channel >> 3));
> + if (ret < 0)
> + return ret;
> + *val = (ret >> (channel & 0x07)) & 1;
> + return 0;
> default:
> return -EOPNOTSUPP;
> }
> @@ -179,8 +224,20 @@ static umode_t nct7904_fan_is_visible(const void *_data, u32 attr, int channel)
> {
> const struct nct7904_data *data = _data;
>
> - if (attr == hwmon_fan_input && data->fanin_mask & (1 << channel))
> - return 0444;
> + switch (attr) {
> + case hwmon_fan_input:
> + case hwmon_fan_alarm:
> + if (data->fanin_mask & (1 << channel))
> + return 0444;
> + break;
> + case hwmon_fan_min:
> + if (data->fanin_mask & (1 << channel))
> + return 0644;
> + break;
> + default:
> + break;
> + }
> +
> return 0;
> }
>
> @@ -211,6 +268,37 @@ static int nct7904_read_in(struct device *dev, u32 attr, int channel,
> volt *= 6; /* 0.006V scale */
> *val = volt;
> return 0;
> + case hwmon_in_min:
> + ret = nct7904_read_reg16(data, BANK_1,
> + VSEN1_HV_LL_REG + index * 4);
> + if (ret < 0)
> + return ret;
> + volt = ((ret & 0xff00) >> 5) | (ret & 0x7);
> + if (index < 14)
> + volt *= 2; /* 0.002V scale */
> + else
> + volt *= 6; /* 0.006V scale */
> + *val = volt;
> + return 0;
> + case hwmon_in_max:
> + ret = nct7904_read_reg16(data, BANK_1,
> + VSEN1_HV_HL_REG + index * 4);
> + if (ret < 0)
> + return ret;
> + volt = ((ret & 0xff00) >> 5) | (ret & 0x7);
> + if (index < 14)
> + volt *= 2; /* 0.002V scale */
> + else
> + volt *= 6; /* 0.006V scale */
> + *val = volt;
> + return 0;
> + case hwmon_in_alarm:
> + ret = nct7904_read_reg(data, BANK_0,
> + SMI_STS1_REG + (index >> 3));
> + if (ret < 0)
> + return ret;
> + *val = (ret >> (index & 0x07)) & 1;
> + return 0;
> default:
> return -EOPNOTSUPP;
> }
> @@ -221,9 +309,20 @@ static umode_t nct7904_in_is_visible(const void *_data, u32 attr, int channel)
> const struct nct7904_data *data = _data;
> int index = nct7904_chan_to_index[channel];
>
> - if (channel > 0 && attr == hwmon_in_input &&
> - (data->vsen_mask & BIT(index)))
> - return 0444;
> + switch (attr) {
> + case hwmon_in_input:
> + case hwmon_in_alarm:
> + if (channel > 0 && (data->vsen_mask & BIT(index)))
> + return 0444;
> + break;
> + case hwmon_in_min:
> + case hwmon_in_max:
> + if (channel > 0 && (data->vsen_mask & BIT(index)))
> + return 0644;
> + break;
> + default:
> + break;
> + }
>
> return 0;
> }
> @@ -233,6 +332,7 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
> {
> struct nct7904_data *data = dev_get_drvdata(dev);
> int ret, temp;
> + unsigned int reg1, reg2, reg3;
>
> switch (attr) {
> case hwmon_temp_input:
> @@ -250,16 +350,100 @@ static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
> temp = ((ret & 0xff00) >> 5) | (ret & 0x7);
> *val = sign_extend32(temp, 10) * 125;
> return 0;
> + case hwmon_temp_alarm:
> + if (channel < 5) {
> + ret = nct7904_read_reg(data, BANK_0,
> + SMI_STS1_REG);
> + if (ret < 0)
> + return ret;
> + *val = (ret >> (channel & 0x07)) & 1;
> + } else {
> + if ((channel - 5) < 4) {
> + ret = nct7904_read_reg(data, BANK_0,
> + SMI_STS7_REG +
> + ((channel - 5) >> 3));
> + if (ret < 0)
> + return ret;
> + *val = (ret >> ((channel - 5) & 0x07)) & 1;
> + } else {
> + ret = nct7904_read_reg(data, BANK_0,
> + SMI_STS8_REG +
> + ((channel - 5) >> 3));
> + if (ret < 0)
> + return ret;
> + *val = (ret >> (((channel - 5) & 0x07) - 4))
> + & 1;
> + }
> + }
> + return 0;
> + case hwmon_temp_type:
> + if (channel < 5) {
> + if ((data->tcpu_mask >> channel) & 0x01) {
> + if ((data->temp_mode >> channel) & 0x01)
> + *val = 3; /* TD */
> + else
> + *val = 4; /* TR */
> + } else {
> + *val = 0;
> + }
> + } else {
> + if ((data->has_dts >> (channel - 5)) & 0x01) {
> + if (data->enable_dts & ENABLE_TSI)
> + *val = 5; /* TSI */
> + else
> + *val = 6; /* PECI */
> + } else {
> + *val = 0;
> + }
> + }
> + return 0;
> + case hwmon_temp_max:
> + reg1 = LTD_HV_HL_REG;
> + reg2 = TEMP_CH1_C_REG;
> + reg3 = DTS_T_CPU1_C_REG;
> + break;
> + case hwmon_temp_max_hyst:
> + reg1 = LTD_LV_HL_REG;
> + reg2 = TEMP_CH1_CH_REG;
> + reg3 = DTS_T_CPU1_CH_REG;
> + break;
> + case hwmon_temp_emergency:
> + reg1 = LTD_HV_LL_REG;
> + reg2 = TEMP_CH1_W_REG;
> + reg3 = DTS_T_CPU1_W_REG;
> + break;
> + case hwmon_temp_emergency_hyst:
> + reg1 = LTD_LV_LL_REG;
> + reg2 = TEMP_CH1_WH_REG;
> + reg3 = DTS_T_CPU1_WH_REG;
> + break;
> default:
> return -EOPNOTSUPP;
> }
> +
> + if (channel == 4)
> + ret = nct7904_read_reg(data, BANK_1, reg1);
> + else if (channel < 5)
> + ret = nct7904_read_reg(data, BANK_1,
> + reg2 + channel * 8);
> + else
> + ret = nct7904_read_reg(data, BANK_1,
> + reg3 + (channel - 5) * 4);
> +
> + if (ret < 0)
> + return ret;
> + *val = ret * 1000;
> + return 0;
> }
>
> static umode_t nct7904_temp_is_visible(const void *_data, u32 attr, int channel)
> {
> const struct nct7904_data *data = _data;
>
> - if (attr == hwmon_temp_input) {
> + switch (attr) {
> + case hwmon_temp_input:
> + case hwmon_temp_alarm:
> + case hwmon_temp_type:
> if (channel < 5) {
> if (data->tcpu_mask & BIT(channel))
> return 0444;
> @@ -267,6 +451,21 @@ static umode_t nct7904_temp_is_visible(const void *_data, u32 attr, int channel)
> if (data->has_dts & BIT(channel - 5))
> return 0444;
> }
> + break;
> + case hwmon_temp_max:
> + case hwmon_temp_max_hyst:
> + case hwmon_temp_emergency:
> + case hwmon_temp_emergency_hyst:
> + if (channel < 5) {
> + if (data->tcpu_mask & BIT(channel))
> + return 0644;
> + } else {
> + if (data->has_dts & BIT(channel - 5))
> + return 0644;
> + }
> + break;
> + default:
> + break;
> }
>
> return 0;
> @@ -297,6 +496,137 @@ static int nct7904_read_pwm(struct device *dev, u32 attr, int channel,
> }
> }
>
> +static int nct7904_write_temp(struct device *dev, u32 attr, int channel,
> + long val)
> +{
> + struct nct7904_data *data = dev_get_drvdata(dev);
> + int ret;
> + unsigned int reg1, reg2, reg3;
> +
> + val = clamp_val(val / 1000, -128, 127);
> +
> + switch (attr) {
> + case hwmon_temp_max:
> + reg1 = LTD_HV_HL_REG;
> + reg2 = TEMP_CH1_C_REG;
> + reg3 = DTS_T_CPU1_C_REG;
> + break;
> + case hwmon_temp_max_hyst:
> + reg1 = LTD_LV_HL_REG;
> + reg2 = TEMP_CH1_CH_REG;
> + reg3 = DTS_T_CPU1_CH_REG;
> + break;
> + case hwmon_temp_emergency:
> + reg1 = LTD_HV_LL_REG;
> + reg2 = TEMP_CH1_W_REG;
> + reg3 = DTS_T_CPU1_W_REG;
> + break;
> + case hwmon_temp_emergency_hyst:
> + reg1 = LTD_LV_LL_REG;
> + reg2 = TEMP_CH1_WH_REG;
> + reg3 = DTS_T_CPU1_WH_REG;
> + break;
> + default:
> + return -EOPNOTSUPP;
> + }
> + if (channel == 4)
> + ret = nct7904_write_reg(data, BANK_1, reg1, val);
> + else if (channel < 5)
> + ret = nct7904_write_reg(data, BANK_1,
> + reg2 + channel * 8, val);
> + else
> + ret = nct7904_write_reg(data, BANK_1,
> + reg3 + (channel - 5) * 4, val);
> +
> + return ret;
> +}
> +
> +static int nct7904_write_fan(struct device *dev, u32 attr, int channel,
> + long val)
> +{
> + struct nct7904_data *data = dev_get_drvdata(dev);
> + int ret;
> + u8 tmp;
> +
> + switch (attr) {
> + case hwmon_fan_min:
> + if (val <= 0)
> + return 0x1fff;
> +
> + val = clamp_val((1350000 + (val >> 1)) / val, 1, 0x1fff);
> + tmp = (val >> 5) & 0xff;
> + ret = nct7904_write_reg(data, BANK_1,
> + FANIN1_HV_HL_REG + channel * 2, tmp);
> + if (ret < 0)
> + return ret;
> + tmp = val & 0x1f;
> + ret = nct7904_write_reg(data, BANK_1,
> + FANIN1_LV_HL_REG + channel * 2, tmp);
> + return ret;
> + default:
> + return -EOPNOTSUPP;
> + }
> +}
> +
> +static int nct7904_write_in(struct device *dev, u32 attr, int channel,
> + long val)
> +{
> + struct nct7904_data *data = dev_get_drvdata(dev);
> + int ret, index, tmp;
> +
> + index = nct7904_chan_to_index[channel];
> +
> + if (index < 14)
> + val = val / 2; /* 0.002V scale */
> + else
> + val = val / 6; /* 0.006V scale */
> +
> + val = clamp_val(val, 0, 0x7ff); /* Bit 15 is sign bit */
> +
> + switch (attr) {
> + case hwmon_in_min:
> + tmp = nct7904_read_reg(data, BANK_1,
> + VSEN1_LV_LL_REG + index * 4);
> + if (tmp < 0)
> + return tmp;
> + tmp &= ~0x7;
> + tmp |= val & 0x7;
> + ret = nct7904_write_reg(data, BANK_1,
> + VSEN1_LV_LL_REG + index * 4, tmp);
> + if (ret < 0)
> + return ret;
> + tmp = nct7904_read_reg(data, BANK_1,
> + VSEN1_HV_LL_REG + index * 4);
> + if (tmp < 0)
> + return tmp;
> + tmp = (val >> 3) & 0xff;
> + ret = nct7904_write_reg(data, BANK_1,
> + VSEN1_HV_LL_REG + index * 4, tmp);
> + return ret;
> + case hwmon_in_max:
> + tmp = nct7904_read_reg(data, BANK_1,
> + VSEN1_LV_HL_REG + index * 4);
> + if (tmp < 0)
> + return tmp;
> + tmp &= ~0x7;
> + tmp |= val & 0x7;
> + ret = nct7904_write_reg(data, BANK_1,
> + VSEN1_LV_HL_REG + index * 4, tmp);
> + if (ret < 0)
> + return ret;
> + tmp = nct7904_read_reg(data, BANK_1,
> + VSEN1_HV_LL_REG + index * 4);
> + if (tmp < 0)
> + return tmp;
> + tmp = (val >> 3) & 0xff;
> + ret = nct7904_write_reg(data, BANK_1,
> + VSEN1_HV_LL_REG + index * 4, tmp);
> + return ret;
> + default:
> + return -EOPNOTSUPP;
> + }
> +}
> +
> static int nct7904_write_pwm(struct device *dev, u32 attr, int channel,
> long val)
> {
> @@ -354,8 +684,14 @@ static int nct7904_write(struct device *dev, enum hwmon_sensor_types type,
> u32 attr, int channel, long val)
> {
> switch (type) {
> + case hwmon_in:
> + return nct7904_write_in(dev, attr, channel, val);
> + case hwmon_fan:
> + return nct7904_write_fan(dev, attr, channel, val);
> case hwmon_pwm:
> return nct7904_write_pwm(dev, attr, channel, val);
> + case hwmon_temp:
> + return nct7904_write_temp(dev, attr, channel, val);
> default:
> return -EOPNOTSUPP;
> }
> @@ -404,51 +740,91 @@ static int nct7904_detect(struct i2c_client *client,
>
> static const struct hwmon_channel_info *nct7904_info[] = {
> HWMON_CHANNEL_INFO(in,
> - HWMON_I_INPUT, /* dummy, skipped in is_visible */
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT,
> - HWMON_I_INPUT),
> + /* dummy, skipped in is_visible */
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM,
> + HWMON_I_INPUT | HWMON_I_MIN | HWMON_I_MAX |
> + HWMON_I_ALARM),
> HWMON_CHANNEL_INFO(fan,
> - HWMON_F_INPUT,
> - HWMON_F_INPUT,
> - HWMON_F_INPUT,
> - HWMON_F_INPUT,
> - HWMON_F_INPUT,
> - HWMON_F_INPUT,
> - HWMON_F_INPUT,
> - HWMON_F_INPUT),
> + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
> + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
> + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
> + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
> + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
> + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
> + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM,
> + HWMON_F_INPUT | HWMON_F_MIN | HWMON_F_ALARM),
> HWMON_CHANNEL_INFO(pwm,
> HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
> HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
> HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
> HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
> HWMON_CHANNEL_INFO(temp,
> - HWMON_T_INPUT,
> - HWMON_T_INPUT,
> - HWMON_T_INPUT,
> - HWMON_T_INPUT,
> - HWMON_T_INPUT,
> - HWMON_T_INPUT,
> - HWMON_T_INPUT,
> - HWMON_T_INPUT,
> - HWMON_T_INPUT),
> + HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
> + HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
> + HWMON_T_EMERGENCY_HYST,
> + HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
> + HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
> + HWMON_T_EMERGENCY_HYST,
> + HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
> + HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
> + HWMON_T_EMERGENCY_HYST,
> + HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
> + HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
> + HWMON_T_EMERGENCY_HYST,
> + HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
> + HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
> + HWMON_T_EMERGENCY_HYST,
> + HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
> + HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
> + HWMON_T_EMERGENCY_HYST,
> + HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
> + HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
> + HWMON_T_EMERGENCY_HYST,
> + HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
> + HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
> + HWMON_T_EMERGENCY_HYST,
> + HWMON_T_INPUT | HWMON_T_ALARM | HWMON_T_MAX |
> + HWMON_T_MAX_HYST | HWMON_T_TYPE | HWMON_T_EMERGENCY |
> + HWMON_T_EMERGENCY_HYST),
> NULL
> };
>
> @@ -530,11 +906,14 @@ static int nct7904_probe(struct i2c_client *client,
> if (ret < 0)
> return ret;
>
> + data->temp_mode = 0;
> for (i = 0; i < 4; i++) {
> val = (ret & (0x03 << i)) >> (i * 2);
> bit = (1 << i);
> if (val == 0)
> data->tcpu_mask &= ~bit;
> + else if (val == 0x1 || val == 0x2)
> + data->temp_mode |= bit;
> }
>
> /* PECI */
> @@ -557,7 +936,7 @@ static int nct7904_probe(struct i2c_client *client,
> if (ret < 0)
> return ret;
> data->has_dts = ret & 0xF;
> - if (data->enable_dts & 0x2) {
> + if (data->enable_dts & ENABLE_TSI) {
> ret = nct7904_read_reg(data, BANK_0, DTS_T_CTRL1_REG);
> if (ret < 0)
> return ret;
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2019-06-28 17:31 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-17 8:08 [v2 1/9] hwmon: (nct7904) Add error handling in probe function Amy.Shih
2019-06-17 8:10 ` [v2 2/9] hwmon: (nct7904) Changes comments " Amy.Shih
2019-06-17 8:11 ` [v2 3/9] hwmon: (nct7904) Add extra sysfs support for fan, voltage and temperature Amy.Shih
2019-06-17 8:11 ` [v2 4/9] hwmon: (nct7904) Fix incorrect register setting for the high value high limit of voltage Amy.Shih
2019-06-17 8:12 ` [v2 5/9] hwmon: (nct7904) Fix incorrect register bit mapping of temperature alarm Amy.Shih
2019-06-17 8:14 ` [v2 6/9] hwmon: (nct7904) Fix wrong return code in function nct7904_write_fan Amy.Shih
2019-06-17 8:15 ` [v2 7/9] hwmon: (nct7904) Delete wrong comment in function nct7904_write_in Amy.Shih
2019-06-17 8:16 ` [v2 8/9] hwmon: (nct7904) Fix wrong attribute names for temperature Amy.Shih
2019-06-17 8:20 ` Amy.Shih
2019-06-17 8:22 ` [v2 9/9] hwmon: (nct7904) Fix wrong registers setting " Amy.Shih
2019-06-28 17:31 [v2 3/9] hwmon: (nct7904) Add extra sysfs support for fan, voltage and temperature Guenter Roeck
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