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From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
To: Michael Walle <michael@walle.cc>
Cc: "Miquel Raynal" <miquel.raynal@bootlin.com>,
	"Richard Weinberger" <richard@nod.at>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Shawn Guo" <shawnguo@kernel.org>, "Li Yang" <leoyang.li@nxp.com>,
	"Rafał Miłecki" <rafal@milecki.pl>,
	"David S . Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@google.com>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Paolo Abeni" <pabeni@redhat.com>,
	"Frank Rowand" <frowand.list@gmail.com>,
	linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org,
	"Ahmad Fatoum" <a.fatoum@pengutronix.de>
Subject: Re: [PATCH v1 06/14] nvmem: core: introduce NVMEM layouts
Date: Tue, 30 Aug 2022 16:23:22 +0100	[thread overview]
Message-ID: <f79b7992-2170-bc31-74ca-4767ba870791@linaro.org> (raw)
In-Reply-To: <c2e3a05339d54123de539fd124e874bb@walle.cc>



On 30/08/2022 16:02, Michael Walle wrote:
> Am 2022-08-30 16:43, schrieb Srinivas Kandagatla:
> 
>>>>> diff --git a/drivers/nvmem/layouts/Makefile 
>>>>> b/drivers/nvmem/layouts/Makefile
>>>>> new file mode 100644
>>>>> index 000000000000..6fdb3c60a4fa
>>>>> --- /dev/null
>>>>> +++ b/drivers/nvmem/layouts/Makefile
>>>>> @@ -0,0 +1,4 @@
>>>>> +# SPDX-License-Identifier: GPL-2.0
>>>>> +#
>>>>> +# Makefile for nvmem layouts.
>>>>> +#
>>>>> diff --git a/include/linux/nvmem-provider.h 
>>>>> b/include/linux/nvmem-provider.h
>>>>> index e710404959e7..323685841e9f 100644
>>>>> --- a/include/linux/nvmem-provider.h
>>>>> +++ b/include/linux/nvmem-provider.h
>>>>> @@ -127,6 +127,28 @@ struct nvmem_cell_table {
>>>>>       struct list_head    node;
>>>>>   };
>>>>>   +/**
>>>>> + * struct nvmem_layout - NVMEM layout definitions
>>>>> + *
>>>>> + * @name:        Layout name.
>>>>> + * @of_match_table:    Open firmware match table.
>>>>> + * @add_cells:        Will be called if a nvmem device is found which
>>>>> + *            has this layout. The function will add layout
>>>>> + *            specific cells with nvmem_add_one_cell().
>>>>> + * @node:        List node.
>>>>> + *
>>>>> + * A nvmem device can hold a well defined structure which can just be
>>>>> + * evaluated during runtime. For example a TLV list, or a list of 
>>>>> "name=val"
>>>>> + * pairs. A nvmem layout can parse the nvmem device and add 
>>>>> appropriate
>>>>> + * cells.
>>>>> + */
>>>>> +struct nvmem_layout {
>>>>> +    const char *name;
>>>>> +    const struct of_device_id *of_match_table;
>>>>
>>>> looking at this, I think its doable to convert the existing
>>>> cell_post_process callback to layouts by adding a layout specific
>>>> callback here.
>>>
>>> can you elaborate on that?
>>
>> If we relax add_cells + add nvmem_unregister_layout() and update
>> struct nvmem_layout to include post_process callback like
>>
>> struct nvmem_layout {
>>     const char *name;
>>     const struct of_device_id *of_match_table;
>>     int (*add_cells)(struct nvmem_device *nvmem, struct nvmem_layout 
>> *layout);
>>     struct list_head node;
>>     /* default callback for every cell */
>>     nvmem_cell_post_process_t post_process;
>> };
>>
>> then we can move imx-ocotp to this layout style without add_cell
>> callback, and finally get rid of cell_process_callback from both
>> nvmem_config and nvmem_device.
>>
>> If layout specific post_process callback is available and cell does
>> not have a callback set then we can can be either updated cell
>> post_process callback with this one or invoke layout specific callback
>> directly.
>>
>> does that make sense?
> 
> Yes I get what you mean. BUT I'm not so sure; it mixes different
> things together. Layouts will add cells, analogue to
> nvmem_add_cells_from_of() or nvmem_add_cells_from_table(). With
> the hook above, the layout mechanism is abused to add post
> processing to cells added by other means.

We are still defining what layout exactly mean w.r.t to nvmem :-)

> 

There are two aspects to this as nvmem core is concerned

1> parse and add cells based on some provider specific algo/stucture.
2> post process cell data before user can see it.

In some cases we need 1 and 2 while in other cases we just need 1 or 2.

Having an unified interface would help with maintenance and removing 
duplication.

> What is then the difference to the driver having that "global"
> post process hook?

w.r.t post processing there should be no difference.

cell can have no post-processing or a default post processing or a 
specific one depending on its configuration.

> 
> The correct place to add the per-cell hook in this case would be
> nvmem_add_cells_from_of().

yes, that is the place where it should go. we have to work on the 
details but if provider is associated with a layout then this should be 
doable.


--srini
> 
> -michael

  reply	other threads:[~2022-08-30 15:23 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-25 21:44 [PATCH v1 00/14] nvmem: core: introduce NVMEM layouts Michael Walle
2022-08-25 21:44 ` [PATCH v1 01/14] net: add helper eth_addr_add() Michael Walle
2022-09-01 16:26   ` Michael Walle
2022-09-01 16:31     ` Andrew Lunn
2022-09-01 19:54     ` Jakub Kicinski
2022-08-25 21:44 ` [PATCH v1 02/14] of: base: add of_parse_phandle_with_optional_args() Michael Walle
2022-08-25 21:44 ` [PATCH v1 03/14] nvmem: core: add an index parameter to the cell Michael Walle
2022-08-25 21:44 ` [PATCH v1 04/14] nvmem: core: drop the removal of the cells in nvmem_add_cells() Michael Walle
2022-08-25 21:44 ` [PATCH v1 05/14] nvmem: core: add nvmem_add_one_cell() Michael Walle
2022-08-25 21:44 ` [PATCH v1 06/14] nvmem: core: introduce NVMEM layouts Michael Walle
2022-08-26  8:16   ` Michael Walle
2022-08-28 14:06   ` Rafał Miłecki
2022-08-28 14:33     ` Michael Walle
2022-08-30 13:36   ` Srinivas Kandagatla
2022-08-30 14:24     ` Michael Walle
2022-08-30 14:43       ` Srinivas Kandagatla
2022-08-30 15:02         ` Michael Walle
2022-08-30 15:23           ` Srinivas Kandagatla [this message]
2022-08-25 21:44 ` [PATCH v1 07/14] nvmem: core: add per-cell post processing Michael Walle
2022-08-30 13:37   ` Srinivas Kandagatla
2022-08-30 14:20     ` Michael Walle
2022-08-25 21:44 ` [PATCH v1 08/14] dt-bindings: mtd: relax the nvmem compatible string Michael Walle
2022-08-31  7:37   ` Krzysztof Kozlowski
2022-08-31  7:48     ` Michael Walle
2022-08-31  7:55       ` Krzysztof Kozlowski
2022-08-31 21:48   ` Rob Herring
2022-08-31 22:30     ` Michael Walle
2022-09-02 14:46       ` Rob Herring
2022-08-25 21:44 ` [PATCH v1 09/14] dt-bindings: nvmem: add YAML schema for the sl28 vpd layout Michael Walle
2022-08-26 16:05   ` Rob Herring
2022-08-31  7:45   ` Krzysztof Kozlowski
2022-08-31  8:17     ` Michael Walle
2022-08-31  9:24       ` Krzysztof Kozlowski
2022-08-31  9:51         ` Michael Walle
2022-08-31 13:07           ` Krzysztof Kozlowski
2022-08-31 15:29             ` Michael Walle
2022-08-25 21:44 ` [PATCH v1 10/14] nvmem: layouts: add sl28vpd layout Michael Walle
2022-08-25 21:44 ` [PATCH v1 11/14] nvmem: core: export nvmem device size Michael Walle
2022-08-25 21:44 ` [RFC PATCH v1 12/14] nvmem: layouts: rewrite the u-boot-env driver as a NVMEM layout Michael Walle
2022-08-28 14:04   ` Rafał Miłecki
2022-08-28 14:42     ` Michael Walle
2022-08-25 21:44 ` [RFC PATCH v1 13/14] nvmem: layouts: u-boot-env: add device node Michael Walle
2022-08-28 13:55   ` Rafał Miłecki
2022-08-28 14:36     ` Michael Walle
2022-08-25 21:44 ` [PATCH v1 14/14] arm64: dts: ls1028a: sl28: get MAC addresses from VPD Michael Walle
2022-08-28 15:05 ` [PATCH v1 00/14] nvmem: core: introduce NVMEM layouts Rafał Miłecki
2022-08-29  8:22   ` Michael Walle
2022-08-30 13:37     ` Srinivas Kandagatla
2022-08-31  7:48   ` Krzysztof Kozlowski

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