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From: Dan Murphy <dmurphy@ti.com>
To: Florian Fainelli <f.fainelli@gmail.com>, <andrew@lunn.ch>,
	<hkallweit1@gmail.com>, <davem@davemloft.net>, <robh@kernel.org>
Cc: <netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>
Subject: Re: [PATCH net-next v5 4/4] net: dp83869: Add RGMII internal delay configuration
Date: Tue, 2 Jun 2020 18:18:04 -0500	[thread overview]
Message-ID: <f92f70b2-6e42-5bdb-187d-ecd8533b06a6@ti.com> (raw)
In-Reply-To: <6981527b-f155-a46b-574a-2e6621589ca4@gmail.com>

Florian

On 6/2/20 6:13 PM, Florian Fainelli wrote:
>
> On 6/2/2020 4:10 PM, Dan Murphy wrote:
>> Florian
>>
>> On 6/2/20 5:33 PM, Florian Fainelli wrote:
>>> On 6/2/2020 9:45 AM, Dan Murphy wrote:
>>>> Add RGMII internal delay configuration for Rx and Tx.
>>>>
>>>> Signed-off-by: Dan Murphy <dmurphy@ti.com>
>>>> ---
>>> [snip]
>>>
>>>> +
>>>>    enum {
>>>>        DP83869_PORT_MIRRORING_KEEP,
>>>>        DP83869_PORT_MIRRORING_EN,
>>>> @@ -108,6 +113,8 @@ enum {
>>>>    struct dp83869_private {
>>>>        int tx_fifo_depth;
>>>>        int rx_fifo_depth;
>>>> +    s32 rx_id_delay;
>>>> +    s32 tx_id_delay;
>>>>        int io_impedance;
>>>>        int port_mirroring;
>>>>        bool rxctrl_strap_quirk;
>>>> @@ -232,6 +239,22 @@ static int dp83869_of_init(struct phy_device
>>>> *phydev)
>>>>                     &dp83869->tx_fifo_depth))
>>>>            dp83869->tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB;
>>>>    +    ret = of_property_read_u32(of_node, "rx-internal-delay-ps",
>>>> +                   &dp83869->rx_id_delay);
>>>> +    if (ret) {
>>>> +        dp83869->rx_id_delay =
>>>> +                dp83869_internal_delay[DP83869_CLK_DELAY_DEF];
>>>> +        ret = 0;
>>>> +    }
>>>> +
>>>> +    ret = of_property_read_u32(of_node, "tx-internal-delay-ps",
>>>> +                   &dp83869->tx_id_delay);
>>>> +    if (ret) {
>>>> +        dp83869->tx_id_delay =
>>>> +                dp83869_internal_delay[DP83869_CLK_DELAY_DEF];
>>>> +        ret = 0;
>>>> +    }
>>> It is still not clear to me why is not the parsing being done by the PHY
>>> library helper directly?
>> Why would we do that for these properties and not any other?
> Those properties have a standard name, which makes them suitable for
> parsing by the core PHY library.
>> Unless there is a new precedence being set here by having the PHY
>> framework do all the dt node parsing for common properties.
> You could parse the vendor properties through the driver, let the PHY
> library parse the standard properties, and resolve any ordering
> precedence within the driver. In general, I would favor standard
> properties over vendor properties.
>
> Does this help?

Ok so new precedence then.

Because there are common properties like tx-fifo-depth, rx-fifo-depth, 
enet-phy-lane-swap and max_speed that the PHY framework should parse as 
well.

Dan


  reply	other threads:[~2020-06-02 23:30 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-02 16:45 [PATCH net-next v5 0/4] RGMII Internal delay common property Dan Murphy
2020-06-02 16:45 ` [PATCH net-next v5 1/4] dt-bindings: net: Add tx and rx internal delays Dan Murphy
2020-06-02 16:45 ` [PATCH net-next v5 2/4] net: phy: Add a helper to return the index for of the internal delay Dan Murphy
2020-06-02 16:45 ` [PATCH net-next v5 3/4] dt-bindings: net: Add RGMII internal delay for DP83869 Dan Murphy
2020-06-02 16:45 ` [PATCH net-next v5 4/4] net: dp83869: Add RGMII internal delay configuration Dan Murphy
2020-06-02 22:33   ` Florian Fainelli
2020-06-02 23:10     ` Dan Murphy
2020-06-02 23:13       ` Florian Fainelli
2020-06-02 23:18         ` Dan Murphy [this message]
2020-06-02 23:25           ` Dan Murphy

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