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From: Zhou Yanjie <zhouyanjie@wanyeetech.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: linus.walleij@linaro.org, robh+dt@kernel.org,
	linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	hns@goldelico.com, paul@boddie.org.uk, dongsheng.qiu@ingenic.com,
	aric.pzqi@ingenic.com, sernia.zhou@foxmail.com
Subject: Re: [PATCH v2 1/6] pinctrl: Ingenic: Add missing pins to the JZ4770 MAC MII group.
Date: Sat, 13 Mar 2021 16:07:02 +0800	[thread overview]
Message-ID: <f9b18c6d-1d56-7ad3-a7e4-4a52d92b4671@wanyeetech.com> (raw)
In-Reply-To: <HOXUPQ.U0CJV6YXUOYX2@crapouillou.net>

Hi Paul,

On 2021/3/12 下午9:05, Paul Cercueil wrote:
> Hi,
>
> Le jeu. 11 mars 2021 à 23:21, 周琰杰 (Zhou Yanjie) 
> <zhouyanjie@wanyeetech.com> a écrit :
>> The MII group of JZ4770's MAC should have 7 pins, add missing
>> pins to the MII group.
>>
>> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
>
> No Fixes: tag?
> And if the bug wasn't introduced in 5.12-rc1 you'll need to Cc 
> linux-stable as well.
>

Sure, I will add it.


>> ---
>>
>> Notes:
>>     v2:
>>     New patch.
>>
>>  drivers/pinctrl/pinctrl-ingenic.c | 4 +++-
>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/pinctrl/pinctrl-ingenic.c 
>> b/drivers/pinctrl/pinctrl-ingenic.c
>> index f274612..05dfa0a 100644
>> --- a/drivers/pinctrl/pinctrl-ingenic.c
>> +++ b/drivers/pinctrl/pinctrl-ingenic.c
>> @@ -667,7 +667,9 @@ static int jz4770_pwm_pwm7_pins[] = { 0x6b, };
>>  static int jz4770_mac_rmii_pins[] = {
>>      0xa9, 0xab, 0xaa, 0xac, 0xa5, 0xa4, 0xad, 0xae, 0xa6, 0xa8,
>>  };
>> -static int jz4770_mac_mii_pins[] = { 0xa7, 0xaf, };
>> +static int jz4770_mac_mii_pins[] = {
>> +    0x7b, 0x7a, 0x7d, 0x7c, 0xa7, 0x24, 0xaf,
>
> Maybe list them in order?
>

I ordered them in the order of rxd3, rxd2, txd3, txd2, rxclk, crs, col.


> And are you sure that's the whole list? The PM (section 12.2 in 
> jz4770_pm_part3.pdf) lists more pins.
>

Here is the way to imitate the MMC. Use only RMII group when using RMII 
function, use both RMII and MII groups when using MII function. If you 
think it is necessary, I can redefine the MII group.


Thanks and best regards!


> Cheers,
> -Paul
>
>> +};
>>
>>  static const struct group_desc jz4770_groups[] = {
>>      INGENIC_PIN_GROUP("uart0-data", jz4770_uart0_data, 0),
>> -- 
>> 2.7.4
>>
>

  reply	other threads:[~2021-03-13  8:08 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-11 15:21 [PATCH v2 0/6] Fix bugs and add support for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-03-11 15:21 ` [PATCH v2 1/6] pinctrl: Ingenic: Add missing pins to the JZ4770 MAC MII group 周琰杰 (Zhou Yanjie)
2021-03-12 13:05   ` Paul Cercueil
2021-03-13  8:07     ` Zhou Yanjie [this message]
2021-03-11 15:21 ` [PATCH v2 2/6] pinctrl: Ingenic: Add support for read the pin configuration of X1830 周琰杰 (Zhou Yanjie)
2021-03-12 13:31   ` Paul Cercueil
2021-03-13  8:07     ` Zhou Yanjie
2021-03-11 15:21 ` [PATCH v2 3/6] pinctrl: Ingenic: Adjust the sequence of X1830 SSI pin groups 周琰杰 (Zhou Yanjie)
2021-03-12 13:32   ` Paul Cercueil
2021-03-11 15:21 ` [PATCH v2 4/6] pinctrl: Ingenic: Reformat the code 周琰杰 (Zhou Yanjie)
2021-03-12 13:33   ` Paul Cercueil
2021-03-11 15:21 ` [PATCH v2 5/6] dt-bindings: pinctrl: Add bindings for new Ingenic SoCs 周琰杰 (Zhou Yanjie)
2021-03-11 15:21 ` [PATCH v2 6/6] pinctrl: Ingenic: Add support " 周琰杰 (Zhou Yanjie)
2021-03-12 12:50   ` Andy Shevchenko
2021-03-12 13:42   ` Paul Cercueil
2021-03-13  8:07     ` Zhou Yanjie
2021-03-12 12:51 ` [PATCH v2 0/6] Fix bugs and add " Andy Shevchenko

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