linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Adrian Hunter <adrian.hunter@intel.com>
To: "Dmitry Osipenko" <digetx@gmail.com>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Ulf Hansson" <ulf.hansson@linaro.org>,
	"Viresh Kumar" <vireshk@kernel.org>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Peter De Schrijver" <pdeschrijver@nvidia.com>,
	"Mikko Perttunen" <mperttunen@nvidia.com>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Nishanth Menon" <nm@ti.com>,
	"Michael Turquette" <mturquette@baylibre.com>
Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-pwm@vger.kernel.org,
	linux-mmc@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-clk@vger.kernel.org, David Heidelberg <david@ixit.cz>
Subject: Re: [PATCH v16 22/40] mmc: sdhci-tegra: Add runtime PM and OPP support
Date: Thu, 2 Dec 2021 10:16:32 +0200	[thread overview]
Message-ID: <fc60f593-cd74-558d-785f-5f0d2ba179cf@intel.com> (raw)
In-Reply-To: <20211130232347.950-23-digetx@gmail.com>

On 01/12/2021 01:23, Dmitry Osipenko wrote:
> The SDHCI on Tegra belongs to the core power domain and we're going to
> enable GENPD support for the core domain. Now SDHCI must be resumed using
> runtime PM API in order to initialize the SDHCI power state. The SDHCI
> clock rate must be changed using OPP API that will reconfigure the power
> domain performance state in accordance to the rate. Add runtime PM and OPP
> support to the SDHCI driver.
> 
> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
>  drivers/mmc/host/sdhci-tegra.c | 81 +++++++++++++++++++++++++++-------
>  1 file changed, 65 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
> index a5001875876b..6435a75142a6 100644
> --- a/drivers/mmc/host/sdhci-tegra.c
> +++ b/drivers/mmc/host/sdhci-tegra.c
> @@ -15,6 +15,8 @@
>  #include <linux/of.h>
>  #include <linux/of_device.h>
>  #include <linux/pinctrl/consumer.h>
> +#include <linux/pm_opp.h>
> +#include <linux/pm_runtime.h>
>  #include <linux/regulator/consumer.h>
>  #include <linux/reset.h>
>  #include <linux/mmc/card.h>
> @@ -24,6 +26,8 @@
>  #include <linux/gpio/consumer.h>
>  #include <linux/ktime.h>
>  
> +#include <soc/tegra/common.h>
> +
>  #include "sdhci-pltfm.h"
>  #include "cqhci.h"
>  
> @@ -760,7 +764,9 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
>  {
>  	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
>  	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
> +	struct device *dev = mmc_dev(host->mmc);
>  	unsigned long host_clk;
> +	int err;
>  
>  	if (!clock)
>  		return sdhci_set_clock(host, clock);
> @@ -778,7 +784,12 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
>  	 * from clk_get_rate() is used.
>  	 */
>  	host_clk = tegra_host->ddr_signaling ? clock * 2 : clock;
> -	clk_set_rate(pltfm_host->clk, host_clk);
> +
> +	err = dev_pm_opp_set_rate(dev, host_clk);
> +	if (err)
> +		dev_err(dev, "failed to set clk rate to %luHz: %d\n",
> +			host_clk, err);
> +
>  	tegra_host->curr_clk_rate = host_clk;
>  	if (tegra_host->ddr_signaling)
>  		host->max_clk = host_clk;
> @@ -1705,7 +1716,6 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
>  				   "failed to get clock\n");
>  		goto err_clk_get;
>  	}
> -	clk_prepare_enable(clk);
>  	pltfm_host->clk = clk;
>  
>  	tegra_host->rst = devm_reset_control_get_exclusive(&pdev->dev,
> @@ -1716,15 +1726,24 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
>  		goto err_rst_get;
>  	}
>  
> -	rc = reset_control_assert(tegra_host->rst);
> +	rc = devm_tegra_core_dev_init_opp_table_common(&pdev->dev);
>  	if (rc)
>  		goto err_rst_get;
>  
> +	pm_runtime_enable(&pdev->dev);
> +	rc = pm_runtime_resume_and_get(&pdev->dev);
> +	if (rc)
> +		goto err_pm_get;
> +
> +	rc = reset_control_assert(tegra_host->rst);
> +	if (rc)
> +		goto err_rst_assert;
> +
>  	usleep_range(2000, 4000);
>  
>  	rc = reset_control_deassert(tegra_host->rst);
>  	if (rc)
> -		goto err_rst_get;
> +		goto err_rst_assert;
>  
>  	usleep_range(2000, 4000);
>  
> @@ -1736,8 +1755,11 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
>  
>  err_add_host:
>  	reset_control_assert(tegra_host->rst);
> +err_rst_assert:
> +	pm_runtime_put_sync_suspend(&pdev->dev);
> +err_pm_get:
> +	pm_runtime_disable(&pdev->dev);
>  err_rst_get:
> -	clk_disable_unprepare(pltfm_host->clk);
>  err_clk_get:
>  	clk_disable_unprepare(tegra_host->tmclk);
>  err_power_req:
> @@ -1756,19 +1778,38 @@ static int sdhci_tegra_remove(struct platform_device *pdev)
>  
>  	reset_control_assert(tegra_host->rst);
>  	usleep_range(2000, 4000);
> -	clk_disable_unprepare(pltfm_host->clk);
> -	clk_disable_unprepare(tegra_host->tmclk);
>  
> +	pm_runtime_put_sync_suspend(&pdev->dev);
> +	pm_runtime_force_suspend(&pdev->dev);
> +
> +	clk_disable_unprepare(tegra_host->tmclk);
>  	sdhci_pltfm_free(pdev);
>  
>  	return 0;
>  }
>  
> -#ifdef CONFIG_PM_SLEEP
> -static int __maybe_unused sdhci_tegra_suspend(struct device *dev)
> +static int __maybe_unused sdhci_tegra_runtime_suspend(struct device *dev)
>  {
>  	struct sdhci_host *host = dev_get_drvdata(dev);
>  	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> +
> +	clk_disable_unprepare(pltfm_host->clk);
> +
> +	return 0;
> +}
> +
> +static int __maybe_unused sdhci_tegra_runtime_resume(struct device *dev)
> +{
> +	struct sdhci_host *host = dev_get_drvdata(dev);
> +	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> +
> +	return clk_prepare_enable(pltfm_host->clk);
> +}
> +
> +#ifdef CONFIG_PM_SLEEP
> +static int sdhci_tegra_suspend(struct device *dev)
> +{
> +	struct sdhci_host *host = dev_get_drvdata(dev);
>  	int ret;
>  
>  	if (host->mmc->caps2 & MMC_CAP2_CQE) {
> @@ -1783,17 +1824,22 @@ static int __maybe_unused sdhci_tegra_suspend(struct device *dev)
>  		return ret;
>  	}
>  
> -	clk_disable_unprepare(pltfm_host->clk);
> +	ret = pm_runtime_force_suspend(dev);
> +	if (ret) {
> +		sdhci_resume_host(host);
> +		cqhci_resume(host->mmc);
> +		return ret;
> +	}
> +
>  	return 0;
>  }
>  
> -static int __maybe_unused sdhci_tegra_resume(struct device *dev)
> +static int sdhci_tegra_resume(struct device *dev)
>  {
>  	struct sdhci_host *host = dev_get_drvdata(dev);
> -	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
>  	int ret;
>  
> -	ret = clk_prepare_enable(pltfm_host->clk);
> +	ret = pm_runtime_force_resume(dev);
>  	if (ret)
>  		return ret;
>  
> @@ -1812,13 +1858,16 @@ static int __maybe_unused sdhci_tegra_resume(struct device *dev)
>  suspend_host:
>  	sdhci_suspend_host(host);
>  disable_clk:
> -	clk_disable_unprepare(pltfm_host->clk);
> +	pm_runtime_force_suspend(dev);
>  	return ret;
>  }
>  #endif
>  
> -static SIMPLE_DEV_PM_OPS(sdhci_tegra_dev_pm_ops, sdhci_tegra_suspend,
> -			 sdhci_tegra_resume);
> +static const struct dev_pm_ops sdhci_tegra_dev_pm_ops = {
> +	SET_RUNTIME_PM_OPS(sdhci_tegra_runtime_suspend, sdhci_tegra_runtime_resume,
> +			   NULL)
> +	SET_SYSTEM_SLEEP_PM_OPS(sdhci_tegra_suspend, sdhci_tegra_resume)
> +};
>  
>  static struct platform_driver sdhci_tegra_driver = {
>  	.driver		= {
> 


  reply	other threads:[~2021-12-02  8:16 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-30 23:23 [PATCH v16 00/40] NVIDIA Tegra power management patches for 5.17 Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 01/40] soc/tegra: Enable runtime PM during OPP state-syncing Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 02/40] soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 03/40] soc/tegra: Don't print error message when OPPs not available Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 04/40] dt-bindings: clock: tegra-car: Document new clock sub-nodes Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 05/40] clk: tegra: Support runtime PM and power domain Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 06/40] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 07/40] dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 08/40] gpu: host1x: Add initial runtime PM and OPP support Dmitry Osipenko
2021-12-21 18:55   ` Jon Hunter
2021-12-21 20:58     ` Dmitry Osipenko
2021-12-22  9:47       ` Jon Hunter
2021-12-22 18:41         ` Jon Hunter
2021-12-22 19:01           ` Dmitry Osipenko
2021-12-22 19:30             ` Jon Hunter
2021-12-22 19:31               ` Dmitry Osipenko
2022-01-31 20:39                 ` Marc Zyngier
2021-11-30 23:23 ` [PATCH v16 09/40] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 10/40] drm/tegra: submit: Add missing pm_runtime_mark_last_busy() Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 11/40] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 12/40] drm/tegra: hdmi: Add OPP support Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 13/40] drm/tegra: gr2d: Support generic power domain and runtime PM Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 14/40] drm/tegra: gr3d: " Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 15/40] drm/tegra: vic: Stop channel on suspend Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 16/40] drm/tegra: nvdec: " Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 17/40] drm/tegra: submit: Remove pm_runtime_enabled() checks Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 18/40] drm/tegra: Consolidate runtime PM management of older UAPI codepath Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 19/40] usb: chipidea: tegra: Add runtime PM and OPP support Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 20/40] bus: tegra-gmi: " Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 21/40] pwm: tegra: " Dmitry Osipenko
2022-02-21  8:17   ` Uwe Kleine-König
2022-02-21  9:53     ` Dmitry Osipenko
2022-02-21 13:37       ` Uwe Kleine-König
2021-11-30 23:23 ` [PATCH v16 22/40] mmc: sdhci-tegra: " Dmitry Osipenko
2021-12-02  8:16   ` Adrian Hunter [this message]
2021-11-30 23:23 ` [PATCH v16 23/40] mtd: rawnand: tegra: " Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 24/40] spi: tegra20-slink: Add " Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 25/40] media: dt: bindings: tegra-vde: Convert to schema Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 26/40] media: dt: bindings: tegra-vde: Document OPP and power domain Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 27/40] media: staging: tegra-vde: Support generic " Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 28/40] soc/tegra: fuse: Reset hardware Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 29/40] soc/tegra: fuse: Use resource-managed helpers Dmitry Osipenko
2021-12-16 12:59   ` Thierry Reding
2021-11-30 23:23 ` [PATCH v16 30/40] soc/tegra: regulators: Prepare for suspend Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 31/40] soc/tegra: pmc: Rename 3d power domains Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 32/40] soc/tegra: pmc: Rename core power domain Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 33/40] soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 Dmitry Osipenko
2022-02-03 17:51   ` Thierry Reding
2021-11-30 23:23 ` [PATCH v16 34/40] ARM: tegra: Rename CPU and EMC OPP table device-tree nodes Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 35/40] ARM: tegra: Add 500MHz entry to Tegra30 memory OPP table Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 36/40] ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 37/40] ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 38/40] ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 39/40] ARM: tegra: Add Memory Client resets to Tegra30 " Dmitry Osipenko
2021-11-30 23:23 ` [PATCH v16 40/40] ARM: tegra20/30: Disable unused host1x hardware Dmitry Osipenko
2021-12-15 15:55 ` [PATCH v16 00/40] NVIDIA Tegra power management patches for 5.17 Thierry Reding
2021-12-15 16:11   ` Dmitry Osipenko
2021-12-16 13:14     ` Thierry Reding
2021-12-16 14:19       ` Dmitry Osipenko

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=fc60f593-cd74-558d-785f-5f0d2ba179cf@intel.com \
    --to=adrian.hunter@intel.com \
    --cc=david@ixit.cz \
    --cc=digetx@gmail.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=jonathanh@nvidia.com \
    --cc=lee.jones@linaro.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=linux-pwm@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=mperttunen@nvidia.com \
    --cc=mturquette@baylibre.com \
    --cc=nm@ti.com \
    --cc=pdeschrijver@nvidia.com \
    --cc=sboyd@kernel.org \
    --cc=thierry.reding@gmail.com \
    --cc=u.kleine-koenig@pengutronix.de \
    --cc=ulf.hansson@linaro.org \
    --cc=vireshk@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).